JPWO2020058798A1 - 表示装置および電子機器 - Google Patents
表示装置および電子機器 Download PDFInfo
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- JPWO2020058798A1 JPWO2020058798A1 JP2020547466A JP2020547466A JPWO2020058798A1 JP WO2020058798 A1 JPWO2020058798 A1 JP WO2020058798A1 JP 2020547466 A JP2020547466 A JP 2020547466A JP 2020547466 A JP2020547466 A JP 2020547466A JP WO2020058798 A1 JPWO2020058798 A1 JP WO2020058798A1
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- transistor
- electrode
- display device
- capacitor
- layer
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- Granted
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Images
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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Abstract
Description
図2は、画素回路を説明する図である。
図3は、画素回路を説明する図である。
図4は、画素回路の動作を説明するタイミングチャートである。
図5A〜図5Dは、回路を説明する図である。
図6A〜図6Dは、回路を説明する図である。
図7は、画素回路を説明する図である。
図8Aは、シミュレーションに用いる画素回路を説明する図である。図8Bは、画素回路の動作を説明するタイミングチャートである。
図9は、シミュレーションの結果を説明する図である。
図10A〜図10Cは、表示装置を説明する図である。
図11A、図11Bは、タッチパネルを説明する図である。
図12A、図12Bは、表示装置を説明する図である。
図13は、表示装置を説明する図である。
図14A、図14Bは、表示装置を説明する図である。
図15A、図15Bは、表示装置を説明する図である。
図16A〜図16Eは、表示装置を説明する図である。
図17A1〜図17C2は、トランジスタを説明する図である。
図18A1〜図18C2は、トランジスタを説明する図である。
図19A1〜図19C2は、トランジスタを説明する図である。
図20A1〜図20C2は、トランジスタを説明する図である。
図21A〜図21Fは、電子機器を説明する図である。
本実施の形態では、本発明の一態様である表示装置について、図面を参照して説明する。
本実施の形態では、液晶デバイスを用いた表示装置の構成例と、発光デバイスを用いた表示装置の構成例について説明する。なお、本実施の形態においては、実施の形態1で説明した表示装置の要素、動作および機能の説明は省略する。
本実施の形態では、上記実施の形態に示した各トランジスタに置き換えて用いることのできるトランジスタの一例について、図面を用いて説明する。
図17A1は、ボトムゲート型のトランジスタの一種であるチャネル保護型のトランジスタ810のチャネル長方向の断面図である。図17A1において、トランジスタ810は基板771上に形成されている。また、トランジスタ810は、基板771上に絶縁層772を介して電極746を有する。また、電極746上に絶縁層726を介して半導体層742を有する。電極746はゲート電極として機能できる。絶縁層726はゲート絶縁層として機能できる。
図19A1に例示するトランジスタ842は、トップゲート型のトランジスタの1つである。電極744aおよび電極744bは、絶縁層728および絶縁層729に形成した開口部において半導体層742と電気的に接続する。
本発明の一態様に係る表示装置を用いることができる電子機器として、表示機器、パーソナルコンピュータ、記録媒体を備えた画像記憶装置または画像再生装置、携帯電話、携帯型を含むゲーム機、携帯データ端末、電子書籍端末、ビデオカメラ、デジタルスチルカメラ等のカメラ、ゴーグル型ディスプレイ(ヘッドマウントディスプレイ)、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤー等)、複写機、ファクシミリ、プリンタ、プリンタ複合機、現金自動預け入れ払い機(ATM)、自動販売機などが挙げられる。これら電子機器の具体例を図21A乃至図21Fに示す。
Claims (8)
- 第1の画素回路と、第2の画素回路と、を有する表示装置であって、
前記第1の画素回路は、第1のトランジスタと、第2のトランジスタと、第3のトランジスタと、キャパシタと、第1の表示デバイスと、を有し、
前記第2の画素回路は、前記第1のトランジスタと、前記第2のトランジスタと、第4のトランジスタと、前記キャパシタと、第2の表示デバイスと、を有し、
前記第1のトランジスタ、前記第2のトランジスタおよび前記キャパシタで構成される回路は、第1のデータおよび第2のデータを加算して第3のデータを生成する機能を有し、
前記第3のデータは、前記第1の表示デバイスまたは前記第2の表示デバイスに供給される表示装置。 - 第1の画素回路と、第2の画素回路と、とを有する表示装置であって、
前記第1の画素回路は、第1のトランジスタと、第2のトランジスタと、第3のトランジスタと、第1のキャパシタと、第1の回路と、を有し、
前記第2の画素回路は、前記第1のトランジスタと、前記第2のトランジスタと、第4のトランジスタと、前記第1のキャパシタと、第2の回路と、を有し、
前記第1の回路および前記第2の回路のそれぞれは、表示デバイスを有し、
前記第1のトランジスタのソースまたはドレインの一方は、前記第1のキャパシタの一方の電極と電気的に接続され、
前記第1のキャパシタの一方の電極は、前記第3のトランジスタのソースまたはドレインの一方と電気的に接続され、
前記第3のトランジスタのソースまたはドレインの他方は、前記第1の回路と電気的に接続され、
前記第1のキャパシタの他方の電極は、前記第2のトランジスタのソースまたはドレインの一方と電気的に接続され、
前記第2のトランジスタのソースまたはドレインの一方は、前記第4のトランジスタのソースまたはドレインの他方と電気的に接続され、
前記第4のトランジスタのソースまたはドレインの他方は、前記第2の回路と電気的に接続されている表示装置。 - 請求項2において、
前記第1の回路および前記第2の回路は、第5のトランジスタと、第2のキャパシタと、前記表示デバイスとして発光デバイスと、を有し、
前記第5のトランジスタのゲートは、前記第3のトランジスタまたは前記第4のトランジスタと電気的に接続され、
前記第5のトランジスタのソースまたはドレインの一方は、前記発光デバイスの一方の電極と電気的に接続され、
前記発光デバイスの一方の電極は、前記第2のキャパシタの一方の電極と電気的に接続され、
前記第2のキャパシタの他方の電極は、前記第5のトランジスタのゲートと電気的に接続されている表示装置。 - 請求項2において、
前記第1の回路および前記第2の回路は、前記表示デバイスとして液晶デバイスを有し、
前記液晶デバイスの一方の電極は、前記第3のトランジスタまたは前記第4のトランジスタのソースまたはドレインの他方と電気的に接続されている表示装置。 - 請求項4において、
さらに第3のキャパシタを有し、
前記第3のキャパシタの一方の電極は、前記液晶デバイスの一方の電極と電気的に接続されている表示装置。 - 請求項2乃至5のいずれか一項において、
前記第1のキャパシタは、第5のキャパシタおよび第6のキャパシタを有し、
前記第5のキャパシタおよび第6のキャパシタは、並列接続されている表示装置。 - 請求項1乃至5のいずれか一項において、
前記第1の画素回路および前記第2の画素回路が有するトランジスタは、チャネル形成領域に金属酸化物を有し、前記金属酸化物は、Inと、Znと、M(MはAl、Ti、Ga、Ge、Sn、Y、Zr、La、Ce、NdまたはHf)と、を有する表示装置。 - 請求項1乃至5のいずれか一項に記載の表示装置と、カメラと、を有する電子機器。
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