WO2020058798A1 - 表示装置および電子機器 - Google Patents
表示装置および電子機器 Download PDFInfo
- Publication number
- WO2020058798A1 WO2020058798A1 PCT/IB2019/057559 IB2019057559W WO2020058798A1 WO 2020058798 A1 WO2020058798 A1 WO 2020058798A1 IB 2019057559 W IB2019057559 W IB 2019057559W WO 2020058798 A1 WO2020058798 A1 WO 2020058798A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- transistor
- electrode
- display device
- light
- capacitor
- Prior art date
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Images
Classifications
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
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Definitions
- One embodiment of the present invention relates to a display device.
- one embodiment of the present invention is not limited to the above technical field.
- the technical field of one embodiment of the present invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method.
- one embodiment of the present invention relates to a process, a machine, a manufacturer, or a composition (composition of matter). Therefore, the technical field of one embodiment of the present invention disclosed in this specification more specifically includes a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, a power storage device, a storage device, an imaging device, An operation method or a manufacturing method thereof can be given as an example.
- a semiconductor device in this specification and the like refers to any device that can function by utilizing semiconductor characteristics.
- a transistor and a semiconductor circuit are one embodiment of a semiconductor device.
- the storage device, the display device, the imaging device, and the electronic device sometimes include a semiconductor device.
- Patent Literature 1 and Patent Literature 2 disclose technologies in which a transistor using zinc oxide or an In—Ga—Zn-based oxide is used for a switching element of a pixel of a display device or the like.
- Patent Document 3 discloses a memory device having a structure in which a transistor with extremely low off-state current is used for a memory cell.
- JP 2007-123861 A JP 2007-96055 A JP-A-2011-119674
- Driving a dispersion-type liquid crystal device, a tandem light-emitting device, or the like may require a voltage higher than a driving voltage of a general display device, and a source driver having a higher output than a general-purpose source driver must be used. .
- a high-output source driver consumes high power, and a new driver IC may need to be developed.
- an object of one embodiment of the present invention is to provide a display device which can supply high voltage to a display device. Another object is to provide a display device which can supply a voltage higher than or equal to an output voltage of a source driver to a display device. Another object is to provide a display device which can increase luminance of a display image. Another object is to provide a display device which can increase the aperture ratio of a pixel.
- Another object is to provide a display device with low power consumption. Another object is to provide a highly reliable display device. Alternatively, it is another object to provide a new display device or the like. Another object is to provide a method for driving the display device. Another object is to provide a new semiconductor device or the like.
- One embodiment of the present invention relates to a display device that can supply high voltage to a display device.
- One embodiment of the present invention is a display device including a first pixel circuit and a second pixel circuit, wherein the first pixel circuit includes a first transistor, a second transistor, and a third transistor. , A capacitor, and a first display device, and the second pixel circuit includes a first transistor, a second transistor, a fourth transistor, a capacitor, and a second display.
- the third data is a display device supplied to the first display device or the second display device.
- Another embodiment of the present invention is a display device including a first pixel circuit and a second pixel circuit, wherein the first pixel circuit includes a first transistor, a second transistor, , A third transistor, a first capacitor, and a first circuit, and the second pixel circuit includes a first transistor, a second transistor, a fourth transistor, and a first circuit. And a second circuit, wherein each of the first circuit and the second circuit has a display device, and one of a source and a drain of the first transistor is connected to the first capacitor. One electrode of the first capacitor is electrically connected to one electrode, and one electrode of the first capacitor is electrically connected to one of a source and a drain of the third transistor.
- the other electrode of the first capacitor is electrically connected to one of the source and the drain of the second transistor, and one of the source and the drain of the second transistor is connected to the source or the drain of the fourth transistor.
- the other of the source and the drain of the fourth transistor which is electrically connected to the other is a display device which is electrically connected to the second circuit.
- the first circuit and the second circuit each include a fifth transistor, a second capacitor, and a light-emitting device as a display device, and a gate of the fifth transistor is connected to the third transistor or the fourth transistor.
- One of a source and a drain of the fifth transistor is electrically connected to one electrode of the light-emitting device, and one electrode of the light-emitting device is connected to one electrode of the second capacitor.
- the second electrode of the second capacitor may be electrically connected to the gate of the fifth transistor.
- the first circuit and the second circuit each include a liquid crystal device as a display device, and one electrode of the liquid crystal device is electrically connected to the other of the source and the drain of the third transistor or the fourth transistor. It can be configured.
- the liquid crystal device may further include a third capacitor, and one electrode of the third capacitor may be electrically connected to one electrode of the liquid crystal device.
- the first capacitor has a fifth capacitor and a sixth capacitor, and the fifth capacitor and the sixth capacitor may be connected in parallel.
- the transistors included in the first pixel circuit and the second pixel circuit each include a metal oxide in a channel formation region.
- the metal oxide includes In, Zn, and M (M is Al, Ti, Ga, Ge, Sn, Y, Zr, La, Ce, Nd or Hf).
- a display device which can supply high voltage to a display device.
- a display device which can supply a voltage higher than or equal to an output voltage of a source driver to a display device can be provided.
- a display device capable of increasing luminance of a display image can be provided.
- a display device capable of increasing the aperture ratio of a pixel can be provided.
- a display device with low power consumption can be provided.
- a highly reliable display device can be provided.
- a new display device or the like can be provided.
- an operation method of the display device can be provided.
- a new semiconductor device or the like can be provided.
- FIG. 1 is a diagram illustrating a display device.
- FIG. 2 is a diagram illustrating a pixel circuit.
- FIG. 3 is a diagram illustrating a pixel circuit.
- FIG. 4 is a timing chart illustrating the operation of the pixel circuit.
- 5A to 5D are diagrams illustrating a circuit.
- 6A to 6D are diagrams for explaining the circuit.
- FIG. 7 is a diagram illustrating a pixel circuit.
- FIG. 8A is a diagram illustrating a pixel circuit used for a simulation.
- FIG. 8B is a timing chart illustrating the operation of the pixel circuit.
- FIG. 9 is a diagram illustrating the result of the simulation.
- 10A to 10C are diagrams illustrating a display device.
- 11A and 11B are diagrams illustrating a touch panel.
- FIGS. 17A1 to 17C2 are diagrams illustrating a transistor.
- 18A1 to 18C2 are diagrams illustrating a transistor.
- 19A1 to 19C2 are diagrams illustrating a transistor.
- 20A1 to 20C2 are diagrams illustrating a transistor.
- 21A to 21F are diagrams illustrating electronic devices.
- the element may be configured by a plurality of elements unless there is a functional inconvenience.
- a plurality of transistors operating as switches may be connected in series or in parallel.
- a capacitor also referred to as a capacitor
- one conductor may have a plurality of functions such as a wiring, an electrode, and a terminal in some cases, and in this specification, a plurality of names may be used for the same element.
- a plurality of names may be used for the same element.
- the elements may actually be connected via a plurality of conductors. In this document, such a configuration is also included in the category of direct connection.
- One embodiment of the present invention is a display device provided with a pixel having a function of adding data.
- the pixel has a function of retaining first data, a function of adding second data to the first data to generate third data, and a function of supplying the third data to a display device. . Therefore, a voltage higher than the output voltage of the source driver can be supplied to the display device.
- capacitive coupling by a capacitor is used.
- an element including the capacitor is shared by two pixels in the vertical direction (the direction in which the source line extends), so that the capacitor can be provided with an installation area for two pixels, and the capacitance can be reduced. Can be enhanced. Therefore, data addition by capacitive coupling can be performed efficiently.
- FIG. 1 illustrates a display device according to one embodiment of the present invention.
- the display device has a source driver 14, gate drivers 15a and 15b, and a pixel array 16.
- the pixel array 16 has pixels 11 and pixels 12 arranged in a column direction and a row direction.
- the source driver 14 is electrically connected to the pixels 11 and 12.
- the gate driver 15a can be electrically connected to the pixel 11, for example.
- the gate driver 15b can be electrically connected to the pixel 12, for example.
- the gate drivers 15a and 15b are not limited to the above connection configuration, and the connection configuration with the transistors included in the pixels 11 and 12 can be arbitrary. Although two gate drivers are provided so as to be opposed to each other with the pixel array 16 interposed therebetween, the pixel 11 and the pixel 12 may be driven by one gate driver.
- the pixels 11 and 12 are provided adjacent to each other in the vertical direction (the direction in which the source line extends).
- the pixel 11 and the pixel 12 have the same circuit configuration and have a circuit 13 shared with each other.
- Each of the pixels 11 and 12 has a function of adding the supplied data.
- the addition operation can be performed by the circuit 13.
- FIG. 2 shows a specific example of the pixels 11 and 12.
- the pixel 11 includes a transistor 101, a transistor 102, a transistor 103, a capacitor 105, and a circuit 110.
- the pixel 12 includes a transistor 101, a transistor 102, a transistor 104, a capacitor 105, and a circuit 110.
- the circuit 110 can have a structure including a transistor, a capacitor, a display device, and the like, and is provided for each pixel.
- One of a source and a drain of the transistor 101 is electrically connected to one electrode of the capacitor 105.
- One electrode of the capacitor 105 is electrically connected to one of a source and a drain of the transistor 103.
- the other of the source and the drain of the transistor 103 is electrically connected to the circuit 110 of the pixel 11.
- the other electrode of the capacitor 105 is electrically connected to one of the source and the drain of the transistor 102.
- One of a source and a drain of the transistor 102 is electrically connected to one of a source and a drain of the transistor 104.
- the other of the source and the drain of the transistor 104 is electrically connected to the circuit 110 of the pixel 12.
- the connection between the elements of the pixel 11 and the pixel 12 and various wirings will be described.
- the gate of the transistor 101 is electrically connected to the wiring 121.
- the gate of the transistor 102 is electrically connected to the wiring 123.
- the gate of the transistor 103 is electrically connected to the wiring 122.
- the gate of the transistor 104 is electrically connected to the wiring 124.
- the other of the source and the drain of the transistor 101 is electrically connected to the wiring 125.
- the other of the source and the drain of the transistor 102 is electrically connected to the wiring 126.
- the wirings 121, 122, 123, and 124 have a function as gate lines, and can be electrically connected to the gate driver 15a or the gate driver 15b.
- the wirings 125 and 126 have a function as a source line and can be electrically connected to the source driver 14 (see FIG. 1).
- one of the source or drain of the transistor 101, and one electrode of the capacitor 105 a wiring for connecting one of the source or drain of the transistor 103 and the node NM 11.
- the source or node NM 12 a wiring for connecting one of a drain of the transistor 104.
- the transistors 103, and node NA 11 the wiring connecting the circuit 110.
- the node NA 11 and the node NA 12 can be floating, and the display device included in the circuit 110 operates in accordance with the potential of the node NA 11 or the node NA 12 .
- the transistor 101, the transistor 102, and the capacitor 105 correspond to a circuit 13 shared by the pixels 11 and 12.
- the circuit 13 has a function of adding data.
- the pixel 11 includes a first data to be written to the node NM 11, the capacitive coupling with the second data to be written to the node NM 12, to generate a third data node NM 11.
- the pixel 12 includes a first data to be written to the node NM 12, the capacitive coupling with the second data to be written to the node NM 11, to generate a third data node NM 12.
- the capacitor can be provided in a larger area than a case where a capacitor is provided for each pixel to form a single circuit. That is, the electrode area of the capacitor 105 can be increased, and the capacitance value can be increased.
- the first data to the node NM 11 (weight: W) writes.
- the reference potential “V ref ” is supplied to the node NM 12 , and the potential “W ⁇ V ref ” is held in the capacitor 105.
- the node NM 11 and floating, a second data node NM 12 (Data: D) supplies.
- C 105 the value of the capacitance of the capacitor 105, the capacitance value of the node NM 11 (including the capacitance of the node NA 11) and C NM11, the potential of the node NM 11, W + (C 105 / (C 105 + C NM11 )) ⁇ (D ⁇ V ref ).
- C 105 the value of the capacitance of the capacitor 105, the capacitance value of the node NM 11 (including the capacitance of the node NA 11) and C NM11, the potential of the node NM 11, W + (C 105 / (C 105 + C NM11 )) ⁇ (D ⁇ V ref ).
- the electrode area of the capacitor 105 can be increased and the capacitance C 105 can be increased; thus, data can be added efficiently.
- the first data to the node NM 12 (weight: W) writes.
- the capacitor 105 to hold the "W-V ref”.
- a second data node NM 11 (Data: D) supplies.
- C 105 the value of the capacitance of the capacitor 105, the capacitance value of the node NM 12 (including the capacitance of the node NA 12) and C NM12, the potential of the node NM 12, W + (C 105 / (C 105 + C NM12 )) ⁇ (D ⁇ V ref ).
- C 105 the value of the capacitance of the capacitor 105, the capacitance value of the node NM 12 (including the capacitance of the node NA 12) and C NM12, the potential of the node NM 12, W + (C 105 / (C 105 + C NM12 )) ⁇ (D ⁇ V ref ).
- V ref is "-W” or "-D”
- - W - if "D”
- a high voltage can be generated even when a general-purpose driver IC is used.
- a liquid crystal device or the like that requires a high voltage for gradation control can be driven.
- the voltage supplied from the source driver 14 for driving a general liquid crystal device or a light emitting device can be reduced to about ⁇ ⁇ ⁇ or 3, so that the power consumption of the display device can be reduced. it can.
- the nodes NM 11 , NM 12 , NA 11 , and NA 12 function as storage nodes. Data can be written to each node by turning on a transistor connected to each node. In addition, by turning off the transistor, the data can be held at each node.
- a transistor with extremely low off-state current is used as the transistor, leakage current can be suppressed and the potential of each node can be held for a long time.
- a transistor including a metal oxide for a channel formation region hereinafter, referred to as an OS transistor
- an OS transistor can be used as the transistor.
- an OS transistor may be used as an element included in the circuit 110.
- a transistor including Si in a channel formation region hereinafter, a Si transistor
- an OS transistor and a Si transistor may be used in combination.
- the Si transistor include a transistor including amorphous silicon, a transistor including crystalline silicon (microcrystalline silicon, low-temperature polysilicon, and single-crystal silicon).
- a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more can be used.
- a typical example is an oxide semiconductor containing indium; for example, a CAAC-OS or a CAC-OS described later can be used.
- the CAAC-OS has stable atoms in its crystal and is suitable for a transistor or the like in which reliability is emphasized.
- the CAC-OS has high mobility characteristics, and thus is suitable for a transistor that drives at high speed or the like.
- the OS transistor has an extremely low off-current characteristic of several yA / ⁇ m (current value per 1 ⁇ m of channel width) because the energy gap of the semiconductor layer is large. Further, the OS transistor has characteristics different from those of the Si transistor, such as not generating impact ionization, avalanche breakdown, and a short-channel effect, and thus can form a highly reliable circuit with high withstand voltage. In addition, variation in electrical characteristics due to non-uniformity of crystallinity, which is a problem in the Si transistor, hardly occurs in the OS transistor.
- the semiconductor layer included in the OS transistor includes an In-M-Zn-based oxide including, for example, indium, zinc, and M (a metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium). Can be obtained.
- the In-M-Zn-based oxide can be typically formed by a sputtering method. Alternatively, it may be formed by using an ALD (Atomic layer deposition) method.
- the atomic ratio of metal elements of a sputtering target used for forming the In-M-Zn-based oxide by a sputtering method satisfy In ⁇ M and Zn ⁇ M.
- each of the atomic ratios of the semiconductor layers to be formed includes a variation of ⁇ 40% of the atomic ratio of the metal element contained in the sputtering target.
- the semiconductor layer an oxide semiconductor with a low carrier density is used.
- the semiconductor layer has a carrier density of 1 ⁇ 10 17 / cm 3 or less, preferably 1 ⁇ 10 15 / cm 3 or less, further preferably 1 ⁇ 10 13 / cm 3 or less, more preferably 1 ⁇ 10 11 / cm 3. 3 or less, more preferably less than 1 ⁇ 10 10 / cm 3 , and an oxide semiconductor of 1 ⁇ 10 ⁇ 9 / cm 3 or more can be used.
- Such an oxide semiconductor is referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. It can be said that the oxide semiconductor has a low density of defect states and has stable characteristics.
- this embodiment is not limited thereto, and an oxide semiconductor having an appropriate composition may be used depending on required semiconductor characteristics and electric characteristics (eg, field-effect mobility and threshold voltage) of the transistor.
- the carrier density and the impurity concentration of the semiconductor layer, the defect density, the atomic ratio between a metal element and oxygen, the interatomic distance, and the density be appropriate.
- the concentration of silicon or carbon (concentration obtained by secondary ion mass spectrometry (SIMS)) in the semiconductor layer is set to 2 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less. / Cm 3 or less.
- an alkali metal and an alkaline earth metal may generate carriers when combined with an oxide semiconductor, which may increase off-state current of a transistor.
- concentration of the alkali metal or alkaline earth metal (concentration obtained by SIMS) in the semiconductor layer is set to 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less.
- the nitrogen concentration (concentration obtained by SIMS) in the semiconductor layer is preferably 5 ⁇ 10 18 atoms / cm 3 or less.
- the transistor when hydrogen is contained in the oxide semiconductor included in the semiconductor layer, oxygen reacts with oxygen bonded to a metal atom to become water, which may cause oxygen vacancies in the oxide semiconductor.
- oxygen vacancy When an oxygen vacancy is contained in a channel formation region in an oxide semiconductor, the transistor might have normally-on characteristics. Further, a defect in which hydrogen is contained in an oxygen vacancy functions as a donor, and an electron serving as a carrier may be generated. Further, in some cases, part of hydrogen is bonded to oxygen which is bonded to a metal atom to generate electrons serving as carriers. Therefore, a transistor including an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics.
- a defect in which hydrogen is contained in oxygen vacancies can function as a donor of an oxide semiconductor.
- the hydrogen concentration obtained by SIMS is lower than 1 ⁇ 10 20 atoms / cm 3 , preferably lower than 1 ⁇ 10 19 atoms / cm 3 , and more preferably lower than 5 ⁇ 10 18 atoms / cm 3. It is set to less than 3 , more preferably less than 1 ⁇ 10 18 atoms / cm 3 .
- an oxide semiconductor in which impurities such as hydrogen are sufficiently reduced is used for a channel formation region of a transistor, stable electric characteristics can be provided.
- the semiconductor layer may have a non-single-crystal structure, for example.
- the non-single-crystal structure includes, for example, a CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor) having a crystal oriented in the c-axis, a polycrystalline structure, a microcrystalline structure, or an amorphous structure.
- CAAC-OS C-Axis Aligned Crystalline Oxide Semiconductor
- the amorphous structure has the highest density of defect states
- the CAAC-OS has the lowest density of defect states.
- An oxide semiconductor film having an amorphous structure has, for example, a disordered atomic arrangement and no crystalline component.
- an oxide film having an amorphous structure has, for example, a completely amorphous structure and no crystal part.
- the semiconductor layer is a mixed film including two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region.
- the mixed film may have a single-layer structure or a stacked structure including any two or more of the above-described regions.
- a structure of a cloud-aligned composite (CAC) -OS which is one embodiment of a non-single-crystal semiconductor layer, is described below.
- the CAC-OS is one structure of a material in which an element included in an oxide semiconductor is unevenly distributed in a size of, for example, 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less.
- one or more metal elements are unevenly distributed in an oxide semiconductor, and a region including the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or a size in the vicinity thereof.
- the state mixed by is also referred to as a mosaic shape or a patch shape.
- the oxide semiconductor preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition to them, aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc. Or a plurality of types selected from the group consisting of:
- CAC-OS in an In-Ga-Zn oxide is an indium oxide (hereinafter referred to as InO).
- InO indium oxide
- X1 X1 is greater real than 0
- X2 Zn Y2 O Z2 X2, Y2, and Z2 is larger real than 0
- gallium An oxide hereinafter, referred to as GaO X3 (X3 is a real number larger than 0)
- Ga X4 Zn Y4 O Z4 X4, Y4, and Z4 are real numbers larger than 0)
- the material becomes mosaic by separate into, mosaic InO X1 or in X2 Zn Y2 O Z2, is a configuration in which uniformly distributed in the film (hereinafter Also referred to as a cloud-like
- the CAC-OS is a composite oxide semiconductor having a structure in which a region containing GaO X3 as a main component and a region containing In X2 Zn Y2 O Z2 or InO X1 as a main component are mixed.
- the atomic ratio of In to the element M in the first region is larger than the atomic ratio of In to the element M in the second region.
- the In concentration is higher than that of the region No. 2.
- IGZO is a common name and may refer to one compound of In, Ga, Zn, and O. Representative examples are represented by InGaO 3 (ZnO) m1 (m1 is a natural number), or In (1 + x0) Ga ( 1-x0) O 3 (ZnO) m0 (-1 ⁇ x0 ⁇ 1, m0 is an arbitrary number) Crystalline compounds may be mentioned.
- the above crystalline compound has a single crystal structure, a polycrystal structure, or a CAAC structure.
- the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have a c-axis orientation and are connected without being oriented in the ab plane.
- CAC-OS relates to the material configuration of an oxide semiconductor.
- a CAC-OS is a material composition containing In, Ga, Zn, and O, a region which is observed as a nanoparticle mainly containing Ga as a part, and a nanoparticle mainly containing In as a part.
- a region observed in a shape means a configuration in which each region is randomly dispersed in a mosaic shape. Therefore, in the CAC-OS, the crystal structure is a secondary element.
- the CAC-OS does not include a stacked structure of two or more kinds of films having different compositions.
- a structure including two layers of a film mainly containing In and a film mainly containing Ga is not included.
- the CAC-OS has a region which is observed in the form of a nanoparticle mainly including the metal element and a nanoparticle mainly including In as a part.
- the region observed in the form of particles refers to a configuration in which each of the regions is randomly dispersed in a mosaic shape.
- the CAC-OS can be formed by a sputtering method, for example, without intentionally heating the substrate.
- any one or more selected from an inert gas (typically, argon), an oxygen gas, and a nitrogen gas is used as a deposition gas.
- the flow rate ratio of the oxygen gas to the total flow rate of the film formation gas during the film formation is preferably as low as possible.
- the flow rate ratio of the oxygen gas is preferably from 0% to less than 30%, more preferably from 0% to 10%. .
- the CAC-OS is characterized in that a clear peak is not observed when measured using a ⁇ / 2 ⁇ scan by an Out-of-plane method, which is one of X-ray diffraction (XRD) measurement methods.
- XRD X-ray diffraction
- the CAC-OS includes, in an electron beam diffraction pattern obtained by irradiating an electron beam (also referred to as a nanobeam electron beam) with a probe diameter of 1 nm, a ring-shaped region (ring region) with high luminance and a ring-shaped region. Multiple bright spots are observed in the area. Therefore, the electron diffraction pattern shows that the crystal structure of the CAC-OS has an nc (nano-crystal) structure having no orientation in a planar direction and a cross-sectional direction.
- an electron beam also referred to as a nanobeam electron beam
- GaO X3 is a main component by EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX). It can be confirmed that the region and the region containing In X2 Zn Y2 O Z2 or InO X1 as a main component are unevenly distributed and mixed.
- EDX energy dispersive X-ray spectroscopy
- the CAC-OS has a different structure from an IGZO compound in which metal elements are uniformly distributed, and has different properties from the IGZO compound.
- the CAC-OS is phase-separated into a region containing GaO X3 or the like as a main component and a region containing In X2 Zn Y2 O Z2 or InO X1 as a main component.
- the region in which In X2 Zn Y2 O Z2 or InO X1 is a main component is a region having higher conductivity than the region in which GaO X3 or the like is a main component. That is, the conductivity of the oxide semiconductor is exhibited by the flow of carriers in a region containing In X2 Zn Y2 O Z2 or InO X1 as a main component. Therefore, high field-effect mobility ( ⁇ ) can be realized by distributing a region containing In X2 Zn Y2 O Z2 or InO X1 as a main component in a cloud shape in the oxide semiconductor.
- a region containing GaO X3 or the like as a main component is a region having higher insulating properties as compared with a region containing In X2 Zn Y2 O Z2 or InO X1 as a main component. That is, a region in which GaO X3 or the like is a main component is distributed in the oxide semiconductor, whereby a leakage current can be suppressed and a favorable switching operation can be realized.
- the insulating property due to GaO X3 and the like and the conductivity due to In X2 Zn Y2 O Z2 or InO X1 act complementarily to each other, so that high performance is obtained.
- On-state current (I on ) and high field-effect mobility ( ⁇ ) can be realized.
- CAC-OS is suitable as a constituent material of various semiconductor devices.
- the capacitor 105 may be formed by connecting a plurality of capacitors in parallel.
- a configuration in which two capacitors are connected in parallel using a wiring that bridges the gate wiring (wirings 123 and 125) can be employed.
- gate wirings can be dispersedly provided, and display quality can be improved particularly in a high-definition small panel or the like.
- FIGS. 1 and 2 high display quality can be obtained even when gate wirings are collectively arranged between pixels.
- a high potential is represented by “H” and a low potential is represented by “L”.
- the weight supplied to the pixel 11 is “W1”
- the image data is “D1”
- the weight supplied to the pixel 12 is “W2”
- the image data is “D2”.
- V ref for example, 0 V, a GND potential, or a specific reference potential can be used.
- the transistor 101 and 103 are rendered conductive, the potential of the wiring 125 is written to node NM 11 and node NA 11.
- the operation is the weight of the write operation in the pixel 11, the potential of the node NM 11 and node NA 11 becomes "W1".
- the transistor 101 When the potential of the wiring 121 is “L”, the potential of the wiring 122 is “H”, the potential of the wiring 123 is “H”, and the potential of the wiring 124 is “L” at time T2, the transistor 101 is turned off. At this time, the node NM 11 and node NA 11 "W1" is held. The capacitor 105 holds “W1 ⁇ V ref ”.
- the potential of the node NM 12 is "D1", and the corresponding to the capacitance ratio of the capacitor 105 and the node NM 11 + node NA 11 "(D1-V ref ) '" There is added to the node NM 11 and node NA 11.
- the operation is the addition operation in the pixel 11, the potential of the node NM 11 and node NA 11 becomes "W1 + (D1-V ref ) '".
- the potential of the node NA 11 is supplied to the display device, display is performed.
- a W1 D1
- "W1 + D1 '" is a value close to "2D1”. Therefore, a data potential about twice as high as the data potential output from the source driver can be supplied to the display device.
- V ref is supplied to the wiring 125 and “W2” is supplied to the wiring 126, and the potential of the wiring 121 is set to “H”, the potential of 123 is set to “H”, and the potential of the wiring 124 is set to “H”. , the transistor 101 becomes conductive, the potential of the node NM 11 becomes "V ref".
- This operation is a reset operation for performing a later addition operation (capacitive coupling operation).
- the transistor 102 and 104 are rendered conductive, the potential of the wiring 126 is written to node NM 12 and node NA 12.
- the operation is the weight of the write operation in the pixel 12, the potential of the node NM 12 and node NA 12 becomes "W2".
- the transistor 102 When the potential of the wiring 121 is “H”, the potential of the wiring 122 is “L”, the potential of the wiring 123 is “L”, and the potential of the wiring 124 is “H” at time T4, the transistor 102 is turned off. At this time, the node NM 12 and node NA 12 "W2" is held. Further, “W2 ⁇ V ref ” is held in the capacitor 105.
- a W1 D1
- "W2 + D2 '" is a value close to "2D2”. Therefore, a data potential about twice as high as the data potential output from the source driver can be supplied to the display device.
- 5A to 5D illustrate an example of a structure which can be applied to the circuit 110 and includes a light-emitting device as a display device.
- the node NA 11 included in the pixel 11 is illustrated in the drawing as an example, the node NA 12 included in the pixel 12 may be replaced.
- the structure illustrated in FIG. 5A includes a transistor 111, a capacitor 113, and a light emitting device 114.
- One of a source and a drain of the transistor 111 is electrically connected to one electrode of the light-emitting device 114.
- One electrode of the light emitting device 114 is electrically connected to one electrode of the capacitor 113.
- the other electrode of capacitor 113 is electrically connected to the gate of transistor 111.
- the gate of the transistor 111 is electrically connected to the node NA 11.
- the other of the source and the drain of the transistor 111 is electrically connected to the wiring 128.
- the other electrode of the light-emitting device 114 is electrically connected to the wiring 129.
- the wirings 128 and 129 have a function of supplying power.
- the wiring 128 can supply high-potential power.
- the wiring 129 can supply a low-potential power supply.
- one electrode of the light-emitting device 114 is electrically connected to the wiring 128, and the other electrode of the light-emitting device 114 is electrically connected to the transistor 111 and the other of the source and the drain. Good.
- the structure can be applied to another circuit 110 including the light-emitting device 114.
- FIG. 5C illustrates a configuration in which the transistor 112 is added to the configuration in FIG. 5A.
- One of a source and a drain of the transistor 112 is electrically connected to one of a source and a drain of the transistor 111.
- the other of the source and the drain of the transistor 112 is electrically connected to the light-emitting device 114.
- the gate of the transistor 112 is electrically connected to the wiring 127.
- the wiring 127 can function as a signal line for controlling conduction of the transistor 112.
- FIG. 5D illustrates a configuration in which the transistor 115 is added to the configuration of FIG. 5A.
- One of a source and a drain of the transistor 115 is electrically connected to one of a source and a drain of the transistor 111.
- the other of the source and the drain of the transistor 115 is electrically connected to the wiring 131.
- the gate of the transistor 115 is electrically connected to the wiring 132.
- the wiring 132 can function as a signal line for controlling conduction of the transistor 115.
- the wiring 131 can be electrically connected to a supply source of a specific potential such as a reference potential. By supplying a specific potential to one of the source and the drain of the transistor 111 from the wiring 131, writing of image data can be stabilized. Further, the light emission timing of the light emitting device 114 can be controlled.
- the wiring 131 can be connected to the circuit 120 and can have a function as a monitor line.
- the circuit 120 can have one or more of the above-described specific potential supply source, a function of acquiring electric characteristics of the transistor 111, and a function of generating correction data.
- 6A to 6D illustrate an example of a structure which can be applied to the circuit 110 and includes a liquid crystal device as a display device.
- the configuration shown in FIG. 6A includes a capacitor 116 and a liquid crystal device 117.
- One electrode of the liquid crystal device 117 is electrically connected to one electrode of the capacitor 116.
- One electrode of the capacitor 116 is electrically connected to the node NA 11.
- the other electrode of the capacitor 116 is electrically connected to the wiring 133.
- the other electrode of the liquid crystal device 117 is electrically connected to the wiring 134.
- the wirings 133 and 134 have a function of supplying power.
- the wirings 133 and 134 can supply a reference potential such as GND or 0 V or an arbitrary potential.
- FIG. 6C illustrates a structure in which the transistor 118 is added to the structure of FIG. 6A.
- One of a source and a drain of the transistor 118 is electrically connected to one electrode of the capacitor 116.
- the other of the source and the drain of the transistor 118 is electrically connected to the node NA 11.
- the gate of the transistor 118 is electrically connected to the wiring 130.
- the wiring 130 can function as a signal line for controlling conduction of the transistor 118.
- the potential of the node NA 11 in the liquid crystal device 117 is applied with the conduction of the transistor 118. Therefore, the operation of the liquid crystal device can be started at an arbitrary timing after the operation of adding the weight (W) and the data (D).
- a reset potential may be supplied to the wiring 125 (see FIG. 2) so that the transistor 104 and the transistor 118 are turned on simultaneously.
- FIG. 6D shows a configuration in which a transistor 119 is added to the configuration of FIG. 6C.
- One of a source and a drain of the transistor 119 is electrically connected to one electrode of the liquid crystal device 117.
- the other of the source and the drain of the transistor 119 is electrically connected to the wiring 131.
- the gate of the transistor 119 is electrically connected to the wiring 135.
- the wiring 135 can function as a signal line for controlling conduction of the transistor 119.
- the circuit 120 electrically connected to the wiring 131 is similar to that described with reference to FIG. 5C and may have a function of resetting the potential supplied to the capacitor 116 and the liquid crystal device 117.
- a transistor may be provided with a back gate.
- FIG. 7 shows a configuration in which the back gate is electrically connected to the front gate, which has an effect of increasing the on-state current.
- the back gate may be electrically connected to a wiring which can supply a constant potential. With such a structure, the threshold voltage of the transistor can be controlled.
- a back gate may be provided for a transistor included in the circuit 110.
- FIG. 8A shows a configuration of a pixel used in the simulation.
- the number of pixels was 2 (P1, P2), and the configuration shown in FIG. 6B (only the liquid crystal device) was used as the circuit 110.
- the simulation was performed on the voltage change of the node NA (nodes NA 11 and NA 12 ) of each pixel in the operation of increasing the input voltage by about three times. Note that SPICE was used as the circuit simulation software.
- the parameters used in the simulation are as follows.
- the voltage applied to the gate of the transistor was +15 V for "H”, -10 V for "L”, and the common potential (VCOM) was 0 V.
- FIG. 8B is a timing chart used for the simulation.
- W1 is a weight for the pixel P1
- D1 is data for the pixel P1
- V ref 1 is a reference potential for the pixel P1
- W2 is a weight for the pixel P2
- D2 is data for the pixel P2
- V ref2 is a reference potential for the pixel P2.
- FIG. 9 shows simulation results of the positive-polarity operation and the negative-polarity operation.
- the horizontal axis represents time (second), and the vertical axis represents the voltage (V) of the node NA (nodes NA 11 and NA 12 ).
- This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.
- Embodiment 2 In this embodiment, a configuration example of a display device using a liquid crystal device and a configuration example of a display device using a light-emitting device will be described. In the present embodiment, the description of the elements, operations, and functions of the display device described in Embodiment 1 will be omitted.
- the pixel described in Embodiment 1 can be used for the display device described in this embodiment.
- a scanning line driver circuit described below corresponds to a gate driver
- a signal line driver circuit corresponds to a source driver.
- 10A to 10C illustrate a structure of a display device to which one embodiment of the present invention can be applied.
- a sealant 4005 is provided so as to surround a display portion 215 provided over a first substrate 4001, and the display portion 215 is sealed with the sealant 4005 and the second substrate 4006.
- each of the scan line driver circuit 221a, the signal line driver circuit 231a, the signal line driver circuit 232a, and the common line driver circuit 241a includes a plurality of integrated circuits 4042 each provided over a printed board 4041.
- the integrated circuit 4042 is formed using a single crystal semiconductor or a polycrystalline semiconductor.
- the common line driver circuit 241a has a function of supplying a predetermined potential to the wirings 128, 129, 133, and 134 described in Embodiment 1.
- the integrated circuit 4042 included in the scan line driver circuit 221a and the common line driver circuit 241a has a function of supplying a selection signal to the display portion 215.
- the integrated circuit 4042 included in the signal line driver circuits 231a and 232a has a function of supplying image data to the display portion 215.
- the integrated circuit 4042 is mounted in a region on the first substrate 4001 which is different from a region surrounded by the sealant 4005.
- connection method of the integrated circuit 4042 is not particularly limited, and a wire bonding method, a COG (Chip On Glass) method, a TCP (Tape Carrier Package) method, a COF (Chip On Film) method, or the like can be used. it can.
- FIG. 10B illustrates an example in which the integrated circuit 4042 included in the signal line driver circuit 231a and the signal line driver circuit 232a is mounted by a COG method. Further, part or the whole of the driver circuit can be formed over the same substrate as the display portion 215 to form a system-on-panel.
- FIG. 10B illustrates an example in which the scan line driver circuit 221a and the common line driver circuit 241a are formed over the same substrate as the display portion 215.
- a sealant 4005 is provided so as to surround the display portion 215 provided over the first substrate 4001, the scan line driver circuit 221a, and the common line driver circuit 241a.
- a second substrate 4006 is provided over the display portion 215, the scan line driver circuit 221a, and the common line driver circuit 241a. Therefore, the display portion 215, the scan line driver circuit 221a, and the common line driver circuit 241a are sealed together with the display device by the first substrate 4001, the sealant 4005, and the second substrate 4006.
- FIG. 10B illustrates an example in which the signal line driver circuit 231a and the signal line driver circuit 232a are separately formed and mounted on the first substrate 4001; however, the present invention is not limited to this structure.
- the scan line driver circuit may be formed separately and mounted, or a part of the signal line driver circuit or a part of the scan line driver circuit may be formed separately and mounted.
- the signal line driver circuit 231a and the signal line driver circuit 232a may be formed over the same substrate as the display portion 215.
- the display device may include a panel in which the display device is sealed, and a module in which an IC or the like including a controller is mounted on the panel.
- the display portion and the scan line driver circuit provided over the first substrate include a plurality of transistors.
- the transistor the OS transistor or the Si transistor described in Embodiment 1 can be used.
- the structure of the transistor included in the peripheral driver circuit and the structure of the transistor included in the pixel circuit of the display portion may be the same or different.
- the transistors included in the peripheral driver circuit may all have the same structure, or may have two or more types of transistors.
- the transistors included in the pixel circuit may all have the same structure, or may have two or more types of transistors.
- the input device 4200 can be provided over the second substrate 4006.
- a structure in which the input device 4200 is provided in the display device illustrated in FIGS. 10A to 10C can function as a touch panel.
- a detection device also referred to as a sensor element
- Various sensors that can detect proximity or contact with a detection target such as a finger or a stylus can be applied as the detection device.
- a sensor system various systems such as a capacitance system, a resistive film system, a surface acoustic wave system, an infrared system, an optical system, and a pressure-sensitive system can be used.
- a touch panel having a capacitance type detection device will be described as an example.
- Examples of the capacitance type include a surface type capacitance type and a projection type capacitance type.
- the projection type capacitance method there are a self capacitance method, a mutual capacitance method, and the like. It is preferable to use the mutual capacitance method because simultaneous multipoint detection becomes possible.
- the touch panel of one embodiment of the present invention has a structure in which a separately manufactured display device and a detection device are attached to each other, a structure in which an electrode or the like which forms the detection device is provided on one or both of a substrate supporting the display device and a counter substrate, or the like.
- Various configurations can be applied.
- FIG. 11A and 11B show an example of a touch panel.
- FIG. 11A is a perspective view of the touch panel 4210.
- FIG. 11B is a schematic perspective view of the input device 4200. Note that only representative components are shown for clarity.
- the touch panel 4210 has a configuration in which a display device and a detection device which are separately manufactured are attached to each other.
- Touch panel 4210 includes an input device 4200 and a display device, which are provided in layers.
- the input device 4200 includes a substrate 4263, an electrode 4227, an electrode 4228, a plurality of wirings 4237, a plurality of wirings 4238, and a plurality of wirings 4239.
- the electrode 4227 can be electrically connected to the wiring 4237 or the wiring 4239.
- the electrode 4228 can be electrically connected to the wiring 4239.
- the FPC 4272b is electrically connected to each of the wirings 4237 and 4238.
- the FPC 4272b can be provided with an IC 4273b.
- a touch sensor may be provided between the first substrate 4001 and the second substrate 4006 of the display device.
- a touch sensor is provided between the first substrate 4001 and the second substrate 4006, an optical touch sensor using a photoelectric conversion element may be used in addition to a capacitive touch sensor.
- FIGS. 12A and 12B are cross-sectional views of a portion indicated by a chain line of N1-N2 in FIG. 10B.
- the display device illustrated in FIGS. 12A and 12B includes an electrode 4015, and the electrode 4015 is electrically connected to a terminal included in the FPC 4018 through an anisotropic conductive layer 4019. 12A and 12B, the electrode 4015 is electrically connected to the wiring 4014 through openings formed in the insulating layers 4112, 4111, and 4110.
- the electrode 4015 is formed using the same conductive layer as the first electrode layer 4030, and the wiring 4014 is formed using the same conductive layer as the source and drain electrodes of the transistor 4010 and the transistor 4011.
- the display portion 215 and the scan line driver circuit 221a provided over the first substrate 4001 have a plurality of transistors.
- the transistor 4010 included in the display portion 215 and the scan line The transistor 4011 included in the driver circuit 221a is illustrated.
- 12A and 12B illustrate a bottom-gate transistor as the transistor 4010 and the transistor 4011, a top-gate transistor may be used.
- an insulating layer 4112 is provided over the transistor 4010 and the transistor 4011.
- a partition 4510 is formed over the insulating layer 4112.
- the transistor 4010 and the transistor 4011 are provided over the insulating layer 4102.
- the transistor 4010 and the transistor 4011 each include an electrode 4017 formed over the insulating layer 4111.
- the electrode 4017 can function as a back gate electrode.
- the display device illustrated in FIGS. 12A and 12B includes a capacitor 4020.
- the configuration of capacitor 4020 is not limited to this, and may be formed of another conductive layer and an insulating layer.
- FIG. 12A is an example of a liquid crystal display device using a liquid crystal device as a display device.
- a liquid crystal device 4013 which is a display device includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008.
- an insulating layer 4032 and an insulating layer 4033 functioning as alignment films are provided so as to sandwich the liquid crystal layer 4008.
- the second electrode layer 4031 is provided on the second substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 4031 overlap with each other with the liquid crystal layer 4008 interposed therebetween.
- a liquid crystal device to which various modes are applied can be used.
- a VA (Vertical Alignment) mode a TN (Twisted Nematic) mode, an IPS (In-Plane-Switching) mode, an ASM (Axially Symmetrical Aligned Microelectronics Cellular Digital Crescent, Co., Ltd. ) Mode, AFLC (AntiFerroelectric Liquid Crystal) mode, ECB (Electrically Controlled Birefringence) mode, VA-IPS mode, guest host mode, or the like can be used.
- VA Vertical Alignment
- TN Transmission Nematic
- IPS In-Plane-Switching
- ASM Analy Symmetrical Aligned Microelectronics Cellular Digital Crescent, Co., Ltd.
- AFLC AntiFerroelectric Liquid Crystal
- ECB Electrodefringence
- a normally black liquid crystal display device such as a transmissive liquid crystal display device employing a vertical alignment (VA) mode may be applied to the liquid crystal display device described in this embodiment.
- VA vertical alignment
- an MVA (Multi-Domain Vertical Alignment) mode a PVA (Patterned Vertical Alignment) mode, an ASV (Advanced Super View) mode, or the like can be used.
- a liquid crystal device is an element that controls transmission or non-transmission of light by an optical modulation action of liquid crystal.
- the optical modulation action of the liquid crystal is controlled by an electric field (including a horizontal electric field, a vertical electric field, or an oblique electric field) applied to the liquid crystal.
- an electric field including a horizontal electric field, a vertical electric field, or an oblique electric field
- a thermotropic liquid crystal a low molecular liquid crystal
- a polymer liquid crystal a polymer dispersed liquid crystal (PDLC: Polymer Dispersed Liquid Crystal)
- ferroelectric liquid crystal an antiferroelectric liquid crystal, or the like
- These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, or the like depending on conditions.
- FIG. 12A illustrates an example of a liquid crystal display device including a vertical electric field type liquid crystal device; however, a liquid crystal display device including a horizontal electric field type liquid crystal device can be applied to one embodiment of the present invention.
- a liquid crystal exhibiting a blue phase without using an alignment film may be used.
- the blue phase is one of the liquid crystal phases, and is a phase that appears when the temperature of the cholesteric liquid crystal is increased immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition in which a chiral agent of 5% by weight or more is mixed is used for the liquid crystal layer 4008 in order to improve the temperature range.
- a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and exhibits optical isotropy. Further, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent does not require an alignment treatment and has a small viewing angle dependence. Further, since it is not necessary to provide an alignment film, a rubbing treatment is not required, so that electrostatic breakdown caused by the rubbing treatment can be prevented, and defects or breakage of a liquid crystal display device in a manufacturing process can be reduced. .
- the spacer 4035 is a columnar spacer obtained by selectively etching an insulating layer, and is provided for controlling a distance (cell gap) between the first electrode layer 4030 and the second electrode layer 4031. ing. Note that a spherical spacer may be used.
- a black matrix light-shielding layer
- a coloring layer color filter
- an optical member optical substrate
- circularly polarized light from a polarizing substrate and a phase difference substrate may be used.
- a backlight, a sidelight, or the like may be used as a light source.
- a micro LED or the like may be used as the backlight and the sidelight.
- a light-blocking layer 4132, a coloring layer 4131, and an insulating layer 4133 are provided between the substrate 4006 and the second electrode layer 4031.
- Examples of a material that can be used as the light-shielding layer include carbon black, titanium black, a metal, a metal oxide, and a composite oxide containing a solid solution of a plurality of metal oxides.
- the light shielding layer may be a film containing a resin material or a thin film of an inorganic material such as a metal.
- a stacked film of a film including a material of a coloring layer can be used for the light-blocking layer.
- a stacked structure of a film containing a material used for a coloring layer transmitting light of a certain color and a film containing a material used for a coloring layer transmitting light of another color can be used. It is preferable to use the same material for the coloring layer and the light-shielding layer, because the device can be shared and the process can be simplified.
- Examples of a material that can be used for the coloring layer include a metal material, a resin material, and a resin material containing a pigment or a dye.
- the light-blocking layer and the coloring layer can be formed by, for example, an inkjet method or the like.
- the display device illustrated in FIGS. 12A and 12B includes an insulating layer 4111 and an insulating layer 4104.
- As the insulating layers 4111 and 4104 insulating layers through which an impurity element is not easily transmitted are used. By sandwiching the semiconductor layer of the transistor between the insulating layer 4111 and the insulating layer 4104, entry of impurities from the outside can be prevented.
- a light-emitting device can be used as a display device included in the display device.
- an EL device using electroluminescence can be applied.
- An EL device has a layer containing a light-emitting compound (also referred to as an “EL layer”) between a pair of electrodes. When a potential difference larger than the threshold voltage of the EL device is generated between the pair of electrodes, holes are injected from the anode side into the EL layer and electrons are injected from the cathode side. The injected electrons and holes are recombined in the EL layer, and the light-emitting compound included in the EL layer emits light.
- an organic EL device for example, an organic EL device or an inorganic EL device can be used.
- an LED including a micro LED
- a compound semiconductor as a light-emitting material
- the EL layer is formed using a substance having a high hole-injection property, a substance having a high hole-transport property, a hole-blocking material, a substance having a high electron-transport property, a substance having a high electron-injection property, or a bipolar substance. (A substance having a high electron-transport property and a high hole-transport property) or the like.
- the EL layer can be formed by a method such as an evaporation method (including a vacuum evaporation method), a transfer method, a printing method, an inkjet method, and a coating method.
- a method such as an evaporation method (including a vacuum evaporation method), a transfer method, a printing method, an inkjet method, and a coating method.
- Inorganic EL devices are classified according to their element structures into a dispersion-type inorganic EL device and a thin-film inorganic EL device.
- the dispersion-type inorganic EL device has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder.
- the light-emission mechanism is donor-acceptor recombination light emission using a donor level and an acceptor level.
- the thin-film inorganic EL device has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes.
- the light-emitting mechanism is localized light emission using inner-shell electron transition of metal ions.
- an organic EL device will be described as a light emitting device.
- the light emitting device only needs to have at least one of the pair of electrodes transparent in order to extract light emission. Then, a transistor and a light-emitting device are formed on a substrate, and a top emission (top emission) structure for extracting light emission from a surface opposite to the substrate, a bottom emission (bottom emission) structure for extracting light emission from a surface on the substrate side, and the like. There is a light-emitting device having a dual emission structure in which light is emitted from both surfaces, and a light-emitting device having any light-emitting structure can be applied.
- FIG. 12B illustrates an example of a light-emitting display device using a light-emitting device as a display device (also referred to as an “EL display device”).
- a light-emitting device 4513 which is a display device is electrically connected to the transistor 4010 provided in the display portion 215.
- the structure of the light-emitting device 4513 is a stacked structure of the first electrode layer 4030, the light-emitting layer 4511, and the second electrode layer 4031; however, the structure is not limited to this.
- the structure of the light-emitting device 4513 can be changed as appropriate depending on the direction of light extracted from the light-emitting device 4513 and the like.
- the partition 4510 is formed using an organic insulating material or an inorganic insulating material.
- an opening be formed over the first electrode layer 4030 using a photosensitive resin material, and that the side surface of the opening be formed to have an inclined surface having a continuous curvature.
- the light-emitting layer 4511 may be formed of a single layer or a structure in which a plurality of layers are stacked.
- the light-emitting color of the light-emitting device 4513 can be white, red, green, blue, cyan, magenta, yellow, or the like depending on the material of the light-emitting layer 4511.
- a method for realizing color display there are a method of combining a light-emitting device 4513 emitting white light and a coloring layer, and a method of providing a light-emitting device 4513 having a different emission color for each pixel.
- the former method is more productive than the latter method.
- the latter method since the light emitting layer 4511 needs to be separately formed for each pixel, the productivity is lower than the former method.
- a luminescent color with higher color purity can be obtained than in the former method.
- the color purity can be further increased.
- the light-emitting layer 4511 may include an inorganic compound such as a quantum dot.
- an inorganic compound such as a quantum dot.
- a quantum dot for a light emitting layer, it can be made to function as a light emitting material.
- a protective layer may be formed over the second electrode layer 4031 and the partition 4510 so that oxygen, hydrogen, moisture, carbon dioxide, or the like does not enter the light-emitting device 4513.
- the protective layer silicon nitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, DLC (Diamond Like Carbon), or the like can be formed.
- a filler 4514 is provided and sealed.
- a protective film laminated film, ultraviolet curable resin film, or the like
- a cover material that has high airtightness and low degassing so as not to be exposed to the outside air.
- an ultraviolet curable resin or a thermosetting resin in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used.
- PVC polyvinyl chloride
- acrylic resin acrylic resin
- polyimide polyimide
- epoxy resin epoxy resin
- silicone resin polyimide
- EVA ethylene vinyl acetate
- a desiccant may be included in the filler 4514.
- sealant 4005 a glass material such as a glass frit, a resin material such as a two-component resin, which cures at room temperature, a photocurable resin, or a thermosetting resin can be used. Further, a desiccant may be included in the sealant 4005.
- an optical film such as a polarizing plate, a circularly polarizing plate (including an elliptically polarizing plate), a retardation plate ( ⁇ / 4 plate, ⁇ / 2 plate), and a color filter may be provided on the emission surface of the light emitting device. It may be provided as appropriate. Further, an antireflection film may be provided on a polarizing plate or a circularly polarizing plate. For example, anti-glare treatment can be performed in which reflected light is diffused by unevenness on the surface to reduce glare.
- the light-emitting device has a microcavity structure
- light with high color purity can be extracted.
- reflection can be reduced and visibility of a displayed image can be increased.
- first electrode layer and a second electrode layer (also referred to as a pixel electrode layer, a common electrode layer, a counter electrode layer, or the like) for applying a voltage to a display device, a direction of light to be extracted, a place where the electrode layer is provided, and Light transmission and reflection may be selected depending on the pattern structure of the electrode layer.
- the first electrode layer 4030 and the second electrode layer 4031 are formed using indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, or indium containing titanium oxide.
- a light-transmitting conductive material such as tin oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added can be used.
- the first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), and tantalum (Ta).
- Metals such as chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), or alloys thereof, or It can be formed using one or more kinds of metal nitride.
- the first electrode layer 4030 and the second electrode layer 4031 can be formed using a conductive composition including a conductive high molecule (also referred to as a conductive polymer).
- a conductive high molecule also referred to as a conductive polymer.
- a so-called ⁇ -electron conjugated conductive polymer can be used.
- polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, and a copolymer of two or more of aniline, pyrrole, and thiophene or a derivative thereof, and the like can be given.
- the protection circuit is preferably formed using a non-linear element.
- FIG. 13 illustrates an example in which the stack structure is applied to the liquid crystal display device illustrated in FIG. 12A, the liquid crystal display device may be applied to the EL display device illustrated in FIG. 12B.
- a conductive film having a high light-transmitting property with respect to visible light for an electrode or a wiring by using a conductive film having a high light-transmitting property with respect to visible light for an electrode or a wiring, light transmittance in a pixel can be increased and an aperture ratio can be substantially improved. it can.
- the semiconductor layer when an OS transistor is used, the semiconductor layer also has a light-transmitting property; thus, the aperture ratio can be further increased.
- a display device may be configured by combining a liquid crystal display device and a light emitting device.
- the light emitting device is arranged on the opposite side of the display surface or at the end of the display surface.
- the light-emitting device has a function of supplying light to a display device.
- the light-emitting device can also be called a backlight.
- the light-emitting device can include a plate-shaped or sheet-shaped light guide portion (also referred to as a light guide plate) and a plurality of light-emitting devices that emit light of different colors.
- a plate-shaped or sheet-shaped light guide portion also referred to as a light guide plate
- a plurality of light-emitting devices that emit light of different colors.
- the light guide has a mechanism for changing the optical path (also referred to as a light extraction mechanism), whereby the light emitting device can uniformly irradiate the pixel portion of the display panel with light.
- a structure in which a light-emitting device is disposed immediately below a pixel without providing a light guide portion may be employed.
- the light emitting device has light emitting devices of three colors of red (R), green (G), and blue (B). Further, a white (W) light emitting device may be provided. It is preferable to use a light emitting diode (LED: Light Emitting Diode) as these light emitting devices.
- LED Light Emitting Diode
- the light emitting device has a full width at half maximum (FWHM: Full Width at at Half Maximum) of 50 nm or less, preferably 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less.
- FWHM Full Width at at Half Maximum
- the full width at half maximum of the emission spectrum is preferably as small as possible, but may be, for example, 1 nm or more.
- the red light-emitting device it is preferable to use an element whose emission spectrum has a peak wavelength in the range of 625 nm to 650 nm.
- the green light-emitting device it is preferable to use an element whose peak wavelength of an emission spectrum is in a range of 515 nm to 540 nm.
- the blue light-emitting device it is preferable to use an element whose peak wavelength of the emission spectrum is in the range of 445 nm to 470 nm.
- the display device can sequentially blink the three color light emitting devices, drive the pixels in synchronization with the blinking, and perform color display based on the successive additive color mixing method.
- the driving method can also be called field sequential driving.
- a vivid color image can be displayed.
- a smooth moving image can be displayed.
- one pixel does not need to be composed of a plurality of sub-pixels of different colors, and an effective reflection area (also referred to as an effective display area or an aperture ratio) of one pixel can be increased. Display can be performed. Further, since it is not necessary to provide a color filter for the pixel, the transmittance of the pixel can be improved, and a brighter display can be performed. Further, the manufacturing process can be simplified, and manufacturing cost can be reduced.
- FIGS. 14A and 14B are examples of schematic cross-sectional views of a display device capable of performing field sequential driving.
- a backlight unit capable of emitting light of each color of RGB is provided.
- a color filter is not required because colors are expressed by time-division light emission of each of RGB colors.
- the backlight unit 4340a illustrated in FIG. 14A has a structure in which a plurality of light-emitting devices 4342 are provided directly below a pixel with a diffusion plate 4352 therebetween.
- the diffusion plate 4352 has a function of diffusing light emitted from the light-emitting device 4342 to the first substrate 4001 side and uniforming luminance in a display portion surface.
- a polarizing plate may be provided between the light emitting device 4342 and the diffusion plate 4352 as needed.
- the diffusion plate 4352 may not be provided if unnecessary. Further, the light-blocking layer 4132 may be omitted.
- the backlight unit 4340a can include a large number of light-emitting devices 4342, bright display is possible. Further, a light guide plate is not required, and there is an advantage that light efficiency of the light emitting device 4342 is not easily impaired. Note that the light-emitting device 4342 may be provided with a light-diffusing lens 4344 as needed.
- a backlight unit 4340b illustrated in FIG. 14B has a configuration in which a light guide plate 4341 is provided directly below a pixel with a diffusion plate 4352 therebetween. At an end of the light guide plate 4341, a plurality of light emitting devices 4342 are provided.
- the light guide plate 4341 has a concavo-convex shape on the side opposite to the diffusion plate 4352, and can scatter the guided light by the concavo-convex shape and emit the light toward the diffusion plate 4352.
- the light emitting device 4342 can be fixed to the printed circuit board 4347.
- the light emitting devices 4342 of the respective colors of RGB are illustrated to be overlapped, but the light emitting devices 4342 of the respective colors of RGB may be arranged in the depth direction.
- a reflective layer 4348 that reflects visible light may be provided on a side surface opposite to the light emitting device 4342.
- the backlight unit 4340b can be reduced in cost and thickness.
- a light scattering type liquid crystal device may be used as the liquid crystal device.
- the light-scattering liquid crystal device it is preferable to use an element having a composite material of liquid crystal and a polymer.
- a polymer dispersed liquid crystal device can be used.
- a polymer network type liquid crystal (PNLC (Polymer Network Liquid Crystal)) element may be used.
- the light scattering type liquid crystal device has a structure in which a liquid crystal part is provided in a three-dimensional network structure of a resin part sandwiched between a pair of electrodes.
- a material used for the liquid crystal portion for example, a nematic liquid crystal can be used.
- a photocurable resin can be used as the resin portion.
- a monofunctional monomer such as acrylate and methacrylate
- a polyfunctional monomer such as diacrylate, triacrylate, dimethacrylate, and trimethacrylate, or a polymerizable compound obtained by mixing these can be used.
- the light scattering type liquid crystal device performs display by transmitting or scattering light by utilizing anisotropy of the refractive index of the liquid crystal material.
- the resin portion may have anisotropy of the refractive index.
- the difference in the refractive index between the liquid crystal part and the resin part does not change so much that the incident light is scattered by the liquid crystal part. Therefore, the light scattering type liquid crystal device is opaque regardless of the viewing direction.
- FIG. 15A illustrates a configuration in which the liquid crystal device 4013 of the display device in FIG. 14A is replaced with a light-scattering liquid crystal device 4016.
- the light-scattering liquid crystal device 4016 includes a composite layer 4009 having a liquid crystal portion and a resin portion, and electrode layers 4030 and 4031. Elements related to field sequential driving are the same as those in FIG. 14A. However, when a light scattering type liquid crystal device 4016 is used, an alignment film and a polarizing plate are not required.
- the spacer 4035 is illustrated in a spherical shape, it may be in a column shape.
- FIG. 15B illustrates a configuration in which the liquid crystal device 4013 of the display device in FIG. 14B is replaced with a light-scattering liquid crystal device 4016.
- the light-scattering liquid crystal device 4016 operate in a mode in which light is transmitted when no voltage is applied and light is scattered when a voltage is applied.
- a transparent display device can be provided in a normal state (a state in which display is not performed). In this case, color display can be performed when an operation of scattering light is performed.
- 16A to 16E show modifications of the display device shown in FIG. 15B. 16A to 16E, some elements of FIG. 15B are used and other elements are omitted for clarity.
- FIG. 16A illustrates a structure in which the substrate 4001 has a function as a light guide plate.
- An uneven surface may be provided on the outer surface of the substrate 4001. In this configuration, it is not necessary to separately provide a light guide plate, so that manufacturing cost can be reduced. In addition, since light is not attenuated by the light guide plate, light emitted from the light emitting device 4342 can be efficiently used.
- FIG. 16B shows a structure in which light is incident from the vicinity of the end of the composite layer 4009.
- Light can be emitted from the light-scattering type liquid crystal device to the outside by utilizing total reflection at the interface between the composite layer 4009 and the substrate 4006 and at the interface between the composite layer 4009 and the substrate 4001.
- a material having a higher refractive index than the substrates 4001 and 4006 is used for the resin portion of the composite layer 4009.
- the light-emitting device 4342 may be provided not only on one side of the display device but also on two opposing sides as shown in FIG. 16C. Further, it may be provided on three or four sides. By providing the light-emitting device 4342 on a plurality of sides, light attenuation can be compensated, and a display device having a large area can be supported.
- FIG. 16D illustrates a configuration in which light emitted from the light-emitting device 4342 is guided to the display device through the mirror 4345.
- FIG. 16E illustrates a structure in which a layer 4003 and a layer 4004 are stacked over a composite layer 4009.
- One of the layers 4003 and 4004 is a support such as a glass substrate, and the other can be formed using an inorganic film, a coating film or a film of an organic resin, or the like.
- a material having a higher refractive index than the layer 4004 is used for the resin portion of the composite layer 4009.
- a material having a higher refractive index than the layer 4003 is used.
- a first interface is formed between the composite layer 4009 and the layer 4004, and a second interface is formed between the layer 4004 and the layer 4003.
- FIG. 15B and FIGS. 16A to 16E can be combined with each other.
- This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.
- the display device of one embodiment of the present invention can be manufactured using various types of transistors such as a bottom-gate transistor and a top-gate transistor. Therefore, the material of the semiconductor layer and the transistor structure to be used can be easily replaced according to the existing manufacturing line.
- FIG. 17A1 is a cross-sectional view in the channel length direction of a channel-protection transistor 810 which is a kind of bottom-gate transistor.
- the transistor 810 is formed over a substrate 771.
- the transistor 810 includes an electrode 746 over a substrate 771 with an insulating layer 772 interposed therebetween.
- a semiconductor layer 742 is provided over the electrode 746 with an insulating layer 726 interposed therebetween.
- the electrode 746 can function as a gate electrode.
- the insulating layer 726 can function as a gate insulating layer.
- an insulating layer 741 is provided over a channel formation region of the semiconductor layer 742. Further, an electrode 744a and an electrode 744b are provided over the insulating layer 726 in contact with part of the semiconductor layer 742.
- the electrode 744a can function as one of a source electrode and a drain electrode.
- the electrode 744b can function as the other of the source electrode and the drain electrode. Part of the electrode 744a and part of the electrode 744b are formed over the insulating layer 741.
- the insulating layer 741 can function as a channel protective layer. Providing the insulating layer 741 over the channel formation region can prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed. Therefore, the channel formation region of the semiconductor layer 742 can be prevented from being etched when the electrodes 744a and 744b are formed. According to one embodiment of the present invention, a transistor with favorable electric characteristics can be realized.
- the transistor 810 includes the insulating layer 728 over the electrode 744a, the electrode 744b, and the insulating layer 741, and the insulating layer 729 over the insulating layer 728.
- an oxide semiconductor used for the semiconductor layer 742
- a material which can remove oxygen from part of the semiconductor layer 742 and generate oxygen vacancies is used for at least a portion of the electrode 744a and the electrode 744b which is in contact with the semiconductor layer 742.
- the carrier concentration increases, the region becomes n-type, and the region becomes an n-type region (n + region). Therefore, the region can function as a source region or a drain region.
- tungsten, titanium, or the like can be given as an example of a material which can remove oxygen from the semiconductor layer 742 and cause oxygen vacancies.
- a layer which functions as an n-type semiconductor or a p-type semiconductor is preferably provided between the semiconductor layer 742 and the electrode 744a and between the semiconductor layer 742 and the electrode 744b.
- a layer functioning as an n-type semiconductor or a p-type semiconductor can function as a source region or a drain region of a transistor.
- the insulating layer 729 is preferably formed using a material having a function of preventing or reducing diffusion of impurities from the outside to the transistor. Note that the insulating layer 729 can be omitted as necessary.
- the transistor 811 illustrated in FIG. 17A2 is different from the transistor 810 in that an electrode 723 which can function as a back gate electrode is provided over the insulating layer 729.
- the electrode 723 can be formed using a material and a method similar to those of the electrode 746.
- a back gate electrode is formed using a conductive layer, and is arranged so that a channel formation region of a semiconductor layer is sandwiched between the gate electrode and the back gate electrode. Therefore, the back gate electrode can function similarly to the gate electrode.
- the potential of the back gate electrode may be the same potential as the gate electrode, a ground potential (GND potential), or an arbitrary potential. Further, the threshold voltage of the transistor can be changed by independently changing the potential of the back gate electrode without interlocking with the gate electrode.
- both the electrode 746 and the electrode 723 can function as gate electrodes. Therefore, each of the insulating layers 726, 728, and 729 can function as a gate insulating layer. Note that the electrode 723 may be provided between the insulating layer 728 and the insulating layer 729.
- the other is referred to as a “back gate electrode”.
- the electrode 746 when the electrode 723 is referred to as a “gate electrode”, the electrode 746 is referred to as a “back gate electrode”.
- the transistor 811 can be considered as a kind of top-gate transistor.
- one of the electrode 746 and the electrode 723 may be referred to as a “first gate electrode”, and the other may be referred to as a “second gate electrode”.
- the electrode 746 and the electrode 723 With the electrode 746 and the electrode 723 with the semiconductor layer 742 interposed therebetween, and further by setting the electrode 746 and the electrode 723 to the same potential, a region where carriers flow in the semiconductor layer 742 becomes larger in the thickness direction. The amount of carrier movement increases. As a result, the on-state current of the transistor 811 increases and the field-effect mobility increases.
- the transistor 811 is a transistor having a large on-state current with respect to an occupied area. That is, the area occupied by the transistor 811 can be reduced with respect to the required on-state current. According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized.
- the gate electrode and the back gate electrode are formed using a conductive layer, the gate electrode and the back gate electrode have a function of preventing an electric field generated outside the transistor from acting on a semiconductor layer in which a channel is formed (particularly, a function of shielding an electric field against static electricity or the like). . Note that by forming the back gate electrode larger than the semiconductor layer and covering the semiconductor layer with the back gate electrode, the electric field shielding function can be improved.
- the back gate electrode is formed using a conductive film having a light-blocking property, light can be prevented from entering the semiconductor layer from the back gate electrode side. Accordingly, light deterioration of the semiconductor layer can be prevented, and deterioration of electrical characteristics such as a shift in threshold voltage of the transistor can be prevented.
- a highly reliable transistor can be realized. Further, a highly reliable semiconductor device can be realized.
- FIG. 17B1 is a cross-sectional view in the channel length direction of a channel protection transistor 820 having a structure different from that of FIG. 17A1.
- the transistor 820 has substantially the same structure as the transistor 810, except that an insulating layer 741 covers an end portion of the semiconductor layer 742.
- the semiconductor layer 742 and the electrode 744a are electrically connected to each other at an opening portion formed by selectively removing part of the insulating layer 741 which overlaps with the semiconductor layer 742.
- the semiconductor layer 742 and the electrode 744b are electrically connected.
- a region of the insulating layer 741 which overlaps with the channel formation region can function as a channel protective layer.
- a transistor 821 illustrated in FIG. 17B2 is different from the transistor 820 in that an electrode 723 which can function as a back gate electrode is provided over the insulating layer 729.
- the provision of the insulating layer 741 can prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed. Therefore, the thickness of the semiconductor layer 742 can be prevented from being reduced when the electrodes 744a and 744b are formed.
- the distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 746 are longer than those of the transistors 810 and 811. Therefore, parasitic capacitance generated between the electrode 744a and the electrode 746 can be reduced. Further, parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. According to one embodiment of the present invention, a transistor with favorable electric characteristics can be realized.
- FIG. 17C1 is a cross-sectional view in the channel length direction of a channel-etched transistor 825 which is one of bottom-gate transistors.
- the electrodes 744a and 744b are formed without using the insulating layer 729. Therefore, part of the semiconductor layer 742 exposed when the electrodes 744a and 744b are formed may be etched. On the other hand, since the insulating layer 729 is not provided, the productivity of the transistor can be increased.
- a transistor 826 illustrated in FIG. 17C2 is different from the transistor 820 in that an electrode 723 which can function as a back gate electrode is provided over the insulating layer 729.
- 18A1 to 18C2 are cross-sectional views in the channel width direction of the transistors 810, 811, 820, 821, 825, and 826, respectively.
- the gate electrode and the back gate electrode are connected, and the potentials of the gate electrode and the back gate electrode are the same. Further, the semiconductor layer 742 is sandwiched between the gate electrode and the back gate electrode.
- each of the gate electrode and the back gate electrode in the channel width direction is longer than the length of the semiconductor layer 742 in the channel width direction, and the entire semiconductor layer 742 in the channel width direction is formed by insulating layers 726, 741, 728, and 729.
- the structure is such that it is covered with a gate electrode and a back gate electrode sandwiched therebetween.
- the semiconductor layer 742 included in the transistor can be electrically surrounded by electric fields of the gate electrode and the back gate electrode.
- a device structure of a transistor, such as the transistor 821 and the transistor 826, which electrically surrounds the semiconductor layer 742 in which a channel formation region is formed by an electric field of a gate electrode and a back gate electrode is referred to as a Surrounded channel (S-channel) structure. Can be.
- the S-channel structure an electric field for inducing a channel by one or both of the gate electrode and the back gate electrode can be effectively applied to the semiconductor layer 742, so that the current driving capability of the transistor is improved. And high on-current characteristics can be obtained. Further, since the on-state current can be increased, the transistor can be miniaturized. With an S-channel structure, the mechanical strength of the transistor can be increased.
- the transistor 842 illustrated in FIG. 19A1 is one of top-gate transistors.
- the electrodes 744a and 744b are electrically connected to the semiconductor layer 742 in openings formed in the insulating layers 728 and 729.
- the transistor 842 has a region in which the insulating layer 726 extends beyond the edge of the electrode 746.
- the impurity concentration of a region of the semiconductor layer 742 into which impurities are introduced via the insulating layer 726 is lower than that of a region to which impurities are introduced without passing through the insulating layer 726. Therefore, an LDD (Lightly Doped Drain) region is formed in a region of the semiconductor layer 742 that overlaps with the insulating layer 726 and does not overlap with the electrode 746.
- LDD Lightly Doped Drain
- a transistor 843 illustrated in FIG. 19A2 is different from the transistor 842 in having an electrode 723.
- the transistor 843 has an electrode 723 formed over a substrate 771.
- the electrode 723 has a region overlapping with the semiconductor layer 742 with the insulating layer 772 interposed therebetween.
- the electrode 723 can function as a back gate electrode.
- the insulating layer 726 in a region which does not overlap with the electrode 746 may be removed. Further, the insulating layer 726 may be left as in the transistor 846 illustrated in FIG. 19C1 and the transistor 847 illustrated in FIG. 19C2.
- an impurity region can be formed in the semiconductor layer 742 in a self-aligned manner by introducing an impurity into the semiconductor layer 742 using the electrode 746 as a mask after the electrode 746 is formed.
- a transistor with favorable electric characteristics can be realized.
- a highly integrated semiconductor device can be realized.
- 20A1 to 20C2 are cross-sectional views of the transistors 842, 843, 844, 845, 846, and 847 in the channel width direction, respectively.
- Each of the transistor 843, the transistor 845, and the transistor 847 has the S-channel structure described above. Note that this embodiment is not limited thereto, and the transistor 843, the transistor 845, and the transistor 847 do not need to have an S-channel structure.
- This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.
- a display device As electronic devices that can use the display device according to one embodiment of the present invention, a display device, a personal computer, an image storage device or an image reproducing device provided with a recording medium, a mobile phone, a game machine including a mobile device, and a mobile data terminal , E-book terminal, video camera, digital still camera, goggle type display (head mounted display), navigation system, sound reproduction device (car audio, digital audio player, etc.), copier, facsimile, printer, multifunction printer , An automatic teller machine (ATM), a vending machine, and the like.
- 21A to 21F show specific examples of these electronic devices.
- FIG. 21A illustrates a digital camera, which includes a housing 961, a shutter button 962, a microphone 963, a speaker 967, a display portion 965, operation keys 966, a zoom lever 968, a lens 969, and the like.
- the display device of one embodiment of the present invention can be used for the display portion 965.
- FIG. 21B illustrates a portable data terminal, which includes a housing 911, a display portion 912, a speaker 913, operation buttons 914, a camera 919, and the like. Information can be input and output using the touch panel function of the display portion 912.
- the display device of one embodiment of the present invention can be used for the display portion 912.
- FIG. 21C illustrates a mobile phone, which includes a housing 951, a display portion 952, operation buttons 953, an external connection port 954, a speaker 955, a microphone 956, a camera 957, and the like.
- the mobile phone includes a touch sensor in the display portion 952. All operations such as making a call and inputting characters can be performed by touching the display portion 952 with a finger, a stylus, or the like.
- the housing 901 and the display portion 952 have flexibility and can be bent and used as illustrated.
- the display device of one embodiment of the present invention can be used for the display portion 952.
- FIG. 21D illustrates a video camera, which includes a first housing 901, a second housing 902, a display portion 903, operation keys 904, a lens 905, a connection portion 906, a speaker 907, and the like.
- the operation keys 904 and the lens 905 are provided on the first housing 901, and the display unit 903 is provided on the second housing 902.
- the display portion 903 can use the display device of one embodiment of the present invention.
- FIG. 21E illustrates a television including a housing 971, a display portion 973, operation buttons 974, a speaker 975, a communication connection terminal 976, an optical sensor 977, and the like.
- the display portion 973 is provided with a touch sensor and can perform an input operation.
- the display device of one embodiment of the present invention can be used for the display portion 973.
- FIG. 21F illustrates a digital signage including a large display portion 922.
- a large display portion 922 is attached to a side surface of a pillar 921.
- the display portion 922 can use the display device of one embodiment of the present invention.
- This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.
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Abstract
Description
図2は、画素回路を説明する図である。
図3は、画素回路を説明する図である。
図4は、画素回路の動作を説明するタイミングチャートである。
図5A~図5Dは、回路を説明する図である。
図6A~図6Dは、回路を説明する図である。
図7は、画素回路を説明する図である。
図8Aは、シミュレーションに用いる画素回路を説明する図である。図8Bは、画素回路の動作を説明するタイミングチャートである。
図9は、シミュレーションの結果を説明する図である。
図10A~図10Cは、表示装置を説明する図である。
図11A、図11Bは、タッチパネルを説明する図である。
図12A、図12Bは、表示装置を説明する図である。
図13は、表示装置を説明する図である。
図14A、図14Bは、表示装置を説明する図である。
図15A、図15Bは、表示装置を説明する図である。
図16A~図16Eは、表示装置を説明する図である。
図17A1~図17C2は、トランジスタを説明する図である。
図18A1~図18C2は、トランジスタを説明する図である。
図19A1~図19C2は、トランジスタを説明する図である。
図20A1~図20C2は、トランジスタを説明する図である。
図21A~図21Fは、電子機器を説明する図である。
本実施の形態では、本発明の一態様である表示装置について、図面を参照して説明する。
本実施の形態では、液晶デバイスを用いた表示装置の構成例と、発光デバイスを用いた表示装置の構成例について説明する。なお、本実施の形態においては、実施の形態1で説明した表示装置の要素、動作および機能の説明は省略する。
本実施の形態では、上記実施の形態に示した各トランジスタに置き換えて用いることのできるトランジスタの一例について、図面を用いて説明する。
図17A1は、ボトムゲート型のトランジスタの一種であるチャネル保護型のトランジスタ810のチャネル長方向の断面図である。図17A1において、トランジスタ810は基板771上に形成されている。また、トランジスタ810は、基板771上に絶縁層772を介して電極746を有する。また、電極746上に絶縁層726を介して半導体層742を有する。電極746はゲート電極として機能できる。絶縁層726はゲート絶縁層として機能できる。
図19A1に例示するトランジスタ842は、トップゲート型のトランジスタの1つである。電極744aおよび電極744bは、絶縁層728および絶縁層729に形成した開口部において半導体層742と電気的に接続する。
本発明の一態様に係る表示装置を用いることができる電子機器として、表示機器、パーソナルコンピュータ、記録媒体を備えた画像記憶装置または画像再生装置、携帯電話、携帯型を含むゲーム機、携帯データ端末、電子書籍端末、ビデオカメラ、デジタルスチルカメラ等のカメラ、ゴーグル型ディスプレイ(ヘッドマウントディスプレイ)、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤー等)、複写機、ファクシミリ、プリンタ、プリンタ複合機、現金自動預け入れ払い機(ATM)、自動販売機などが挙げられる。これら電子機器の具体例を図21A乃至図21Fに示す。
Claims (8)
- 第1の画素回路と、第2の画素回路と、を有する表示装置であって、
前記第1の画素回路は、第1のトランジスタと、第2のトランジスタと、第3のトランジスタと、キャパシタと、第1の表示デバイスと、を有し、
前記第2の画素回路は、前記第1のトランジスタと、前記第2のトランジスタと、第4のトランジスタと、前記キャパシタと、第2の表示デバイスと、を有し、
前記第1のトランジスタ、前記第2のトランジスタおよび前記キャパシタで構成される回路は、第1のデータおよび第2のデータを加算して第3のデータを生成する機能を有し、
前記第3のデータは、前記第1の表示デバイスまたは前記第2の表示デバイスに供給される表示装置。 - 第1の画素回路と、第2の画素回路と、とを有する表示装置であって、
前記第1の画素回路は、第1のトランジスタと、第2のトランジスタと、第3のトランジスタと、第1のキャパシタと、第1の回路と、を有し、
前記第2の画素回路は、前記第1のトランジスタと、前記第2のトランジスタと、第4のトランジスタと、前記第1のキャパシタと、第2の回路と、を有し、
前記第1の回路および前記第2の回路のそれぞれは、表示デバイスを有し、
前記第1のトランジスタのソースまたはドレインの一方は、前記第1のキャパシタの一方の電極と電気的に接続され、
前記第1のキャパシタの一方の電極は、前記第3のトランジスタのソースまたはドレインの一方と電気的に接続され、
前記第3のトランジスタのソースまたはドレインの他方は、前記第1の回路と電気的に接続され、
前記第1のキャパシタの他方の電極は、前記第2のトランジスタのソースまたはドレインの一方と電気的に接続され、
前記第2のトランジスタのソースまたはドレインの一方は、前記第4のトランジスタのソースまたはドレインの他方と電気的に接続され、
前記第4のトランジスタのソースまたはドレインの他方は、前記第2の回路と電気的に接続されている表示装置。 - 請求項2において、
前記第1の回路および前記第2の回路は、第5のトランジスタと、第2のキャパシタと、前記表示デバイスとして発光デバイスと、を有し、
前記第5のトランジスタのゲートは、前記第3のトランジスタまたは前記第4のトランジスタと電気的に接続され、
前記第5のトランジスタのソースまたはドレインの一方は、前記発光デバイスの一方の電極と電気的に接続され、
前記発光デバイスの一方の電極は、前記第2のキャパシタの一方の電極と電気的に接続され、
前記第2のキャパシタの他方の電極は、前記第5のトランジスタのゲートと電気的に接続されている表示装置。 - 請求項2において、
前記第1の回路および前記第2の回路は、前記表示デバイスとして液晶デバイスを有し、
前記液晶デバイスの一方の電極は、前記第3のトランジスタまたは前記第4のトランジスタのソースまたはドレインの他方と電気的に接続されている表示装置。 - 請求項4において、
さらに第3のキャパシタを有し、
前記第3のキャパシタの一方の電極は、前記液晶デバイスの一方の電極と電気的に接続されている表示装置。 - 請求項2乃至5のいずれか一項において、
前記第1のキャパシタは、第5のキャパシタおよび第6のキャパシタを有し、
前記第5のキャパシタおよび第6のキャパシタは、並列接続されている表示装置。 - 請求項1乃至5のいずれか一項において、
前記第1の画素回路および前記第2の画素回路が有するトランジスタは、チャネル形成領域に金属酸化物を有し、前記金属酸化物は、Inと、Znと、M(MはAl、Ti、Ga、Ge、Sn、Y、Zr、La、Ce、NdまたはHf)と、を有する表示装置。 - 請求項1乃至5のいずれか一項に記載の表示装置と、カメラと、を有する電子機器。
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