JPWO2020002562A5

JPWO2020002562A5 -

Info

Publication number: JPWO2020002562A5
Application number: JP2020572682A
Authority: JP
Publication date: 2022-07-04
Anticipated expiration: 2039-06-27

Claims

An image sensor having a plurality of superpixels, each of which is an image sensor.
The first light receiving element and
A detector electrically connected to the first light receiving element and configured to generate a trigger signal when an analog signal proportional to the brightness of the light hitting the first light receiving element matches the conditions.
With at least one second light receiving element,
With at least one exposure measurement subcircuit electrically connected to the at least one second light receiving element,
An analog-digital circuit configured to convert an analog signal proportional to the brightness of the light hitting the at least one second light receiving element into a digital signal.
The analog-digital circuit includes an analog-digital circuit that does not convert an analog signal proportional to the brightness of the light that hits the first light receiving element into a digital signal .
A logic circuit electrically connected to the detector and the analog -digital circuit and configured to enable the analog-digital circuit in response to the trigger signal.
Equipped with an image sensor.

The image sensor according to claim 1 , wherein the logic circuit is further configured to disable the analog-digital circuit after the digital signal has been read from the analog-digital circuit .

The image sensor according to claim 2, wherein the analog-digital circuit is further configured to output the digital signal to an external readout system.

The image sensor according to claim 2, wherein the analog-digital circuit is further configured to transmit a signal that resets the logic circuit after the conversion of the analog signal to the digital signal is completed.

The image sensor according to claim 1 or 2 , wherein the logic circuit is further configured to enable the analog-digital circuit in response to an external control signal.

The image sensor according to claim 1 or 2 , wherein the detector is further configured to output the trigger signal to an external readout system.

The external readout system is configured to send an acknowledgment signal to the detector in response to the trigger signal, and the detector is further configured to reset in response to the acknowledgment signal. The image sensor according to claim 6 .

The logic circuit is
A control logic electrically connected to the detector and a switch controlled by the control logic ,
A control logic electrically connected to the detector and a logic gate connected to the control logic and an external controller.
The image sensor according to claim 1 or 2 , comprising at least one of the two.

The external readout system requests output from the analog-digital circuit according to a circuit clock, and the analog-digital circuit is configured to output the digital signal in response to the request, claim 1 or 2 . Image sensor described in.

With a plurality of second light receiving elements
A plurality of exposure measurement subcircuits including at least one of the plurality of second light receiving elements, and a plurality of exposure measurement subcircuits.
The image sensor according to claim 1, further comprising.

The image sensor according to claim 10 , wherein the plurality of second light receiving elements output the analog signal to each individual capacitor node of the exposure measurement subcircuit .

The image sensor according to claim 11 , wherein at least two of the plurality of second light receiving elements have different gains from each other.

The image sensor according to claim 11 , wherein the plurality of second light receiving elements are configured to output the analog signal to the individual capacitor nodes at different times from each other.

The image sensor according to claim 10 , wherein the plurality of second light receiving elements are configured to output the analog signal to a capacitor node shared by the plurality of exposure measurement subcircuits .

At least two of the plurality of second light receiving elements are
Different density filters , different color filters,
The image sensor according to claim 10 , wherein the image sensor has at least one of them .

10. The image sensor of claim 10 , wherein the comparator comprising a first transistor of an analog-digital circuit is coupled to at least one transistor associated with each of the plurality of exposure measurement subcircuits .

16. The image sensor of claim 16 , further comprising at least one reset transistor associated with each of the plurality of exposure measurement subcircuits .

The at least one exposure measurement subcircuit further outputs the respective reset voltage of the reset transistor before outputting an analog signal proportional to the brightness of the light hitting each of the at least one second light receiving element. The image sensor according to claim 17 .

The image sensor according to claim 18 , wherein the at least one exposure measurement subcircuit sequentially outputs the reset voltage of each of the reset transistors.

19. The image sensor of claim 19 , wherein the reset voltage is output to a circuit configured to perform correlated double sampling (CDS) correction for noise and inconsistencies.

It is a super pixel used in an image sensor.
The first light receiving element and
A detector electrically connected to the first light receiving element and configured to generate a trigger signal when an analog signal proportional to the brightness of the light hitting the first light receiving element matches the conditions .
With at least one second light receiving element,
With at least one exposure measurement subcircuit electrically connected to the at least one second light receiving element ,
An analog-digital circuit configured to convert an analog signal proportional to the brightness of the light hitting the at least one second light receiving element into a digital signal.
The analog-digital circuit includes an analog-digital circuit that does not convert an analog signal proportional to the brightness of the light that hits the first light receiving element into a digital signal .
The analog is electrically connected to the detector and the analog-digital circuit, enables the analog-digital circuit in response to the trigger signal, and is read from the analog -digital circuit . -A logic circuit configured to disable a digital circuit and
Super pixel with.

The logic circuit is
A control logic electrically connected to the detector and a switch controlled by the control logic,
A control logic electrically connected to the detector and a logic gate connected to the control logic and an external controller.
21. The superpixel of claim 21, comprising at least one of the above.

A method of controlling an image sensor with multiple superpixels.
Receiving a first analog signal proportional to the light that hits the first light receiving element of one of the plurality of superpixels ,
Using a detector to generate a trigger signal when the first analog signal matches the conditions.
In response to the trigger signal, enabling the analog-digital circuit and
Receiving at least one second analog signal proportional to the light hitting at least one second light receiving element of the one superpixel .
Using the analog-digital circuit to convert at least one of the second analog signals into a digital signal ,
Equipped with
A method in which the analog-digital circuit does not convert the first analog signal into a digital signal .

Disabling the analog-digital circuit after converting the at least one second analog signal into a digital signal
Outputting the digital signal to an external readout system and
23. The method of claim 23.

23. The method of claim 23 or 24 , further comprising outputting the digital signal to an external readout system using the analog-digital circuit.

23. 25. The embodiment of any one of claims 23-25 , further comprising transmitting a signal for resetting a logic circuit using the analog-digital circuit after completing the conversion of the analog signal to the digital signal. Method.

Using the detector to output the trigger signal to an external event system,
Using the detector to receive an acknowledgment signal from the external event system in response to the trigger signal and to reset the detector in response to the acknowledgment signal.
The method according to claim 23 or 24 , further comprising.

One of claims 23-25 , further comprising receiving a request for output of the analog-digital circuit from an external readout system according to a circuit clock and outputting the digital signal in response to the request. The method described in the section .