JPWO2019123716A1 - Power converter - Google Patents

Abstract

The power converter (100) includes a multi-level booster (20) and a smoothing capacitor (30) for smoothing an output voltage of the multi-level booster (20). The multi-level booster circuit (20) includes a leg in which four semiconductor elements of a first diode (3), a second diode (4), a first switching element (5), and a second switching element (6) are connected in series. The part (8) is connected between a connection point of the first diode (3) and the second diode (4) and a connection point of the first switching element (5) and the second switching element (6). An intermediate capacitor (7). The control unit (50) sets a protection mode in which the first switching element (5) and the second switching element (6) are fixed to an off state when the voltage of the smoothing capacitor (30) becomes equal to or higher than the reference voltage value. Let it work.

Description

  The present application relates to a power converter.

  2. Description of the Related Art Conventionally, a power converter that performs the following control to suppress application of overvoltage to a semiconductor element in a power converter has been disclosed.

  In the power converter of the DC / DC power converter, switching elements S1, S2 and diodes D1, D2 are arranged in series, and resistors R4, R3, R2, R1 are connected to switching elements S1, S2, diodes D1, D2, respectively. Placed in parallel to each other. The switching elements S1 and S2 are voltage balancing resistors that adjust the voltage applied to the diodes D1 and D2. When the input voltage of the input terminal of the DC power supply is zero or greatly reduced and the switching elements S1 and S2 are in the control stop state, the voltage balance resistors R1 to R4 are used to control the voltage balance of the switching elements S1 and S2 and the diodes D1 and D2. (For example, see Patent Document 1).

Further, for example, a power conversion device that performs the following control is disclosed.
The overvoltage detector outputs a trip signal of the inverter when the DC voltage of the smoothing capacitor exceeds a preset overvoltage value. The DC voltage monitor measures the time during which the DC voltage of the smoothing capacitor is equal to or higher than the overvoltage threshold using a timer, and outputs an alarm when a predetermined time or more has elapsed. A voltage reduction measure is taken by a manual operation such as opening a condenser of a system (for example, see Patent Document 2).

JP 2014-33553 A (paragraphs [0014] to [0017], FIGS. 1, 2, and 3) JP 2007-166815 A (paragraphs [0015] to [0032], FIGS. 1 and 2)

In the conventional power converter described in Patent Literature 1, overvoltage of each semiconductor element can be suppressed when the input voltage is zero or greatly reduced and the power converter is stopped. However, when an overvoltage is applied to each semiconductor element during the operation of the power converter, it cannot be suppressed.
Further, in the conventional power converter described in Patent Document 2 described above, when the smoothing capacitor is overvoltaged, the voltage is reduced by manual operation such as opening the capacitor. It took time to take measures, and the overvoltage could not be eliminated quickly.

  In particular, in the case of a power converter including a boost converter and an inverter, which converts a DC voltage to an AC voltage and then outputs the AC voltage to a load, when there is an abnormality in the power converter, or when there is an abnormality in the load operation. , Etc., the bus voltage may increase due to the regenerative power from the load, and the voltage of the smoothing capacitor connected to the bus voltage may increase. Due to the increase in the voltage of the smoothing capacitor, an excessive voltage may be applied to each semiconductor element in the power converter. In particular, when a multi-level boost converter capable of outputting a multi-level voltage is used, since the withstand voltage of the semiconductor element of the boost converter is generally lower than the withstand voltage of the semiconductor element of the inverter, an overvoltage is applied to each semiconductor element. There was a problem that it was easy to be.

  The present application discloses a technique for solving the above-described problem, and an object of the present invention is to provide a power conversion device that can quickly suppress overvoltage of a semiconductor element in the power conversion device during operation of the power conversion device. And

The power conversion device disclosed in the present application is:
A boost converter for boosting the output voltage from the DC power supply unit, a smoothing capacitor for smoothing the output voltage of the boost converter, an inverter for converting the voltage of the smoothing capacitor to an AC voltage, and controlling the boost converter and the inverter In a power converter provided with a control unit,
The boost converter includes:
A reactor having a first end connected to the DC power supply;
Four semiconductor elements of a first semiconductor element, a second semiconductor element, a first semiconductor switching element, and a second semiconductor switching element for controlling conduction and interruption of current, respectively, are connected in series between positive and negative terminals of the smoothing capacitor, A leg in which a second end of the reactor is connected to a connection point between the second semiconductor element and the first semiconductor switching element;
An intermediate capacitor connected between a connection point of the first semiconductor element and the second semiconductor element, and a connection point of the first semiconductor switching element and the second semiconductor switching element;
The control unit includes:
In a normal mode, controlling the on and off of the first semiconductor switching element and the second semiconductor switching element to output a multi-level voltage to the boost converter,
When the voltage of the smoothing capacitor is equal to or higher than a reference voltage value, a protection mode for fixing the first semiconductor switching element and the second semiconductor switching element to an off state is operated.
Things.

  According to the power conversion device disclosed in the present application, during operation of the power conversion device, overvoltage of a semiconductor element in the power conversion device can be suppressed, so that deterioration of each semiconductor element is suppressed and high reliability is achieved. A power converter can be provided.

1 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device according to a first embodiment. FIG. 3 is an internal configuration diagram of a control unit according to the first embodiment. FIG. 5 is a diagram illustrating a relationship between an input and an output of the gate block unit according to the first embodiment. FIG. 5 is a waveform chart showing an operation of the power converter according to the first embodiment. FIG. 3 is a diagram illustrating voltages of respective units of the power converter according to the first embodiment. It is a figure showing the voltage of each part in the power converter by a comparative example. 1 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device according to a first embodiment. FIG. 7 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device according to a second embodiment. FIG. 9 is an internal configuration diagram of a control unit according to the second embodiment. FIG. 14 is a diagram illustrating a relationship between an input and an output of a gate block unit according to the second embodiment. FIG. 7 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device according to a second embodiment. FIG. 9 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device according to a third embodiment. FIG. 9 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device according to a third embodiment. FIG. 9 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device according to a third embodiment. FIG. 13 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device according to a fourth embodiment. FIG. 14 is an internal configuration diagram of a control unit according to a fourth embodiment. FIG. 14 is a diagram illustrating a relationship between an input and an output of a gate block unit according to the fourth embodiment.

Embodiment 1 FIG.
Hereinafter, power conversion device 100 according to Embodiment 1 of the present application will be described with reference to the drawings.
FIG. 1 is a diagram showing a schematic configuration of a power conversion system including a power conversion device 100 according to the first embodiment.
FIG. 2 is an internal configuration diagram of the control unit 50 according to the first embodiment.
FIG. 3 is a diagram showing a relationship between inputs and outputs of the gate block units 56, 57, 58 of the control unit 50 shown in FIG.

As shown in FIG. 1, the power conversion device 100 is provided between the DC power supply unit 1 and the AC motor 40, and converts the DC voltage from the DC power supply unit 1 to drive the AC motor 40.
Power conversion device 100 includes a multi-level booster circuit 20 as a boost converter for boosting an output voltage from DC power supply unit 1, a smoothing capacitor 30 for smoothing the output voltage of multi-level booster circuit 20, and a smoothing capacitor 30. The inverter includes an inverter that converts the smoothed voltage into an AC voltage and outputs the AC voltage to the AC motor, and a control unit that controls the multilevel booster circuit and the inverter.
The power converter 100, the DC power supply unit 1, and the AC motor 40 configured as above constitute a power conversion system according to the present embodiment.

  The multi-level booster circuit 20 of the power conversion device 100 includes a reactor 2, a leg unit 8 connected between positive and negative terminals of a smoothing capacitor 30, an intermediate capacitor 7, and balance resistors 10 and 11.

The leg section 8 of the multi-level booster circuit 20 includes a first diode 3 as a first semiconductor element and a second semiconductor element as first semiconductor elements for controlling conduction and cutoff of current from the side connected to the positive terminal of the smoothing capacitor 30, respectively. , A first switching element 5 as a first semiconductor switching element, and a second switching element 6 as a second semiconductor switching element. .
The first diode 3 and the second diode 4 are arranged such that current flows from an intermediate node n, which is a connection point between the second diode 4 and the first switching element 5, toward the positive output terminal of the multi-level booster circuit 20. Is done. The first switching element 5 and the second switching element 6 are arranged so that current flows from the intermediate node n to the negative output terminal of the multi-level booster circuit 20.

An output terminal as a second terminal of reactor 2 is connected to intermediate node n, and an input terminal of reactor 2 as a first terminal is connected to DC power supply unit 1.
The positive terminal of the intermediate capacitor 7 is connected to a connection point between the first diode 3 and the second diode 4, and the negative terminal of the intermediate capacitor 7 is connected to the first switching element 5 and the second switching element 6. Connected to a connection point.
Further, a balance resistor 10 is connected in parallel with the first diode 3, and a balance resistor 11 is connected in parallel with the second switching element 6. As described above, in the present embodiment, the balance resistors 10 and 11 are connected only to the first diode 3 and the second switching element 6 among the four semiconductor elements included in the leg portion 8. The balance resistors 10 and 11 are provided for the purpose of stabilizing the ratio of the applied voltage distributed to each semiconductor element of the leg unit 8.

1, the inverter 35 includes two switching elements 36, two in each phase, for converting DC into three-phase AC.
In addition, power conversion device 100 includes voltage detection means 30A for detecting voltage Vdc of smoothing capacitor 30. The detected smoothing capacitor voltage Vdc is input to the control unit 50.

The first switching element 5 and the second switching element 6 used in the leg unit 8 of the multi-level booster circuit 20 are like IGBTs (Insulated Gate Bipolar Transistors) or MOSFETs (metal-oxide-semiconductor field-effect transformers). It can be composed of a semiconductor element. Further, the first switching element 5 and the second switching element 6 may have diodes in anti-parallel. The semiconductor elements (the first diode 3, the second diode 4, the first switching element 5, and the second switching element 6) of the leg portion 8 are made of Si (silicon), SiC (silicon carbide), or GaN, in addition to Si (silicon). Needless to say, it can also be constituted by a semiconductor such as (gallium nitride).
Further, the first diode 3 and the second diode 4 have a switching function, and can be constituted by a semiconductor element such as an IGBT or a MOSFET having a diode connected in anti-parallel. In this case, since the regenerative operation of the multi-level booster circuit 20 is not required, the multi-level booster circuit 20 is configured by a diode.
Further, AC motor 40 may be either an induction machine or a synchronous machine.

Next, a detailed operation of the multi-level booster circuit 20 will be described.
The multi-level booster circuit 20 has a function of boosting the voltage of the smoothing capacitor 30 and generates a DC voltage which is lower than the voltage of the smoothing capacitor 30 in the intermediate capacitor 7. That is, the multi-level booster circuit 20 is characterized in that the output voltage level becomes three levels of the multi-level.
When the voltage Vm of the intermediate capacitor 7 is controlled to Ｖ Vdc, which is half of the smoothing capacitor voltage Vdc, the multilevel booster circuit 20 can output three levels of 0, Ｖ Vdc, and Vdc. Such a multi-level booster circuit is characterized by high efficiency because the switching loss of the switching element can be reduced and the carrier ripple current of the reactor can be reduced.

Next, the configuration and control of the control unit 50 will be described with reference to FIG.
As shown in FIG. 2, the control unit 50 includes a comparator 51, a latch unit 52, gate block units 56, 57, 58, and gate signal generation units 53, 54, 55. The control unit 50 can be configured using an analog circuit, an ASIC (application specific integrated circuit), an FPGA (field-programmable gate array), a microcomputer, or the like.
Hereinafter, each block of the control unit 50 will be described in detail.

  The smoothing capacitor voltage Vdc detected by the voltage detecting means 30A is input to the plus side of the comparator 51, and the comparison signal Vdcref as the reference voltage value is input to the minus side of the comparator 51. As the comparison signal Vdcref, a voltage serving as a reference for stopping the inverter 35 is input. As a design value of the comparison signal Vdcref, it is preferable to set the comparison signal Vdcref ≒ 400 V in the AC 200 V inverter and set the comparison signal Vdcref ≒ 800 V in the AC 400 V inverter.

The comparator 51 compares the input smoothing capacitor voltage Vdc with the comparison signal Vdcref, and outputs “0” when the smoothing capacitor voltage Vdc <the comparison signal Vdcref, and the smoothing capacitor voltage Vdc ≧ the comparison signal Vdcref. If "1", "1" is output.
That is, the comparator 51 outputs “1” only when the smoothing capacitor voltage Vdc becomes abnormally higher than the reference voltage value, and outputs “0” otherwise. As described above, the comparator 51 has an abnormality determination function of detecting an overvoltage of the smoothing capacitor 30. The output result of the comparator 51 is output to the latch unit 52.
When the comparator 51 is configured by an analog circuit, it is generally designed with a comparator. Needless to say, it is also possible to design with ASIC and FPGA.

Next, the latch section 52 will be described. The latch unit 52 is provided to hold “1”, which is an abnormal signal, until the release signal S1 is input when the comparator 51 detects an overvoltage.
When the latch unit 52 is designed by a logic circuit, it can be constituted by an RS flip-flop having R (reset) and S (set) input terminals. In this case, the output of the comparator 51 may be input to the set input terminal of the latch unit 52, and the release signal S1 may be input to the reset input terminal.
Even after the smoothing capacitor voltage Vdc becomes equal to or higher than the reference voltage value and the output of the comparator 51 becomes “1” in an abnormal state, the output of the comparator 51 changes to “0” in a normal state. Is fixed to "1". When the release signal S1 receives “1”, the output of the latch unit 52 is changed from “1” to “0”, and the abnormality determination can be released.

  For example, the release signal S1 may be input from the outside by an operator, or may be generated in the control unit 50. When the release signal S1 is generated in the control unit 50, for example, the output of the comparator 51 is inverted by an inverter, and then delayed by a predetermined period by a delay unit. As a result, the latch unit 52 sets the output to “0” in a normal state after a predetermined period has elapsed since the smoothing capacitor voltage Vdc became lower than the reference voltage value. As described above, by providing the latch unit 52 at the output stage of the comparator 51, the control unit 50 prevents the protection operation at the time of abnormality described later and the normal operation from being alternately repeated, thereby preventing damage to the device. Can be prevented.

Next, the gate signal generators 53, 54, 55 will be described.
The gate signal generation unit 53 generates a gate signal G3a for the switching element 36 included in the inverter 35. Further, the gate signal generation units 54 and 55 generate gate signals G1a and G2a for the first switching element 5 and the second switching element 6 included in the multi-level booster circuit 20, respectively.

Lastly, the gate block units 56, 57, 58 will be described.
In an abnormal time when the smoothing capacitor voltage Vdc becomes an overvoltage, the gate signals G1, G2, G3 of the first switching element 5, the second switching element 6 included in the multi-level booster circuit 20 and the switching element 36 included in the inverter 35, respectively. Is set to “0”, and can be constituted by a logic circuit.

The output of the latch unit 52 and the gate signal G3a are input to the gate block unit 56. The output of the latch unit 52 and the gate signal G1a are input to the gate block unit 57. The output of the latch unit 52 and the gate signal G2a are input to the gate block unit 58.
The output signals (gate signals G1, G2, G3) of each of the gate block units 56, 57, 58 are determined by the logic shown in FIG. That is, the control unit 50 outputs the “1” from the gate block units 56, 57, 58 only when the gate signals G1a, G2a, G3a are “1” and the output of the latch unit 52 is “0” when the output is normal. Gate signals G1, G2, and G3 are output, and in the case of an abnormality, the protection mode of outputting “0” gate signals G1, G2, and G3 is operated.

That is, in a normal state where the smoothing capacitor voltage Vdc is lower than the reference voltage value, the control unit 50 operates in the normal mode, and controls on / off of the first switching element 5 and the second switching element 6 of the multi-level booster circuit 20. Then, the multi-level booster circuit 20 outputs a multi-level voltage. Further, the control unit 50 controls on / off of the switching element 36 of the inverter 35 to generate an AC voltage.
On the other hand, in the abnormal case where the smoothing capacitor voltage Vdc becomes equal to or higher than the reference voltage value, the control unit 50 operates in the protection mode and turns off the first switching element 5 and the second switching element 6 of the multi-level booster circuit 20. At the same time, the switching operation of each switching element 36 of the inverter 35 is stopped and the gate is blocked.

  In FIG. 2, three gate block units 56, 57, 58 for outputting the gate signal G1 of the first switching element 5, the gate signal G2 of the second switching element 6, and the gate signal G3 for the inverter 35 are provided. The configuration provided is shown. However, in practice, the gate signal G3 of the inverter 35 requires six signals corresponding to the number of the switching elements 36, and therefore requires six gate block units. Therefore, a total of eight gate block units are required including the gate block units for the first switching element 5 and the second switching element 6 of the multi-level booster circuit 20. In FIG. 2, illustration of some gate block units is omitted to prevent the figure from being complicated.

Next, the effect of the protection mode performed by control unit 50 of power conversion device 100 of the present embodiment will be described with reference to the drawings.
FIG. 4 is a waveform diagram showing the operation of power conversion device 100 immediately after the protection mode is operated during the operation of power conversion device 100.
FIG. 5 is a diagram illustrating voltages of respective units in the power conversion device 100 operated in the protection mode.

In FIG. 4, three waveforms are shown, which are, in order from the top, the smoothing capacitor voltage Vdc, the current of the AC motor 40, and the rotation speed of the AC motor 40.
It is assumed that during operation of the power converter 100, the smoothing capacitor voltage Vdc rises due to some abnormality and becomes an overvoltage. Then, it is assumed that the control unit 50 of the power conversion device 100 detects the voltage rise of the smoothing capacitor voltage Vdc and operates the protection mode. By operating the protection mode, at time 5.5 sec, the first switching element 5 and the second switching element 6 of the multi-level booster circuit 20 are fixed to the off state, and the inverter 35 is gate-blocked and stopped. I do.

When the control unit 50 stops the inverter 35, a regenerative operation occurs due to the inductance energy of the AC motor 40 and the electromotive force of the AC motor 40, and the smoothing capacitor voltage Vdc further increases from 850V to about 1030V. In particular, when the smoothing capacitor 30 has a small capacity, when the number of rotations of the AC motor 40 is large, and the like, the smoothing capacitor voltage Vdc tends to increase.
The voltage applied to each semiconductor element of the leg section 8 of the multi-level booster circuit 20 when such a smoothing capacitor voltage Vdc is overvoltage is as shown in FIG.

  In FIG. 5, the smoothing capacitor voltage Vdc = 1030V and the intermediate capacitor voltage Vm = 850/2 = 425V. The smoothing capacitor voltage Vdc was quoted from the results of FIG. The change speed of the intermediate capacitor voltage Vm is sufficiently slower than the change of the smoothing capacitor voltage Vdc and does not change from before the inverter was stopped.

  In the protection mode, the first switching element 5 and the second switching element 6 of the leg section 8 of the multi-level booster circuit 20 are fixed in the off state. Therefore, as shown in FIG. 6, the applied voltage of the first diode and the second switching element 6 of the leg section 8 of the multi-level booster circuit 20 is obtained by subtracting the intermediate capacitor voltage Vm (425 V) from the smoothing capacitor voltage Vdc (1030 V). Divided by 2 is 302.5V. The voltage applied to the second diode 4 and the first switching element 5 is 212.5 V obtained by dividing the intermediate capacitor voltage Vm (425 V) by 2.

Here, a description will be given of a comparative example in which the first switching element 5 and the second switching element 6 of the multi-level booster circuit 20 are not fixed to the off state when the smoothing capacitor voltage Vdc is overvoltage.
FIG. 6 is a diagram showing voltages of respective parts of the power converter in the case of this comparative example.
If the first switching element 5 and the second switching element 6 are not fixed to the off state at the time of abnormality when the smoothing capacitor voltage Vdc becomes overvoltage, as shown in FIG. 5, the first switching element 5 and the second switching element 6 The applied voltage to each semiconductor element of the leg section 8 of the multi-level booster circuit 20 differs depending on the on / off state of the gate signals G1 and G2.

  When the gate signal G2 is turned on (the second switching element 6 is turned on), an excessive voltage of 605V obtained by subtracting the intermediate capacitor voltage Vm (425V) from the smoothing capacitor voltage Vdc (1030V) is applied to the first diode 3. You can see that In the case of a multi-level circuit, it is common to use a semiconductor element having a lower withstand voltage than that of the inverter. If an element with a withstand voltage of 600 V is used, the multi-level booster circuit may be deteriorated.

As described above, the control unit 50 of the power conversion device 100 according to the present embodiment operates the protection mode during the operation of the power conversion device 100 when the smoothing capacitor voltage Vdc becomes an overvoltage. In this protection mode, the control unit 50 fixes the first switching element 5 and the second switching element 6 of the multi-level booster circuit 20 to the off state and stops the inverter 35. By stopping the inverter 35, the smoothing capacitor voltage Vdc may further increase. In this case, too, an excessive voltage can be prevented from being applied to each semiconductor element in the multi-level booster circuit 20.
As described above, when the power converter 100 is abnormal, the control unit 50 can stop the power converter 100 while suppressing overvoltage of each semiconductor element in the multi-level booster circuit 20.

The semiconductor element corresponding to the portion indicated by (*) in FIGS. 5 and 6 is a semiconductor element to which the voltage applied to the leg portion 8 is distributed. When the applied voltage is distributed to the respective semiconductor elements as described above, if the impedance of each semiconductor element varies, the applied voltage is not uniformly distributed. Even in such a case, the applied voltage can be evenly distributed by connecting a resistor having sufficiently smaller impedance than the semiconductor element in parallel with the semiconductor element.
In the power converter 100 according to the present embodiment, the applied voltages distributed to the first diode 3 and the second switching element 6 of the leg section 8 may be balanced. Therefore, of the four semiconductor elements (the first diode 3, the second diode 4, the first switching element 5, and the second switching element) constituting the leg section 8, only the first diode 3 and the second switching element 6 are provided. , And the balance resistors 10 and 11 are connected in parallel.
Further, after considering the off-state impedances of the first diode 3 and the second switching element 6 so that the applied voltages of the first diode 3 and the second switching element 6 become equal, the balance resistors 10 and 11 are considered. Are determined respectively.

  In FIGS. 5 and 6 described above, the impedance when the first diode 3, the second diode 4, the first switching element 5, and the second switching element 6 are off is set to the same value in all the semiconductor elements. Calculated. Also, the calculation was made assuming that the first diode 3, the second diode 4, the first switching element 5, and the second switching element 6 were turned on when the impedance was zero.

Hereinafter, a power conversion system when the configuration of the DC power supply unit 1 is modified will be described.
FIG. 7 is a diagram illustrating a schematic configuration of the power conversion system when the configuration of the DC power supply unit 1 is modified.
FIG. 1 shows an example in which the DC power supply unit 1 is configured using a DC power supply. However, the present invention is not limited to this configuration, and the DC power supply unit 1 may include a three-phase AC power supply 1c as an AC power supply and a diode rectifier 1d for rectifying an output voltage of the three-phase AC power supply 1c.
As described above, even when the configuration of DC power supply unit 1 is modified, power conversion device 100 of the present embodiment can be applied similarly.
Note that the three-phase AC power supply 1c may be replaced with a single-phase AC power supply as an AC power supply.

  Further, the case has been described above where control unit 50 stops inverter 35 in the protection mode after smoothing capacitor voltage Vdc becomes overvoltage. However, even if the smoothing capacitor voltage Vdc becomes equal to or higher than the reference voltage value due to an abnormality occurring in the power converter 100 and the inverter 35 being stopped first, the control unit 50 similarly operates the protection mode. Can be.

According to power conversion device 100 of the present embodiment configured as described above, control unit 50 controls first switching element 5 and second switching element 5 of multi-level booster circuit 20 when abnormality occurs in which smoothing capacitor voltage Vdc becomes overvoltage. The protection mode in which the switching element 6 is fixed to the off state is operated.
As a result, it is possible to quickly prevent an excessive voltage from being applied to each semiconductor element of the leg section 8 of the multi-level booster circuit 20 and to suppress deterioration of each semiconductor element of the leg section 8 to achieve highly reliable power conversion. An apparatus 100 can be provided.

Furthermore, balance resistors 10 and 11 are connected in parallel to the first diode 3 and the second switching element 6 of the multi-level booster circuit 20, respectively. Thereby, even when the variation in the impedance when the first diode 3 and the second switching element 6 are off is large, the ratio of the applied voltage distributed to the first diode 3 and the second switching element 6 can be stabilized. Thereby, deterioration of each semiconductor element of the leg portion 8 can be further suppressed.
Further, since the balance resistor is provided only in the first diode 3 and the second switching element 6, the number of balance resistors to be used is small.
Thus, the hardware configuration can be reduced.

  Further, the resistance values of the balance resistors 10 and 11 are determined such that the applied voltages of the first diode 3 and the second switching element 6 become equal. Thereby, the ratio of the applied voltages distributed to the first diode 3 and the second switching element 6 can be further stabilized.

  Further, when an abnormality occurs in which the smoothing capacitor voltage Vdc becomes an overvoltage, the control unit 50 stops the switching operation of each switching element 36 included in the inverter 35 to stop the inverter 35 in the protection mode. As described above, when the inverter 35 continues to operate when the power converter 100 is abnormal, the power converter 100 can be stopped by stopping the inverter 35 immediately. In addition, even if the smoothing capacitor voltage Vdc further rises by stopping the inverter 35, each semiconductor element in the multi-level booster circuit 20 is in a state where overvoltage is prevented by the protection control.

  Further, when detecting that the smoothing capacitor voltage Vdc has become lower than the reference voltage value after operating the protection mode, the control unit 50 releases the protection mode after a lapse of a predetermined period from this detection. Accordingly, the protection operation and the normal operation at the time of abnormality can be prevented from being alternately and frequently repeated, and deterioration of the equipment of the power conversion device 100 can be prevented.

  In the case where the first diode 3 and the second diode 4 are replaced with semiconductor switching elements in the multi-level booster circuit 20, the control unit 50 sets the multi-level booster circuit 20 to the powering and regeneration operation modes. In response, on / off control of the semiconductor switching element is performed. Then, in the protection mode, the control unit 50 fixes the first switching element 5 and the second switching element 6 to an off state and fixes the semiconductor switching element to an off state.

Embodiment 2 FIG.
Hereinafter, the second embodiment will be described with reference to the drawings, mainly at points different from the first embodiment. The same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.
FIG. 8 is a diagram showing a schematic configuration of a power conversion system including power conversion device 200a according to the second embodiment.
FIG. 9 is an internal configuration diagram of the control unit 250 according to the second embodiment.
FIG. 10 is a diagram showing a relationship between inputs and outputs of the gate block units 56, 57, 58, 59 shown in FIG.

In the present embodiment, a step-down circuit 60 is provided between the DC power supply unit 1 and the multi-level booster circuit 20. This step-down circuit 60 includes a third switching element 61, a reactor 2, and a free wheel diode 62.
The third switching element 61 is provided in series between the DC power supply unit 1 and the input terminal of the reactor 2, and is provided with a PWM (Pulse Width Modulation) so that the DC voltage from the DC power supply unit 1 becomes a target voltage. Is turned on and off.
The reflux diode 62 is provided such that the cathode side is connected to the connection point between the DC power supply unit 1 and the reactor 2, and the current output from the output terminal of the reactor 2 returns to the input terminal of the reactor 2.
Note that the third switching element 61 can be configured by a semiconductor element such as an IGBT or a MOSFET.

Note that the step-down circuit 60 and the multi-level boost circuit 20 also serve as the reactor 2.
By connecting the step-down circuit 60 to the DC power supply unit 1 in this manner, the DC voltage can be reduced. Thus, a step-up / step-down converter having both the step-down function and the step-up function can be constituted by the step-down circuit 60 and the multi-level step-up circuit 20, and the control range of the smoothing capacitor voltage Vdc can be expanded.

Next, the configuration and control of the control unit 250 will be described with reference to FIG.
The control unit 250 according to the second embodiment further includes a gate signal generation unit 253 that generates a gate signal G4a for the third switching element 61 of the step-down circuit 60, and a gate block unit 259 to which the gate signal G4a is input. . The operation method of control unit 250 is almost the same as the operation method of control unit 50 described in the first embodiment, but the operation of gate block unit 259 is different.

The output signal (gate signal G4) of the gate block unit 259 is determined by the logic shown in FIG. Two types of operation methods, the A method and the B method, can be realized.
In the A-method, the control unit 250 operates the same protection mode as in the first embodiment when the smoothing capacitor voltage Vdc is abnormal (when the output of the latch unit 52 is 1) and becomes equal to or higher than the reference voltage value. The third switching element 61 of 60 is fixed at all times.
In the B method, the control unit 250 operates the same protection mode as that of the first embodiment when the smoothing capacitor voltage Vdc is equal to or higher than the reference voltage value, and furthermore, constantly controls the third switching element 61 of the step-down circuit 60. Fixed on.

In the case where the step-down circuit 60 is provided, when the smoothing capacitor voltage Vdc becomes overvoltage, the switching operation of the third switching element 61 by PWM is not performed, and thus the third switching element 61 is fixed to the on or off state. do it.
Note that the voltage step-down circuit 60 is not limited to the circuit configuration shown in FIG. 8, but may be changed to another circuit configuration such as a multi-level circuit.

Hereinafter, the configuration of another power converter that is different from the configuration of the power converter 200a illustrated in FIG. 8 will be described.
FIG. 11 is a diagram illustrating a schematic configuration of a power conversion device 200b according to the second embodiment.
In the power converter 200b shown in FIG. 11, the DC power supply unit 1 composed of the three-phase AC power supply 1c and the diode rectifier 1d shown in FIG. 7 of the first embodiment, and the step-down circuit 60 shown in FIG. , Is provided.

  According to power conversion devices 200a and 200b of the present embodiment configured as described above, by providing step-down circuit 60, the control range of smoothing capacitor voltage Vdc can be expanded. Further, when the smoothing capacitor voltage Vdc becomes overvoltage, the control unit 250 fixes the first switching element 5 and the second switching element 6 of the multi-level booster circuit 20 to the off state as in the first embodiment. Then, the protection mode in which the switching operation of each switching element 36 of the inverter 35 is stopped is operated. Further, in this protection mode, control unit 250 can appropriately stop power conversion device 100 by fixing third switching element 61 of step-down circuit 60 to an on or off state.

  Thus, it is possible to quickly prevent an excessive voltage from being applied to each semiconductor element in the power converters 200a and 200b, and to provide the power converters 200a and 200b with high reliability. Note that the three-phase AC power supply 1c may be replaced with a single-phase AC power supply as an AC power supply.

Embodiment 3 FIG.
Hereinafter, the third embodiment will be described with reference to the drawings, mainly at points different from the first embodiment. The same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.
FIG. 12 is a diagram illustrating a schematic configuration of a power conversion system including the power conversion device 300a according to the third embodiment.
FIG. 13 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device 300b having a configuration different from that of the power conversion device 300a illustrated in FIG.
FIG. 14 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device 300c having a configuration different from that of the power conversion devices 300a and 300b illustrated in FIGS.

In the present embodiment, the number and arrangement of the balance resistors for stabilizing the ratio of the applied voltage distributed to each semiconductor element of the leg section 8 of the multi-level booster circuit 20 are different from those of the first embodiment.
In the power converter 300a shown in FIG. 12, in addition to the balance resistors 10 and 11 shown in the first embodiment, the second diode 4 and the first switching element 5 connected in parallel to the intermediate capacitor 7, that is, in series. The balance resistor 212 is connected in parallel.
Thereby, the ratio of the applied voltage distributed to each semiconductor element of the leg portion 8 can be reliably stabilized regardless of the charge / discharge state of the intermediate capacitor 7.

In the power converter 300b shown in FIG. 13, in addition to the balance resistors 10 and 11 shown in the first embodiment, further, the balance resistors 213 and 214 are connected to the second diode 4 and the first switching element 5, respectively. Is done.
Thereby, the ratio of the applied voltage distributed to each semiconductor element of the leg portion 8 can be reliably stabilized regardless of the impedance of the second diode 4 and the first switching element 5 when the second switching element 5 is off.

The power converter 300c shown in FIG. 14 has a configuration in which no balance resistor is provided.
When there is little variation in the impedance when the first diode 3 and the second switching element 6 are off and there is no possibility that the breakdown voltage of the semiconductor element is exceeded, a configuration in which no balance resistor is provided can be provided. This makes it possible to reduce the hardware device configuration.

  In each of the power converters 300a, 300b, and 300c, similarly to the second embodiment, a step-down circuit 60 is added, or the DC power supply unit 1 includes the three-phase AC power supply 1c and the diode rectifier 1d. It goes without saying that it can be done.

  According to the power conversion device 300a of the present embodiment configured as described above, by connecting the balance resistor 212 in parallel with the intermediate capacitor 7, each semiconductor element of the leg unit 8 is independent of the discharge state of the intermediate capacitor 7. Can be stabilized. Therefore, it is possible to more reliably prevent an excessive voltage from being applied to each semiconductor element of the leg section 8 of the multi-level booster circuit 20.

Also, according to the power converter 300b of the present embodiment configured as described above, the second diode 4 and the first switching element 5 are connected to the balance resistors 213 and 214, respectively. 4 and the ratio of the applied voltage distributed to each semiconductor element of the leg section 8 can be stabilized regardless of the impedance of the first switching element 5 when the first switching element 5 is off. Therefore, it is possible to more reliably prevent an excessive voltage from being applied to each semiconductor element of the leg section 8 of the multi-level booster circuit 20.
As described above, it is possible to quickly and reliably prevent an excessive voltage from being applied to each semiconductor element in the power converter, and to provide a highly reliable power converter.

  In addition, according to the power conversion device 300c of the present embodiment configured as described above, the hardware device configuration can be reduced in scale by not providing the balance resistor.

Embodiment 4 FIG.
Hereinafter, the fourth embodiment will be described with reference to the drawings, mainly at points different from the second embodiment. The same parts as those in the second embodiment are denoted by the same reference numerals, and description thereof will be omitted.
FIG. 15 is a diagram illustrating a schematic configuration of a power conversion system including a power conversion device 400 according to the third embodiment.
FIG. 16 is an internal configuration diagram of the control unit 450 according to the fourth embodiment.
FIG. 17 is a diagram showing a relationship between inputs and outputs of the gate block units 56, 57, 58, 259, and 460 shown in FIG.

Power conversion device 400 of the present embodiment is different from power conversion device 200a of Embodiment 2 shown in FIG. 8 in the configuration of step-down circuit 460 and the control by control unit 450.
Step-down circuit 460 is obtained by replacing return diode 62 in step-down circuit 60 described in Embodiment 2 with fourth switching element 463. Here, synchronous rectification operation is performed using fourth switching element 63. , The step-down circuit 460 was changed to operate with high efficiency. As shown in FIG. 15, a MOSFET is used for the fourth switching element 463. By turning on this MOSFET at the time of current return, conduction loss can be reduced as compared with the case where the diode 62 is used.

Next, the configuration and control of the control unit 450 will be described with reference to FIGS.
In the control section 450 of the fourth embodiment, the gate signal generation section 253 of the step-down circuit 460 generates the gate signal G5a for the fourth switching element 463 in addition to the generation of the gate signal G4a for the third switching element 61. The control section 450 further includes a gate block section 460 to which the gate signal G5a is input.
The operation method of control section 450 is almost the same as the operation method of control section 250 described in the second embodiment, but the operation of added gate block section 460 will be described below.

  The output signal (gate signal G5) of gate block section 460 is determined by the logic shown in FIG. As in the second embodiment, two types of operation methods, the A method and the B method, can be realized. The control unit 450 fixes the switching state of the fourth switching element 463 to be always off when the output of the latch unit 52 is 1 in either of the A system and the B system. As described above, in the protection mode when the smoothing capacitor voltage Vdc becomes overvoltage, the control unit 450 does not perform the synchronous rectification operation of the step-down circuit 460 and always fixes the fourth switching element 463 to off. Thereby, power conversion device 400 can be appropriately stopped when smoothing capacitor voltage Vdc becomes overvoltage.

Although this application describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments may apply to particular embodiments. However, the present invention is not limited thereto, and can be applied to the embodiment alone or in various combinations.
Accordingly, innumerable modifications not illustrated are envisioned within the scope of the technology disclosed herein. For example, a case where at least one component is deformed, added or omitted, and a case where at least one component is extracted and combined with a component of another embodiment are included.

  Reference Signs List 1 DC power supply unit, 1c AC power supply, 1d diode rectifier, 2 reactor, 3rd diode, 4th diode, 5th switching element, 6 second switching element, 7 intermediate capacitor, 30 smoothing capacitor, 35 inverter, 50 , 250, 450 control unit, 10, 11, 212, 213, 214 balance resistor, 60, 460 step-down circuit, 61 third switching element, 463 fourth switching element, 100, 200a, 200b, 300a, 300b, 300c, 400 Power converter.

Claims (10)

A boost converter for boosting the output voltage from the DC power supply unit, a smoothing capacitor for smoothing the output voltage of the boost converter, an inverter for converting the voltage of the smoothing capacitor to an AC voltage, and controlling the boost converter and the inverter In a power converter provided with a control unit,
The boost converter includes:
A reactor having a first end connected to the DC power supply;
Four semiconductor elements of a first semiconductor element, a second semiconductor element, a first semiconductor switching element, and a second semiconductor switching element for controlling conduction and interruption of current, respectively, are connected in series between positive and negative terminals of the smoothing capacitor, A leg in which a second end of the reactor is connected to a connection point between the second semiconductor element and the first semiconductor switching element;
An intermediate capacitor connected between a connection point of the first semiconductor element and the second semiconductor element, and a connection point of the first semiconductor switching element and the second semiconductor switching element;
The control unit includes:
In the normal mode, controlling the on and off of the first semiconductor switching element and the second semiconductor switching element to output a multi-level voltage to the boost converter,
When the voltage of the smoothing capacitor is equal to or higher than a reference voltage value, a protection mode for fixing the first semiconductor switching element and the second semiconductor switching element to an off state is operated.
Power converter. The boost converter includes a plurality of balance resistors that stabilize a ratio of an applied voltage distributed to each of the semiconductor elements of the leg unit,
The balance resistance is, among the first semiconductor element, the second semiconductor element, the first semiconductor switching element, and the second semiconductor switching element of the leg portion, the first semiconductor element and the second semiconductor switching element And only connected respectively in parallel,
The power converter according to claim 1. The boost converter includes a plurality of balance resistors that stabilize a ratio of an applied voltage distributed to each of the semiconductor elements of the leg unit,
The balance resistor is connected in parallel to the first semiconductor element, the second semiconductor switching element, and the intermediate capacitor, respectively.
The power converter according to claim 1. The boost converter includes a plurality of balance resistors that stabilize a ratio of an applied voltage distributed to each of the semiconductor elements of the leg unit,
The balance resistor is connected in parallel to the first semiconductor element, the second semiconductor element, the first semiconductor switching element, and the second semiconductor switching element, respectively.
The power converter according to claim 1. The balance resistors connected in parallel to the first semiconductor element and the second semiconductor switching element, respectively, have a resistance value such that the applied voltages of the first semiconductor element and the second semiconductor switching element are equal. Was determined,
The power converter according to any one of claims 2 to 4. A step-down circuit having a third switching element, provided between the DC power supply unit and the step-up converter,
The control unit includes:
In the protection mode, the third switching element of the step-down circuit is fixed in an on or off state;
The power converter according to any one of claims 1 to 5. The step-down circuit further includes a fourth switching element,
The third switching element is provided in series between the DC power supply unit and a first end of the reactor,
The fourth switching element is provided to return a current output from a second end of the reactor to a first end of the reactor,
The control unit includes:
In the protection mode, the third switching element is fixed to an on or off state, and the fourth switching element is fixed to an off state.
The power converter according to claim 6. The control unit includes:
In the protection mode, stop the switching operation of the switching element of the inverter,
The power converter according to any one of claims 1 to 7. The DC power supply,
Comprising an AC power supply and a diode rectifier for rectifying an output voltage of the AC power supply,
The power converter according to any one of claims 1 to 8. The control unit, after the voltage of the smoothing capacitor is lower than the reference voltage value, after a predetermined period has elapsed, cancels the protection mode,
The power converter according to any one of claims 1 to 9.

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