JP4942143B2 - Inverter device and overvoltage protection method thereof - Google Patents

Description

  The present invention relates to an inverter device for inputting DC power from a diode converter and an overvoltage protection method thereof.

  The DC power source that is the input of the inverter device that drives the AC motor is roughly classified into a system that controls the DC voltage and a system that does not control the DC voltage. A typical example of the latter is a diode converter.

  Since the diode converter cannot control the DC voltage, the DC voltage changes according to the AC input voltage. When ignoring the impedance of the input transformer, the DC output voltage Ed of the diode converter that full-wave rectifies the three-phase AC is expressed by the following equation. Here, V is an AC input voltage effective value.

Ed = 3 × √2 / π × V [volt] (1)
Therefore, for example, when the AC input voltage V varies by ± 10% with respect to the rated voltage, the DC output voltage Ed also varies by ± 10%. In many cases, the fluctuation of the AC input voltage occurs in a relatively long cycle, and the unit is more than a minute order. The time exceeding the minute order is a level that is treated as a steady state for the inverter device.

  Here, for example, in the case of an inverter having a rated DC voltage of 2400 volts, the rated AC input voltage is determined to be V = 1777 volts by the equation (1). If the specification of the AC input voltage is ± 10%, the DC voltage changes in the range of 2160 volts to 2640 volts. Therefore, it is necessary to design the components of the inverter device on the assumption that a DC overvoltage of 2640 volts is constantly applied.

  By the way, in recent years, a phenomenon has been found in which semiconductor switching elements are accidentally destroyed by the entry of cosmic rays. For this reason, proposals have been made such that the voltage usage of the semiconductor switching element should be limited to 60% or less of the rating (see, for example, Patent Document 1).

In particular, a special countermeasure method based on data on the voltage dependency of the failure rate due to cosmic rays has been proposed for a high-voltage semiconductor switching element (see, for example, Non-Patent Document 1).
JP 2004-513596 A (page 5) “Mitsubishi Electric Power Semiconductor / Stack“ Features and Applications of GTO Thyristors ”” [searched on November 18, 2005], Internet <URL: http://www.mitsubishichips.com/Japan/files/manuals/ kc0109a1.pdf>

  As a measure for reducing the probability of accidental destruction of a semiconductor switching element due to the entry of cosmic rays, as shown in Non-Patent Document 1, application of a semiconductor switching element with improved resistance to this destruction phenomenon to an inverter device Can be considered. In the above example, an element having sufficient resistance may be applied to 2640 V that may be constantly applied.

  However, since the countermeasure product is more expensive than the standard specification element having low tolerance, when this is applied, there is a problem of economic efficiency of the inverter device.

  Further, as described in Patent Document 1, even when a standard-specific element is applied, the probability of destruction is reduced by setting the rated DC voltage lower. For example, if the rated DC voltage is lowered from 2400 volts to 2250 V, the DC voltage at 10% overvoltage becomes 2475 V, and the probability of destruction decreases. However, if the rated DC voltage is reduced, the rated output voltage of the inverter will decrease, so it may be necessary to review the rated voltage of the motor in some cases, and it is considered that the performance of the inverter has been substantially reduced. .

  The present invention has been made to solve the above-described problems, and an object of the present invention is to increase the reliability of an inverter device that obtains DC power from a diode converter without increasing cost and reducing performance.

In order to achieve the above object , an inverter device and an overvoltage protection method thereof according to the first invention of the present invention include a diode converter that converts alternating current supplied from an alternating current power source through a load-time tap switching transformer to direct current, In an inverter device comprising an inverter that converts the direct current output of the diode converter into alternating current and a direct current voltage monitor that monitors a direct current voltage that is input to the inverter, the direct current voltage monitor is preset with the direct current voltage. When the voltage exceeds the threshold voltage and the duration exceeds a preset first time width, an alarm signal is output and the tap of the on-load tap switching transformer is switched to the low voltage side . It is characterized by that.
Moreover, the inverter device and the overvoltage protection method thereof according to the second invention of the present invention include a diode converter that converts alternating current supplied from an alternating current power source into direct current, an inverter that converts direct current output of the diode converter into alternating current, and In an inverter device comprising a DC voltage monitor for monitoring a DC voltage to be input to the inverter and a current detecting means for detecting an effective value of an output current of the inverter, the DC voltage is equal to or higher than a preset threshold voltage. In addition, when the duration exceeds a preset first time width, an alarm signal is output and the threshold voltage is corrected according to the detection value of the current detection means. It is said.

  According to the present invention, it is possible to increase the reliability of an inverter device that obtains DC power from a diode converter without increasing cost and reducing performance.

  Embodiments of the present invention will be described below with reference to the drawings.

  Hereinafter, an inverter device and an overvoltage protection method thereof according to Embodiment 1 of the present invention will be described with reference to FIGS. FIG. 1A is a circuit configuration diagram of an inverter device according to Embodiment 1 of the present invention.

  AC power is supplied from the AC power source 1 to the diode converter 3 via the input transformer 2. The diode converter 3 converts alternating current into direct current, and supplies direct current to the inverter 5 through the smoothing capacitor 4. The inverter 5 is configured by bridge-connecting semiconductor switching elements having diodes connected in antiparallel, and supplies AC power to the AC motor 6. The DC voltage applied to the smoothing capacitor 4 is detected by the voltage detector 7, and the output current of the inverter 5 is detected by the current detector 8.

  The diode converter 3 in FIG. 1A is a 6-pulse rectification method, but is not limited to this rectification method, and may be a 12-pulse rectification method, for example. Further, although the inverter 5 is a two-level three-phase system, this is not limited to this system, and may be a three-level three-phase system, for example.

  The semiconductor switching elements constituting the inverter 5 are on / off controlled by gate pulses supplied from the control block 9. The control block 9 is supplied with the DC voltage detected by the voltage detector 7 and the output current detected by the current detector 8 for feedback control. Note that the internal configuration of the control block 9 has little relationship with the subject of the present invention, and therefore the description thereof is omitted.

  The DC voltage detected by the voltage detector 7 and the output current detected by the current detector 8 are also given to the protection block 10. The protection block 10 includes an overvoltage detector and an overcurrent detector for checking abnormal values of these signals, and a DC voltage monitor 11 for monitoring a slow voltage rise of the DC voltage. Here, the overvoltage detector has a function of outputting a trip signal of the inverter 5 when the DC voltage exceeds a preset overvoltage value Eov. The overcurrent detector has a function of outputting a trip signal for the inverter 5 when the output current exceeds a preset overcurrent value Ioc.

  FIG. 1B is an internal configuration diagram of the DC voltage monitor 11. An overvoltage threshold Eth that is lower than the overvoltage value Eov is set in the overvoltage threshold setting device 101, and is compared with the DC voltage detected by the voltage detector 7 by the comparator 102. Then, the timer 103 measures the time during which the DC voltage is equal to or higher than the overvoltage threshold Eth, and outputs a warning when a predetermined time or longer has elapsed.

  Hereinafter, the operation of the DC voltage monitor 11 will be described with reference to the operation time chart of FIG.

  The DC voltage Ed rises and becomes over the overvoltage threshold Eth at time t = to. When the set time of the timer 103 is a time width Tw1, an alarm is output when the state where the DC voltage Ed is equal to or higher than the overvoltage threshold Eth continues for the time width Tw1 or longer. Note that the operation of the inverter 5 is continued even after the alarm is generated. This is because the assumed element destruction is an accidental phenomenon and there is little possibility that a problem will occur immediately when a higher DC voltage is applied.

  Here, examples of setting values are shown. First, the rated DC voltage is 2400 volts. On the other hand, the overvoltage value Eov is set to 120% of the rated DC voltage in consideration of the control transient state on the inverter side. Therefore, Eov = 2400 volts × 1.2 = 2880 volts. On the other hand, the overvoltage threshold Eth is a DC voltage value at which the failure rate of the semiconductor switching element is 100 FIT. If Ed (100FIT) = 2500 volts, the overvoltage threshold Eth = 2500 volts.

  In the above, 1FIT is a unit in which the probability that a device will fail is one unit during 10 ^ 9 hours of operation. For example, 100FIT is 10 ^ 7 hours (= 1142 = 10 ^ 7 hours / 24 hours / 365 days) One inside. In designing an inverter device that requires reliability, it is usual to select a failure rate of the semiconductor switching element from 10 FIT to 100 FIT.

  Here, as an increase factor of the DC voltage of the inverter device shown in FIG. 1A, in addition to the increase of the AC input voltage, the increase factor of the motor load can be considered. The latter example is a case where the regenerative state is transiently caused by a sudden change in the load, and the smoothing capacitor is charged by the inflow of energy from the load side, and the DC voltage rises. However, since the increase in the DC voltage due to the load fluctuation is suppressed by the control, even if the DC voltage once exceeds the overvoltage threshold Eth, it returns to the rated DC voltage at most on the order of seconds.

  On the other hand, the AC input voltage rise occurs when demand for other loads is reduced or when a phase advance capacitor is inserted. Moreover, since the said event is generally related with the daily load fluctuation, it continues for a relatively long time in the time order. Considering a DC voltage rise that lasts for about seconds as an abnormality may hinder the operation of the inverter device, but from the viewpoint of ensuring the reliability of semiconductor switching elements, it continues for about a minute order to a minute order. It is reasonable to make the DC voltage rise abnormal. For this reason, the time width Tw1 is preferably set from the minute order to the time order.

  As described above, according to the present invention, it is possible to know that the probability that the semiconductor switching elements constituting the inverter have been accidentally destroyed by cosmic rays has increased, and countermeasures for reducing the probability, for example, system capacitors Voltage reduction measures can be taken by manual operation such as opening. For this reason, it is possible to increase the reliability of the inverter device without using an expensive element with increased resistance to the above-described destruction factor and without reexamining the rated DC voltage.

  Hereinafter, an inverter device and its overvoltage protection method according to Embodiment 2 of the present invention will be described with reference to FIGS.

  FIG. 3 is a block diagram of a DC voltage monitor 11A of the inverter device according to the second embodiment of the present invention. In the second embodiment, the same parts as those in the block diagram of the DC voltage monitor of the inverter device according to the first embodiment shown in FIG. 1B are denoted by the same reference numerals, and the description thereof is omitted. The second embodiment is different from the first embodiment in that a timer / counter 104 is provided in parallel with the timer 103, and the inverter 5 is tripped by the output of the timer / counter 104.

  The operation of the DC voltage monitor 11A will be described using the operation time chart of FIG.

  The DC voltage Ed rises and becomes over the overvoltage threshold Eth at time t = to. As described above, if the set time of the timer 103 is set to the time width Tw1, an alarm is output when the state where the DC voltage Ed is equal to or higher than the overvoltage threshold Eth continues for the time width Tw1 or longer. When the set time of the timer / counter 104 is a time width Tw2 (Tw2> Tw1), a trip signal is generated when the state where the DC voltage Ed is equal to or higher than the overvoltage threshold Eth continues for the time width Tw2 or more. The inverter 5 stops tripping.

  After the inverter device trips, for example, the above-described measures for reducing the DC voltage are taken and the inverter device is restarted. The time width Tw2 is preferably set to about 10 times the time width Tw1, for example.

  By adding the functions as described above, the DC voltage reduction measure can be reliably implemented, and the inverter device can be made highly reliable.

  In the above description, the duration of the DC voltage equal to or higher than the overvoltage threshold Eth is monitored, but the same effect can be obtained by monitoring the integration time. The monitoring of the accumulated time is particularly effective when the voltage of the AC power supply fluctuates with a period shorter than the time width Tw2. Specifically, for example, when the continuation of overvoltage exceeding the time width Tw1 exceeds the time width Tw2 as an integrated value, a trip signal of the inverter device is output.

  FIG. 5A is a circuit configuration diagram of an inverter device according to Embodiment 3 of the present invention. About each part of this Example 3, the same part as each part of the circuit block diagram of the inverter apparatus which concerns on Example 1 of Fig.1 (a) is shown with the same code | symbol, and the description is abbreviate | omitted. The third embodiment is different from the first embodiment in that the input transformer is a transformer 2A with a load tap changer, and the tap change controller 12 provided for the tap change control by the output of the DC voltage monitor 11B is used. The point is that the lever is switched.

  FIG. 5B is an internal configuration diagram of the DC voltage monitor 11B. The internal configuration of the DC voltage monitor 11B is basically the same as the internal configuration of the DC voltage monitor 11 shown in the first embodiment, but the output of the timer 103 is not used as an alarm and is used as a voltage reduction command. Then, this voltage reduction command is given to the tap switching controller 12 in FIG. 5A to switch the tap of the transformer 2A with a load tap changer to the low voltage side.

  By adopting the above configuration, the inverter device can be automatically made highly reliable.

  FIG. 6 is a block diagram of a DC voltage monitor 11C of the inverter device according to Embodiment 4 of the present invention. In the fourth embodiment, the same parts as those in the block diagram of the DC voltage monitor of the inverter device according to the first embodiment shown in FIG. 1B are denoted by the same reference numerals, and the description thereof is omitted. The fourth embodiment is different from the first embodiment in that an RMS current detector 105 having an output current as an input is provided, and an overvoltage threshold value is set according to the effective value of the output current detected by the RMS current detector 105. The overvoltage threshold Eth set by the device 101 is corrected.

  The probability that the semiconductor switching element is accidentally destroyed by cosmic rays depends not only on the applied voltage but also on the altitude and operating temperature of the site where the inverter device is installed. As for the altitude, when it is installed in a special highland, the overvoltage threshold Eth may be set in consideration of the condition, but the temperature changes depending on the operating state.

  Since it is complicated to correct the overvoltage threshold Eth by measuring the actual temperature, the RMS current detector 105 detects a relatively long time effective value of the current as shown in this embodiment. When this value becomes small, correction is made so as to reduce the set overvoltage threshold Eth assuming that the temperature has dropped. The comparatively long time in the above means a longer time than the cooling time constant of the semiconductor switching element.

  If comprised as mentioned above, it will become possible to make an inverter apparatus highly reliable more rationally.

The circuit block diagram of the inverter apparatus which concerns on Example 1 of this invention, and the internal block diagram of a DC voltage monitor. FIG. 3 is an operation time chart of the DC voltage monitor in Embodiment 1. FIG. The internal block diagram of the DC voltage monitor used for the inverter apparatus which concerns on Example 1 of this invention. The operation | movement time chart of the DC voltage monitor in Example 2. FIG. The circuit block diagram of the inverter apparatus which concerns on Example 3 of this invention, and the internal block diagram of a DC voltage monitor. The internal block diagram of the DC voltage monitor used for the inverter apparatus which concerns on Example 4 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 AC power supply 2 Input transformer 2A Transformer 3 with load tap changer 3 Diode converter 4 Smoothing capacitor 5 Inverter 6 AC motor 7 Voltage detector 8 Current detector 9 Control block 10 Protection block 11, 11A, 11B, 11C DC voltage Monitor 12 Tap switching controller 101 Overvoltage threshold setting device 102 Comparator 103 Timer 104 Timer / counter 105 RMS current detector

Claims (7)

A diode converter that converts alternating current supplied from an alternating current power source through a tap switching transformer when loaded to direct current;
An inverter that converts the direct current output of the diode converter into alternating current;
A DC voltage monitor for monitoring a DC voltage to be input to the inverter;
The DC voltage monitor is
When the DC voltage is equal to or higher than a preset threshold voltage and its duration exceeds a preset first time width,
An inverter device characterized by outputting an alarm signal and switching the tap of the on-load tap switching transformer to a low voltage side . A diode converter that converts alternating current supplied from an alternating current power source into direct current; and
An inverter that converts the direct current output of the diode converter into alternating current;
A DC voltage monitor for monitoring a DC voltage to be input to the inverter;
Current detecting means for detecting an effective value of the output current of the inverter;
With
The DC voltage monitor is
When the DC voltage is equal to or higher than a preset threshold voltage and its duration exceeds a preset first time width,
An inverter device that outputs an alarm signal and corrects the threshold voltage according to a detection value of the current detection means. Preset a second time width longer than the first time width;
When the duration exceeds the second time width,
The inverter apparatus according to claim 1 or claim 2, characterized in that so as to trip stop the inverter. Preset a second time width longer than the first time width;
When the duration exceeds the first time width, and when the integrated value exceeds the second time width,
The inverter device according to claim 1, wherein the inverter is trip-stopped. The threshold voltage,
5. The inverter device according to claim 1, wherein a failure rate of a semiconductor switching element constituting the inverter is selected to be 10 FIT or more and 100 FIT or less. A diode converter that converts alternating current supplied from an alternating current power source through a tap switching transformer when loaded to direct current;
Inverter that converts the DC output of this diode converter into AC
In an inverter device comprising:
When the DC voltage to be input to the inverter is equal to or higher than a preset threshold voltage and its duration exceeds a preset first time width,
An overvoltage protection method for an inverter device, characterized by outputting an alarm signal and switching the tap of the on-load tap switching transformer to a low voltage side. A diode converter that converts alternating current supplied from an alternating current power source into direct current; and
An inverter that converts the direct current output of the diode converter into alternating current;
A DC voltage monitor for monitoring a DC voltage to be input to the inverter ;
In an inverter device comprising current detection means for detecting an effective value of the output current of the inverter,
When the DC voltage is equal to or higher than a preset threshold voltage and its duration exceeds a preset first time width,
An inverter device overvoltage protection method characterized by outputting an alarm signal and correcting the threshold voltage in accordance with a detection value of the current detection means .

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