JPWO2018211991A1 - Electronic component mounting substrate and method of manufacturing the same - Google Patents

Abstract

The substrate has an insulating layer 11 and a conductor 12 provided on the insulating layer 11. At least a part of the bottom surface and the side surface of the conductor 12 is located on the back surface side with respect to the front surface of the insulating layer 11.

Description

  The present disclosure relates to an electronic component mounting substrate and a method for manufacturing the same.

  With the high-density mounting of electronic devices, electronic components mounting substrates have also been required to have higher density, smaller size, thinner, and multilayered conductors. When the conductor is mounted at a high density or miniaturized, if the adhesion between the insulating layer and the conductor formed on the insulating layer is not sufficient, the adhesion between the insulating layer and the conductor becomes insufficient. Further, when the conductor is multilayered in the insulating layer, the adhesion between the insulating layer and the conductor becomes insufficient.

  When a semi-additive method is used to form a conductor, a technique has been proposed in which the insulating layer is heated to improve the adhesion between the insulating layer and the conductor (for example, see Patent Document 1). ).

JP 2012-169600 A

  However, if an attempt is made to make a thin printed circuit board, or if an attempt is made to adhere the front surface of the insulating layer to the conductor by a semi-additive method or the like, the adhesion between the insulating layer and the conductor cannot be sufficiently ensured. Alternatively, when the insulating layer is thin, the peeling of the conductor is likely to occur. When the adhesion between the insulating layer and the conductor is insufficient, there is a problem that it is impossible to manufacture a printed circuit board in the first place, or even if it can be manufactured, deterioration of the manufacturing yield cannot be avoided.

  Then, in order to solve the said subject, this indication aims at improving the adhesiveness of the board for electronic component mounting.

  In order to achieve the above object, a conductor formed on the insulating layer is embedded in the insulating layer. In the case where one or more layers of the combination of the insulating layer and the conductor are formed on the insulating layer, at least one of the conductors included in at least one of the combination layers is embedded in the direction of the insulating layer. .

  The electronic component mounting substrate described in the present disclosure is a substrate on which an electronic component can be mounted, as long as a conductor is formed on the insulating layer. In the present disclosure, a substrate on which a conductor is formed on an insulating layer is referred to as an electronic component mounting substrate. Further, the present disclosure includes an electronic component, an electronic device, and a mounting apparatus on which the electronic component mounting board according to the present disclosure is mounted. For example, a mounting apparatus according to the present disclosure is an arbitrary apparatus including the electronic component mounting board according to the present disclosure and an electronic component that performs a predetermined process using the electronic component mounting board. As described above, the present disclosure can be applied to any electronic component, electronic device, and apparatus that operate using the electronic component mounting board.

  According to the present disclosure, at least a part of the conductor is embedded in the insulating layer or the insulating layer, so that the adhesiveness of the electronic component mounting substrate, that is, the peel strength can be improved. As a result, the present disclosure prevents a decrease in the yield rate at the time of manufacturing the electronic component mounting substrate, improves the durability of the electronic component mounting substrate, and comprehensively improves the quality of the electronic component mounting substrate. Can be. Further, the present disclosure can improve the reliability of an electronic component, an electronic device, and an apparatus that operate using the wiring board of the present disclosure.

FIG. 4 is a diagram illustrating a conductor forming step of forming a conductor on an insulating layer. FIG. 4 is a diagram illustrating a conductor forming step of forming a conductor on an insulating layer. FIG. 3 is a diagram illustrating a pressing step of pressing or sinking a conductor into an insulating layer. It is a figure explaining a heating procedure. It is a figure explaining a heating procedure. It is a figure explaining a heating procedure. It is a figure explaining a heating procedure. It is a figure explaining a heating procedure. It is a figure explaining the schematic diagram at the time of heating. It is a figure explaining the state after the pushing process of the conductor. It is a figure explaining the state after the pushing process of the conductor. FIG. 3 is a diagram illustrating a pressing step of pressing or sinking a conductor into an insulating layer. FIG. 3 is a diagram illustrating a pressing step of pressing or sinking a conductor into an insulating layer. It is a figure explaining the state after the pushing process of the conductor. It is a figure explaining the state after the pushing process of the conductor. It is a figure explaining a VIA formation process. It is sectional drawing which shows an example of the electronic component mounting board | substrate which concerns on 2nd Embodiment. It is sectional drawing which shows an example of the boundary part of an electroless plating layer and a conductor. It is an enlarged view showing the 1st example of unevenness. It is an enlarged view showing the 2nd example of unevenness. An example of the regularity of irregularities on the front surface of the insulating layer is shown. It is explanatory drawing of the manufacturing method of the board for electronic component mounting which concerns on 3rd Embodiment. It is sectional drawing which showed an example of the method of manufacturing the conductor which has a conductor recessed part. It is sectional drawing which showed an example of the method of manufacturing the conductor which has a conductor convex part.

  Embodiments of the present disclosure will be described with reference to the accompanying drawings. The embodiments described below are examples of the present disclosure, and the present disclosure is not limited to the following embodiments. In the specification and the drawings, components having the same reference numerals indicate the same components.

(First embodiment)
In this embodiment, a case where the insulator layer is an insulating layer will be described. A method for manufacturing an electronic component mounting board according to the present disclosure includes a conductor forming step and a pressing step described below in order. Accordingly, the present disclosure can improve the adhesion between the insulating layer and the conductor, that is, the peel strength.

  1A to 1C show a conductor forming step of forming a conductor on an insulating layer according to the present disclosure. 1A to 1C, 11 denotes an insulating layer, 12 denotes a conductor, 121 denotes a metal foil, and 122 denotes a metal plating. 1 is the thickness direction of the substrate, the upper surface in FIG. 1 is the front surface, and the lower surface in FIG. 1 is the back surface.

  The insulating layer 11 is an insulator that can be used for a printed board. The material used for the insulating layer 11 is, for example, a resin, but is not limited to this, and may include an arbitrary material such as glass or ceramic having an insulating property. The insulating layer 11 may be a mixture of two or more insulating substances. For example, the insulating layer 11 may include a fibrous or granular insulator.

  The insulating layer 11 may be an insulator obtained by mixing a base material with a resin. As the resin, a heat-curable resin or an ultraviolet-curable resin is preferable. A thermoplastic resin may be used if it has a certain heat resistance. Examples of the thermosetting resin include a polyimide resin, an epoxy resin, a phenol resin, and a cyanate resin. The thermoplastic resin may have a heat deformation temperature of 50 ° C. or higher. The higher the deformation temperature, the better. Examples of the substrate include glass fibers, ceramic particles, and cellulose fibers. Natural materials such as spider web fibers may be used. The substrate is not limited to these. Alternatively, a prepreg, which is impregnated with the above resin and semi-cured by impregnating the above resin, may be laminated, and heated and pressed to form an insulating layer. The same applies to any of the following embodiments.

  The conductor 12 is a conductor layer formed of any material that can be used for a conductor of a printed circuit board, and includes a metal foil, a metal plating, and a rolled plate. The material of the metal foil 121 and the metal plating 122 constituting the conductor 12 is any conductive metal, alloy or paste. Alternatively, any material other than metals such as carbon and ceramics can be used as part or all of the conductor 12 as long as it has conductivity. Examples of the metal applied to the conductor 12 include, but are not limited to, copper, gold, silver, aluminum, nickel, and alloys and pastes containing most of these metals by mass%. The same applies to any of the following embodiments.

  Metal plating is performed on the metal foil 121 of the insulating layer 11 (FIG. 1A) on which the metal foil 121 is stretched (FIG. 1B). Next, a patterned conductor 12 is formed on the insulating layer 11 by a known panel plating method or pattern plating method (FIG. 1C). The conductor 12 thus formed includes a metal foil and a metal plating layer plated on the metal foil.

  FIGS. 2A to 2D show another conductor forming step of forming a conductor on the insulating layer according to the present disclosure. This manufacturing method is known as a semi-additive method. 2A to 2D, 11 denotes an insulating layer, 12 denotes a conductor, and 13 denotes a pattern resist.

  Examples of the material of the pattern resist 13 include a photosensitive dry film, a liquid resist, and an ED resist, but are not limited thereto. The same applies to any of the following embodiments. These materials include a photo-curing type and a photo-dissolving type.

  A pattern resist is applied to the insulating layer 11 (FIG. 2 (a)), and the pattern resist other than a portion which will eventually become a conductor is removed (FIG. 2 (b)). A conductor is grown on the remaining portion other than the pattern resist 13 by electroless plating or the like (FIG. 2C). The pattern resist 13 is removed, and the conductor 12 is left. At this time, as shown in FIG. 17 described later, in a cross section perpendicular to the insulating layer 11, the corner 12E of the upper surface (top surface) of the conductor 12 is rounded. In this conductor forming step, a patterned conductor 12 is formed on the insulating layer 11. The conductor forming step is not limited to the method described here.

  FIG. 3A to FIG. 3B show a pushing step of pushing the conductor of the present disclosure into the insulating layer. 3A to 3B, reference numeral 11 denotes an insulating layer, and reference numeral 12 denotes a conductor. When the conductor 12 (FIG. 3A) formed on the front surface of the insulating layer 11 is mechanically pressed into the insulating layer 11, a part of the conductor 12 is 3B is an example of an electronic component mounting substrate according to the present disclosure, and the operation of mechanically pushing in is performed using, for example, a press having a flat press surface. Then, all or a part of the conductor 12 formed on the front surface of the insulating layer 11 is pressed into the insulating layer 11.

  By pressing the conductor 12 into the insulating layer 11, not only the bottom surface of the conductor 12 but also at least a part of the side surface of the conductor 12 adheres to the insulating layer 11, and the peel strength between the insulating layer 11 and the conductor 12 is improved. .

  The method of realizing the electronic component mounting substrate in which the conductor 12 is embedded in the insulating layer 11 is not limited to the mechanical embedding of the conductor 12 in the insulating layer 11. For example, in the pressing step, both or one of the conductor 12 and the insulating layer 11 may be heated to sink the conductor 12 into the insulating layer 11. Thereby, the conductor 12 can be embedded in the insulating layer 11 without applying a force to the conductor 12.

  At this time, the conductor 12 does not have to be pushed into the insulating layer 11, but the conductor 12 may be pushed into the insulating layer 11 with a small force. Thereby, the position of the upper surface, which is the top surface of conductor 12, can be easily controlled. As described above, the pressing in the present disclosure includes the pressing with a weak force. Hereinafter, as an example of the pushing step, an example will be described in which in the pushing step, in addition to the pushing procedure of mechanically pushing the conductor 12 into the insulating layer 11, a heating procedure of heating both or any of the conductor 12 and the insulating layer 11 is described. .

  In the pushing step, when the conductor 12 is mechanically pushed into the insulating layer 11, both or any of the conductor 12 and the insulating layer 11 may be heated. This is effective when the insulating layer is too hard or when it is desired to further improve the peel strength. Heating is realized by pressing a heater, irradiating LED light or infrared light, or blowing hot air. The conductor 12 may be mechanically pushed in by a panel heated by a heater.

  The heating procedure is shown in FIG. 4, FIG. 5, FIG. 6, FIG. 7, and FIG. 4, 5, 6, 7, and 8, reference numeral 11 denotes an insulating layer, and reference numeral 12 denotes a conductor. 4, 5, 6, 7, and 8, (a), (b), and (c) indicate the order. The procedure of heating the heat may be a procedure of first heating (FIG. 4B) and then mechanically pushing in while heating (FIG. 4C). First, heating (FIG. 5 (b)), heating may be stopped, and mechanical pressing (FIG. 5 (c)) may be performed. Heating and mechanical pushing may be simultaneously performed (FIG. 6B). First, it may be a procedure of mechanically pushing (FIG. 7 (b)) and heating while mechanically pushing (FIG. 7 (c)). First, it may be a procedure of mechanically pushing (FIG. 8 (b)), stopping the mechanical pushing and heating (FIG. 8 (c)).

  FIG. 9A is a schematic diagram when heating is performed. Since the conductor 12 is made of metal and the insulating layer 11 is made of resin, the expansion coefficient of the conductor 12 is higher than that of the insulating layer 11. Therefore, by heating at an appropriate temperature, the conductor 12 adheres to the insulating layer 11 and an anchor effect is obtained. Thereafter, even if the temperature is gradually decreased (FIG. 9B), the degree of adhesion between the conductor 12 and the insulating layer 11 is higher than before the heating. Therefore, the peel strength between the insulating layer 11 and the conductor 12 is improved.

  The state after the conductor is pushed in the pushing step will be described with reference to FIGS. 10 (a), 10 (b), 11 (a), 11 (b), and 11 (c). 10 (a), 10 (b), 11 (a), 11 (b), and 11 (c) are examples of the electronic component mounting board of the present disclosure. 10 (a), 10 (b), 11 (a), 11 (b), and 11 (c), reference numeral 11 denotes an insulating layer, and reference numeral 12 denotes a conductor. In these descriptions, as shown in FIG. 10A, in the conductor 12, the side of the insulating layer 11 (the side closer to the insulating layer 11) is a bottom surface, and the side opposite to the bottom surface (the side far from the insulating layer) is the upper surface. (Top surface), the side sandwiched between the top surface and the bottom surface is referred to as a side surface, the side of the insulating layer 11 on which the conductor 12 is placed is referred to as a front surface, and the opposite surface is referred to as a back surface.

  The conductor 12 may be pushed in until a part of the bottom and side surfaces of the conductor 12 is lower than the front surface of the insulating layer 11 (FIG. 10A). Since the entire bottom surface and a part of the side surface of the conductor 12 are in close contact with the insulating layer 11, the peel strength between the insulating layer 11 and the conductor 12 is improved. Further, the conductor 12 may be pushed down to a position where the upper surface of the conductor 12 is flush with the front surface of the insulating layer 11 (FIG. 10B). Since the entire bottom surface and the entire side surface of the conductor 12 are in close contact with the insulating layer 11, the peel strength between the insulating layer 11 and the conductor 12 is further improved.

  FIG. 10A shows an example in which both sides arranged on both sides of the bottom surface are embedded in the insulating layer 11, but the present disclosure is not limited to this, and is arranged, for example, on both sides of the bottom surface. Only one of the side surfaces may be embedded in the insulating layer 11. In FIG. 10A, the upper surface of the conductor 12 extends in the x-axis direction, but the present disclosure is not limited to this, and the upper surface of the conductor 12 may be inclined with respect to the x-axis direction.

  Further, FIGS. 10A and 10B show an example in which the cross-sectional shape of the conductor 12 is square, but the cross-sectional shape of the conductor 12 according to the present disclosure is arbitrary. For example, the upper surface of the conductor 12 may be curved, and the boundary between the side surface and the upper surface may form a continuous curve.

  The conductor 12 may be pushed in not only at the bottom and side surfaces of the conductor 12 but also until the top surface is lower than the front surface of the insulating layer 11 (FIGS. 11 (a), 11 (b), 11 (b)). c)). In FIG. 11A, the conductor 12 is pushed in until the upper surface of the conductor 12 is lower than the front surface of the insulating layer 11, but the upper surface of the conductor 12 is exposed. Since the entire bottom surface and the entire side surface of the conductor 12 are in close contact with the insulating layer 11, the peel strength between the insulating layer 11 and the conductor 12 is further improved. In FIG. 11B, the conductor 12 is pushed until the upper surface of the conductor 12 is lower than the front surface of the insulating layer 11, but a part of the upper surface of the conductor 12 is exposed. Since the entire bottom surface, the entire side surface, and a part of the upper surface of the conductor 12 are in close contact with the insulating layer 11, the peel strength between the insulating layer 11 and the conductor 12 is further improved. In FIG. 11C, the conductor 12 is pushed down until the upper surface of the conductor 12 is lower than the front surface of the insulating layer 11, and the conductor 12 is buried in the insulating layer 11 up to the upper surface of the conductor 12. Since the entire bottom surface, the entire side surface, and the entire top surface of the conductor 12 are in close contact with the insulating layer 11, the peel strength between the insulating layer 11 and the conductor 12 is further improved.

  In FIGS. 10A, 10B, and 11A, three surfaces of the conductor 12 are in close contact with the insulating layer 11. In the case where the same structure is used for the yz plane, the five surfaces of the conductor 12 are in close contact with the insulating layer 11. As described above, in addition to the bottom surface of the conductor 12 extending in the x-axis direction, part or all of the side surface of the conductor 12 extending in the y-axis direction is in close contact with the insulating layer 11, so that the x and z-axis directions applied to the conductor 12 are applied. , The peel strength can be increased.

  In FIGS. 11B and 11C, the four surfaces of the conductor 12 are in close contact with the insulating layer 11. In the case where the same structure is used for the yz plane, six surfaces of the conductor 12 are in close contact with the insulating layer 11. As described above, in addition to the bottom surface of the conductor 12 extending in the x-axis direction, part or all of the side surface of the conductor 12 extending in the y-axis direction, and part or all of the upper surface of the conductor 12 extending in the x-axis direction, Because of the close contact with the conductor 11, the peel strength can be increased with respect to the load applied to the conductor 12 in the x, y, and z-axis directions.

  Although FIGS. 10 and 11 show an example in which the bottom surface of the conductor 12 is in close contact with the insulating layer 11, the present disclosure is not limited to this. For example, in the present disclosure, in FIG. 10A, FIG. 10B, and FIG. 11A, two or more surfaces of the conductor 12 where a part or the whole of the bottom surface of the conductor 12 is exposed on the back surface of the insulating layer 11 are formed. A form in which it is in close contact with the insulating layer 11 is also included. In the case where the yz plane has a similar structure, the four surfaces of the conductor 12 are in close contact with the insulating layer 11. In this case, since part or all of the side surface of the conductor 12 spreading in the y-axis direction is in close contact with the insulating layer 11, the peel strength can be increased with respect to the load applied to the conductor 12 in the x and z-axis directions.

  Further, in FIG. 11B, a form in which the entire bottom surface of the conductor 12 is exposed to the back surface of the insulating layer 11 and the three surfaces of the conductor 12 are in close contact with the insulating layer 11 is also included. In the case where the same structure is used for the yz plane, the five surfaces of the conductor 12 are in close contact with the insulating layer 11. In this case, a part of the upper surface of the conductor 12 expanding in the x-axis direction and a part or all of the side surface of the conductor 12 expanding in the y-axis direction are in close contact with the insulating layer 11, so that x, y, The peel strength can be increased with respect to the load in the z-axis direction.

  Further, in FIG. 11B, a mode in which a part of the bottom surface of the conductor 12 is exposed on the back surface of the insulating layer 11 and the four surfaces of the conductor 12 are in close contact with the insulating layer 11 is also included. In the case where the same structure is used for the yz plane, six surfaces of the conductor 12 are in close contact with the insulating layer 11. In this case, a part of the upper surface of the conductor 12 extending in the x-axis direction, all of the side surfaces of the conductor 12 expanding in the y-axis direction, and a part of the bottom surface of the conductor 12 expanding in the x-axis direction are in close contact with the insulating layer 11. The peel strength can be increased with respect to the load applied to the conductor 12 in the x, y, and z axis directions.

  Next, an example in which the electronic component mounting substrate is a multilayer substrate in which a combination layer of an insulating layer and a conductor is formed on the insulating layer will be described. In the following example, the insulating layer is an insulating layer included in at least one combination of layers, and at least a part of the conductor included in at least one combination of layers is embedded in the insulating layer. Specifically, an insulating layer, a conductor formed on the insulating layer, an upper layer of the conductor and the insulator substrate, a combination of one or more sets of conductors formed on the insulating layer and the insulating layer, A description will be given of an electronic component mounting substrate in which at least one of the conductors is embedded in the insulating layer or the insulating layer.

  12 (a), 12 (b), 12 (c), 13 (a), 13 (b), and 13 (c), 11a is a laminated insulating layer, 12 is a conductor, and 14 is a laminated layer. It is an insulating layer. 12 and 13, as an example of a combination of the laminated insulating layer 14 and the conductor 12, a combination of the laminated insulating layer 14-1 and the conductor 12-1 and a combination of the laminated insulating layer 14-2 and the conductor 12-2 An example is shown in which a layer of a combination of the above and a layer of a combination of the laminated insulating layer 14-3 and the conductor 12-3 is formed. The laminated insulating layers 11a and 14 constitute an insulating layer.

  In the conductor formation step or the second conductor formation step, a conductor is formed on the laminated insulating layer 11a or on each laminated insulating layer 14 (FIGS. 12A, 12B, 12C, 13 (a), 13 (b) and 13 (c)). In order to form a conductor in the combination layer, the conductor 12 is formed on the laminated insulating layer 11a (conductor forming step). Further, a laminated insulating layer 14 is formed on the conductor 12 and the laminated insulating layer 11a, and a conductor is further formed on the laminated insulating layer 14 (second conductor forming step). The second conductor forming step is repeated the required number of times.

  The material of the laminated insulating layer 14 may be the same as that applicable to the laminated insulating layer 11a. The same applies to any of the following embodiments.

  In the pushing step of pushing or sinking the conductor 12 into the uppermost laminated insulating layer 14, after forming the uppermost laminated insulating layer 14 (FIG. 12B), the uppermost conductor 12 is transferred to the laminated insulating layer 14. Push or sink (FIG. 12 (c)).

  In the pushing step of pushing or sinking the conductor 12 into the laminated insulating layer 11a or the pushing step of pushing or sinking the conductor 12 into the intermediate laminated insulating layer 14, after the conductor 12 is formed on the laminated insulating layer 11a, After forming the insulating layer 14 to form the conductor 12, the conductor 12 is mechanically pressed into the laminated insulating layer 11a or the laminated insulating layer 14 (FIG. 13A). In the last second conductor forming step, the conductor 12 is formed on the uppermost laminated insulating layer 14 (FIG. 13B), and in the pressing step, the uppermost conductor 12 is formed on the uppermost laminated insulating layer 14. Mechanically push or sink (FIG. 13 (c)).

  In order to form the conductor 12 in the conductor forming step or the second conductor forming step, the steps shown in FIGS. 1A to 1C or the steps shown in FIGS. 2A to 2D are performed. Can be applied.

  In the pushing step, when the conductor 12 is pushed or sunk into the laminated insulating layer 11a or the laminated insulating layer 14, at least one of the laminated insulating layer 11a, the laminated insulating layer 14, and the conductor 12 may be heated. Heating can be realized by pressing a heater, irradiating infrared rays, or blowing hot air. The conductor 12 may be mechanically pushed in by a panel heated by a heater. The same heating procedure as that shown in FIGS. 4, 5, 6, 7, and 8 is possible.

  In the electronic component mounting board of the present disclosure, the laminated insulating layer 11a and the laminated insulating layer 14 may be integrated. Alternatively, when there are a plurality of adjacent stacked insulating layers 14, the adjacent stacked insulating layers 14 may be integrated.

  In the pushing step, the state after the conductor 12 is pushed into the laminated insulating layer 14 is the same as in FIGS. 10A, 10B, 11A, 11B, and 11C. is there. The state after the conductor 12 has been pushed into the laminated insulating layer 14 will be described with reference to FIGS. 14 (a), 14 (b), 15 (a), 15 (b), and 15 (c). 14 (a), 14 (b), 15 (a), 15 (b), and 15 (c) are examples of the electronic component mounting board of the present disclosure. 14 (a), 14 (b), 15 (a), 15 (b), and 15 (c), reference numeral 12 denotes a conductor, and reference numeral 14 denotes a laminated insulating layer. In these descriptions, as shown in FIG. 14A, in the conductor 12, the side of the laminated insulating layer 11a (the side close to the laminated insulating layer 11a) is the bottom surface, and the side facing the bottom surface (the side far from the laminated insulating layer 11a). ) Is referred to as an upper surface, and a side sandwiched between the upper surface and the bottom surface is referred to as a side surface.

  The conductor 12 may be pushed in until the bottom surface and a part of the side surface of the conductor 12 are lower than the upper surface of the laminated insulating layer 14 (FIG. 14A). Since the entire bottom surface and a part of the side surface of the conductor 12 are in close contact with the laminated insulating layer 14, the peel strength between the laminated insulating layer 14 and the conductor 12 is improved. Alternatively, the conductor 12 may be pushed to a position where the upper surface of the conductor 12 is flush with the upper surface of the laminated insulating layer 14 (FIG. 14B). Since the entire bottom surface and the entire side surface of the conductor 12 are in close contact with the laminated insulating layer 14, the peel strength between the laminated insulating layer 14 and the conductor 12 is further improved.

  The conductor 12 may be pushed not only at the bottom and side surfaces of the conductor 12 but also until the top surface is lower than the top surface of the laminated insulating layer 14 (FIGS. 15A, 15B, and 15C). ). In FIG. 15A, the conductor 12 is pushed until the upper surface of the conductor 12 is lower than the upper surface of the laminated insulating layer 14, but the upper surface of the conductor 12 is exposed. Since the entire bottom surface and the entire side surface of the conductor 12 are in close contact with the laminated insulating layer 14, the peel strength between the laminated insulating layer 14 and the conductor 12 is further improved. In FIG. 15B, the conductor 12 is pushed until the upper surface of the conductor 12 is lower than the upper surface of the laminated insulating layer 14, but a part of the upper surface of the conductor 12 is exposed. Since the entire bottom surface, the entire side surface, and a part of the top surface of the conductor 12 are in close contact with the laminated insulating layer 14, the peel strength between the laminated insulating layer 14 and the conductor 12 is further improved. In FIG. 15C, the conductor 12 is pushed down until the upper surface of the conductor 12 is lower than the upper surface of the laminated insulating layer 14, and the conductor 12 is buried in the laminated insulating layer 14 up to the upper surface of the conductor 12. Since all of the bottom surface, all of the side surfaces, and all of the top surface of the conductor 12 are in close contact with the laminated insulating layer 14, the peel strength between the laminated insulating layer 14 and the conductor 12 is further improved.

  By pushing or sinking the uppermost conductor 12 into the laminated insulating layer 14, the peel strength between the laminated insulating layer 14 and the conductor 12 is improved in the electronic component mounting board as a final product. By pushing or sinking a conductor other than the uppermost conductor 12 into the laminated insulating layer 11a or the laminated insulating layer 14, in the manufacturing process of the electronic component mounting board, the conductor 12 and the laminated insulating layer 11a or the laminated insulating layer 14 The peel strength during the manufacturing process can be improved, and peeling of the conductor during the manufacturing process can be prevented.

  The conductor forming step and the second conductor forming step include a pressing step. The indentation step may include a VIA forming step of forming a VIA, which is an example of a conductor part, for electrically connecting the conductors 12 formed in different layers among the conductors 12 formed in the combination layer. . After the VIA forming step, the conductor 12 is pushed or sunk into the laminated insulating layer 14.

  A VIA, which is an example of a conductor portion that electrically connects the conductors 12 formed in different layers among the conductors 12 formed in a combination of layers in the laminated insulating layer 14, will be described. 16A, 16B, 16C, and 16D show a VIA forming process. 16 (a), 16 (b), 16 (c), and 16 (d), 11a is a laminated insulating layer, 12 is a conductor, 14 is a laminated insulating layer, and 15 is a via.

  In the conductor forming step and the second conductor forming step, the conductor 12, the laminated insulating layer 14, and the conductor 12 are sequentially formed on the laminated insulating layer 11a (FIGS. 16A and 16B). The conductors 12 formed in different layers are electrically connected to each other by the via 15 (FIG. 16C). Thereafter, when the conductor 12 is mechanically pushed or sunk into the laminated insulating layer 14, the VIA 15 is compressed, the anchor effect is enhanced, and the peel strength between the laminated insulating layer 14 and the conductor 12 is improved. Here, the VIA 15 for electrically connecting the conductors 12 on the laminated insulating layer 11a and the conductors 12 on the laminated insulating layer 14 has been described, but the conductor 12 on the laminated insulating layer 14 and the conductor 12 on the laminated insulating layer 14 are described. The same applies to the vias 15 that electrically connect each other. The same applies to the VIA 15 that electrically connects the uppermost conductor 12 and the lower conductors 12 to each other.

  In the above description, after the VIA forming step, the conductor 12 is mechanically pressed or sunk into the laminated insulating layer 11a or the laminated insulating layer 14, but the conductor 12 is mechanically pressed into the laminated insulating layer 11a or the laminated insulating layer 14. Alternatively, it goes without saying that the VIA 15 may be formed after being sunk.

  In each of the above embodiments, the description has been given while showing one side of the laminated insulating layer. However, not only the application to a single-sided substrate, but also the case of a double-sided substrate or a multilayer substrate, the technology of the present disclosure is applied to both sides of the laminated insulating layer. Can be applied. In the case of a double-sided substrate or a multilayer substrate, the upper layer or upper surface in this embodiment may be regarded as a layer or surface farther from the laminated insulating layer.

  In the case of a multi-layer substrate, any of the conductors on the laminated insulating layer, the outermost layer conductor farthest from the laminated insulating layer, and the conductor of any layer between the laminated insulating layer and the outermost layer, may be any one of the laminated insulating layers or It may be pressed or sink into the laminated insulating layer. For example, the outermost conductor is pushed or sunk, and the middle conductor between the laminated insulating layer and the outermost layer is pushed or sunk, or the middle between the laminated insulating layer and the outermost layer. Either the conductor of the layer is pressed or sunken.

  In the case of a double-sided board or a multilayer board, when pushing or sinking the conductors on both sides, pressure may be applied to the conductors from both sides simultaneously to push or sink the conductors.

  In addition, when making thin printed circuit boards, copper foil is easily damaged and there is a current situation where copper foil with a carrier has to be used.This current situation is mainly due to the high price of copper foil with a carrier, Another problem is that the defect rate is high, and thirdly, there is a high demand for control of the manufacturing process. According to the present disclosure, a single-layer printed board or a multilayer printed board having a small board thickness can be manufactured without using a copper foil with a carrier. Further, a build-up method by forming a VIA or a through-hole method by forming a through-hole can also be used in the technology of the present disclosure.

(Second embodiment)
In the first embodiment, an adhesive layer (not shown) having high adhesiveness to the conductor 12 may be provided on the front surface of the insulating layer 11 that contacts the conductor 12. The adhesion layer is an arbitrary insulating material having high adhesion to the insulator layer 11 and the conductor 12. In this case, the method for manufacturing an electronic component mounting substrate according to the present disclosure further includes an adhesion layer forming step before the conductor forming step.

  In the adhesion layer forming step, an adhesion layer is formed on the insulating layer 11. In the conductor forming step, the conductor 12 is formed on the upper surface of the adhesion layer. The adhesion layer is formed on at least a part of a region on the insulating layer 11 where the conductor 12 is arranged. The adhesion layer is preferably formed on the entire region where the conductor 12 is arranged, and may be formed on the entire insulating layer 11.

  The adhesion layer is an arbitrary substance having higher adhesion to the conductor 12 than the insulating layer 11. The adhesion layer is disposed at least partially between the insulating layer 11 and the conductor 12. If the adhesion layer is disposed at least in part between the insulating layer 11 and the conductor 12, the adhesion strength between the insulating layer 11 and the conductor 12 can be increased. It may be arranged in an area. The adhesion layer contains a substance that increases the adhesion strength between the insulating layer 11 and the conductor 12. The substance for increasing the adhesion strength may be one using any of chemical interaction, physical interaction, and mechanical bonding. As the mechanical coupling, for example, the unevenness described in a second embodiment described later can be exemplified.

  A substance used as an adhesive or the like may be contained in a part or the entirety of the adhesion layer as the substance that increases the adhesion strength by a chemical interaction. For example, as the resin material of the adhesive layer made of a part or all of the insulating material, a polyimide resin, an epoxy resin, a phenol resin, a cyanate resin, or the like, or an inorganic material can be used to adhere to both the conductor 12 and the insulating layer 11. Any substance having a high property may be used. Inorganic substances such as metal oxides, metal nitrides, metal carbides, and redox agents may be contained partially or entirely.

  As a substance for increasing the adhesive strength by physical interaction, at least one of a reducing agent having a reducing action and an oxidizing agent having an oxidizing action may be contained in a part or the whole of the adhesive layer. The reducing agent has a function of reducing a substance contained in at least one of the conductor 12, the insulating layer 11, and the adhesion layer. The oxidizing agent has an action of oxidizing a substance contained in at least one of the conductor 12, the insulating layer 11, and the adhesion layer. The reducing agent and the oxidizing agent may react alone or in combination with the conductor 12, the insulating layer 11, and the adhesion layer, as well as the surrounding environment such as air and water or other catalysts.

  The reducing agent may be contained in the entire adhesion layer, may be contained only in the front surface on the conductor 12 side of the adhesion layer, or may be contained only in the front surface on the insulating layer 11 side. It may be. The same applies to the oxidizing agent. For example, a reducing agent may be contained in the front surface of the contact layer on the conductor 12 side, and an oxidizing agent may be contained in the front surface of the contact layer on the insulating layer 11 side. The ratio of the reducing agent contained in the adhesion layer is arbitrary, and may be a small amount as long as it has a reducing property. The same applies to the oxidizing agent.

  The reducing agent contained on the front surface of the adhesion layer on the insulating layer 11 side may be different from or the same as the reducing agent contained on the front surface of the adhesion layer on the conductor 12 side. Is also good. As a different example, for example, a configuration in which a reducing agent suitable for reducing the conductor 12 is included on the conductor 12 side of the adhesion layer and a reducing agent suitable for the insulating layer 11 is included on the insulating layer 11 side of the adhesion layer is also available. Can be adopted. As the same example, for example, if a substance that functions as a reducing agent is included between the insulating layer 11 and the conductor 12, the adhesion layer according to the present disclosure will be provided. The same applies to the oxidizing agent.

  In the example of the multilayer substrate shown in FIGS. 12 and 13, an adhesion layer can be provided on the combined layers. For example, an adhesion layer (not shown) is provided between the insulating layer 11 and the conductor 12 formed thereon, and between the insulating layer 14-1 and the conductor 12-1 that constitute a combined layer. Further, an adhesion layer (not shown) may be provided between the conductor 12-1 formed on the insulating layer 14-1 constituting the combination layer and the insulating layer 14-2 formed thereon. Good. In this case, instead of the combination layer of the insulating layer 14-2 and the conductor 12-2, a combination layer of the adhesion layer and the conductor 12-2 may be formed.

  The method for manufacturing an electronic component mounting board according to the present embodiment may further include the pressing step described in the first embodiment after the conductor forming step. Thereby, the peel strength can be further improved.

(Third embodiment)
FIG. 17 illustrates an example of an electronic component mounting board according to an embodiment of the present disclosure. In the electronic component mounting board according to the present embodiment, the conductor 12 is formed on the insulating layer 11. The conductor 12 includes an electroless plating layer 21 in the lowermost layer on the insulating layer 11 side. For example, in the conductor 12, an electroless plating layer 21 and an electrolytic plating layer 22 are sequentially stacked from the lowermost layer on the insulating layer 11 side. Since the insulating layer 11 and the electroless plating layer 21 are in contact with each other, the adhesion strength between the insulating layer 11 and the conductor 12 can be increased.

  The electroless plating layer 21 is an arbitrary conductor formed by an arbitrary method other than the electrolytic plating. FIG. 17 shows an example in which the electrolytic plating layer 22 is laminated on the electroless plating layer 21, but the entire conductor 12 in which the electrolytic plating layer 22 is not arranged is formed by the electroless plating layer 21. There may be some forms.

  FIG. 18 shows an enlarged view of a boundary portion between the insulating layer 11 and the conductor 12. FIG. 18B shows a cross-sectional shape at the front surface 11U of the insulating layer 11, and FIG. 18A shows a cross-sectional shape taken along the line A-A '. The insulating layer 11 has irregularities on the front surface 11U on the conductor 12 side. The irregularities can be concave or convex or both.

  In the present disclosure, unevenness is formed on the front surface 11U of the insulating layer 11, and the electroless plating layer 21 is formed thereon. Therefore, as shown in FIG. 19, the electroless plating layer 21 grows from below the conductor 12 disposed on the insulating layer 11 side, and directly contacts the front surface 11U of the insulating layer 11. Here, the protrusions indicated by reference numerals 112-6 and 112-9 may or may not be formed.

  When a convex shape is formed on the conductor 12 in order to obtain an anchor effect, a particulate substance such as Ni or Fe for forming the convex shape is formed between the front surface U of the adhesion layer and the electroless plating layer 21. It is included. On the other hand, according to the present disclosure, since irregularities are formed on the front surface of the adhesion layer, the conductor 12 does not include a particulate material for forming a convex shape. For this reason, the content of the substance different from the electroless plating layer 21 in the lowermost layer of the conductor 12 is 30% or less. For example, in the lowermost layer of the conductor 12 of the present disclosure, the electroless plating layer 21 is formed of a single substance. Here, the “single substance” includes a metal and an alloy. In addition, between the conductor protrusions from the conductor 12 side to the contact layer side of the present disclosure, a conductive portion in the contact layer, such as a tunnel 113 shown in FIG. 22, is not formed. That is, the electroless plating layer 21 is formed only on one side of the front surface of the adhesion layer.

  When the anchor is formed using the convex shape formed on the conductor 12, the conductor 12 grows from the position of the conductor 12 toward the center of the adhesion layer. For this reason, the conductor 12 becomes thinner from the vicinity of the front surface of the adhesion layer where the conductor 12 is arranged toward the center of the adhesion layer. On the other hand, according to the present disclosure, since irregularities are formed on the front surface of the adhesion layer, not only the shape in which the conductor 12 becomes thinner from the vicinity of the front surface of the adhesion layer toward the insulating layer 11, but also the shape of FIG. As shown in the concave portions 111-1, 111-3, and 111-6, there may be a shape spreading from the vicinity of the front surface of the adhesive layer 21 toward the insulating layer 11.

  As shown in FIG. 20, the recesses 111-8 and 111-9 in FIG. 18 may be formed obliquely from near the front surface 11U of the insulating layer 11 toward the center of the insulating layer 11. In this case, it is preferable that the distance between the concave portion 111-8 and the concave portion 111-9 is shorter in the insulating layer 11 than in the vicinity of the front surface 11U. Thereby, the insulating layer 11 is held between the concave portions 111-8 and 111-9, and the peel strength between the conductor 12 and the insulating layer 11 can be further increased.

  Further, in the present disclosure, since the unevenness is formed on the front surface 11U of the insulating layer 11, the arrangement of the unevenness on the front surface 11U of the insulating layer 11 has a regularity due to the method of forming the unevenness.

  When the unevenness is formed using the unevenness formed on the flat surface or the roll, the unevenness of the flat surface or the roll appears on the front surface 11U as it is. For example, when the uneven shape includes a straight line having a constant width or a constant interval, concave portions or convex portions having a constant width or a constant interval as shown in reference numerals 111-8 and 111-9 shown in FIG. 18 and FIG. Remains. When the front surface 11U is cut to form irregularities, a linear mark remains in the cutting direction as shown in FIGS. 21 (b) and 21 (c).

  When the irregularities are formed using a foaming chemical, traces of circular bubbles are left as shown in reference numerals 111-1 to 111-7 shown in FIG. 18 and FIG. 21D. The inner diameters of the recesses 111-1 to 111-7 may be constant or different. Also, there is a double circular shape in which the convex portion 112-1 is formed in the concave portion 111-1, like the concave portion 111-1. The convex 112-1 may be formed also in the concaves 111-2 to 111-7. Further, the circle included in the unevenness may be formed not only in the concave portion but also in the convex portion. Note that the cross-sectional shapes of the concavities and convexities shown in FIGS. 18A and 18B are not limited to the above-described shapes, but include any shapes formed when the concavities and convexities are formed. For example, a wedge shape, a hook shape, a trapezoid, a pendulum, a trapezoid having two peaks, and the like can be exemplified.

  Even if the regularity of the unevenness is not seen in a narrow range, the regularity can be found by including the irregularity in a wide range. In particular, since the electronic component mounting substrate is separated into chips and mounted on electronic components or the like, the regularity of the irregularities may not appear in one chip depending on the method of forming the irregularities. In this case, traces of the concavo-convex forming material can appear only for an arbitrary number of chips of 2 or more.

  A method for manufacturing an electronic component mounting board according to the present disclosure will be described with reference to FIG. The method for manufacturing an electronic component mounting board according to the present embodiment includes an unevenness forming step before the conductor forming step.

  In the unevenness forming step, the insulating layer 11 is prepared (FIG. 22A), and unevenness is formed on the front surface 11U of the insulating layer 11 (FIG. 22B). The unevenness is formed on the entire surface of the front surface 11U where the wiring pattern of the conductor 12 can be formed. When the unevenness is formed on the entire front surface 11U, the unevenness as shown in FIG. 18 is also formed in the region of the insulating layer 11 where the conductor 12 is located on the side of the front surface 11U where the conductor 12 is not present. Is formed.

  The method of forming the irregularities is arbitrary. For example, the irregularities formed on a flat surface or a roll are transferred to the front surface 11U, or an insulating sheet having the irregularities is embedded in the front surface 11U. Physical formation, mechanical formation such as cutting the front surface 11U with a brush, etc., and chemical formation such as dissolving or swelling the front surface 11U using chemicals. May be combined. In addition, the uneven shape of the front surface 11U of the insulating layer 11 may be different between a region where the conductor 12 is arranged and a region where the conductor 12 is not.

  The conductor forming step is the same as that described in the first embodiment, but the present embodiment is different in that an electroless plating layer 21 is provided. The electroless plating layer 21 is formed (FIG. 22 (c)), the electrolytic plating layer 22 is formed (FIG. 22 (d)), and the electroless plating layer 21 is removed (FIG. 22 (e)). The electroless plating layer 21 can be formed by applying a liquid or paste-like conductor in addition to chemical plating. The electroless plating layer 21 is formed on the entire surface of the front surface 11U where the wiring pattern of the conductor 12 can be formed. The electrolytic plating layer 22 is formed in the shape of a wiring pattern. The removal of the electroless plating layer 21 removes the electroless plating layer 21 formed in a region other than the wiring pattern while leaving the electrolytic plating layer 22. At this time, the corners of the conductor 12 (reference numeral 12E shown in FIG. 17) are rounded. In the present disclosure, since the conductor 12 is grown from the insulating layer 11 side, in a cross section perpendicular to the insulating layer 11, the corner of the upper surface of the conductor 12 facing the surface on the insulating layer 11 side is rounded.

  In addition, the region of the front surface 11U of the insulating layer 11 where the irregularities are formed and the region where the electroless plating layer 21 is formed have the wiring pattern of the conductor 12 on the front surface 11U. Only the area may be used.

  Further, the electroless plating layer 21 may be directly formed in the shape of the wiring pattern without forming the electrolytic plating layer 22. In this case, the entire conductor 12 is constituted by the electroless plating layer 21.

  Further, in the present embodiment, a single-sided substrate is exemplified as an example of the electronic component mounting substrate according to the present disclosure, but the present disclosure is not limited to this. For example, the electronic component mounting substrate according to the present disclosure may be a double-sided substrate. In this case, the structure of the insulating layer 11 and the conductor 12 described in the present embodiment may be formed on only one side, or may be formed on both sides. Further, the electronic component mounting substrate according to the present disclosure may be a multilayer substrate. In this case, the structure of the insulating layer 11 and the conductor 12 described in the present embodiment may be included in at least one layer of the multilayer substrate.

  As described above, in the present embodiment, the conductor 12 includes the electroless plating layer 21 in the lowermost layer on the insulating layer 11 side, and the insulating layer 11 and the electroless plating layer 21 are in contact with each other. Therefore, the present embodiment can provide an electronic component mounting substrate having a high peel strength.

  Note that, in the present embodiment, an example of application to the first embodiment has been described, but the present embodiment may be applied to the second embodiment. In this case, the unevenness may be formed on the front surface of the contact layer in contact with the conductor 12, on the front surface of the contact layer in contact with the insulating layer 11, or on the contact layer. The front surface 11U of the insulating layer 11 which is in contact may be used.

(Fourth embodiment)
Next, a fourth embodiment will be described. The conductor 12 of the present embodiment has a conductor recess (recess) 200 on the side surface.

  The conductor concave portion 200 may be formed by using a resist material containing the particulate matter 250. A specific example will be described.

  First, a resist layer 290 is formed using a resist material containing the particulate matter 250 (see FIG. 23A).

  Thereafter, a portion of the resist layer 290 where the conductor 12 is provided is removed by edging or the like (see FIG. 23B). At this time, the particulate matter 250 is not removed by selecting an edging agent or the like. Note that the particulate matter 250 contained in the resist layer 290 is removed together with the resist layer 290.

  After that, plating is performed by electroless plating or electrolytic plating in a state where the particulate matter 250 is exposed from the side surface of the opening 295 provided in the resist layer 290 to form the conductor 12. As a result, the conductor 12 having the conductor concave portion 200 is formed (see FIG. 23C).

  After that, the resist layer 290 and the particulate matter 250 are removed by etching or the like. Also at this time, the particulate matter 250 contained in the resist layer 290 is removed together with the resist layer 290 (see FIG. 23D).

  Next, the conductor 12 having the conductor concave portion 200 is pushed into the semi-cured insulating layer 11 (see FIG. 23E), and then the insulating layer 11 is cured.

  Through the steps described above, a part of the insulating layer 11 is located in the conductor recess 200 of the conductor 12, and the adhesion of the conductor 12 to the insulating layer 11 can be increased.

(Fifth embodiment)
Next, a fifth embodiment will be described. The side surface of the conductor 12 of the present embodiment has a conductor protrusion (projection) 210. In addition, the conductor protrusion 210 and the conductor recess 200 may be provided on the side surface of the conductor 12 in a mixed manner.

  The conductor protrusion 210 may be formed by using a resist material containing the particulate matter 250. A specific example will be described.

  First, a resist layer 290 is formed using a resist material containing the particulate matter 250 (see FIG. 24A).

  Thereafter, the portion of the resist layer 290 where the conductor 12 is to be provided is removed by edging or the like (see FIG. 24B). At this time, the particulate matter 250 is removed by selecting an edging agent or the like. Note that the particulate matter 250 contained in the resist layer 290 is removed together with the resist layer 290.

  Thereafter, plating by electroless plating or electrolytic plating is performed to form the conductor 12 (see FIG. 24C). As a result, the conductor 12 having the conductor protrusion 210 is formed.

  After that, the resist layer 290 is removed by etching or the like (see FIG. 24D). Also at this time, the particulate matter 250 contained in the resist layer 290 is removed together with the resist layer 290.

  Next, the conductor 12 having the conductor protrusion 210 is pressed into the semi-cured insulating layer 11, and then the insulating layer 11 is cured (see FIG. 24E).

  Through the above-described steps, the conductor protrusion 210 is located in the insulating layer 11, and the adhesion of the conductor 12 to the insulating layer 11 can be increased.

(Sixth embodiment)
In the present embodiment, an application example of the electronic component mounting board according to the present disclosure will be described. The electronic component according to the present embodiment includes the electronic component mounting board according to the present disclosure, and executes a predetermined process using the electronic component mounting board according to the present disclosure. The processing is an arbitrary processing by an electronic component.

  The electronic device according to the embodiment uses the electronic component according to the present disclosure for at least one of the mounted electronic components. In the mounting apparatus according to the embodiment, the electronic component or the electronic device according to the present disclosure is used for at least one of the mounted electronic component and the electronic device.

  The present disclosure is applicable to any device including an electronic component mounting substrate. Examples of devices to which the present disclosure can be applied include, for example, automobiles, home appliances, communication devices, control devices, sensors, robots, drones, airplanes, spacecraft, ships, production machinery, construction machinery, test machinery, Examples include a surveying machine, a computer-related product, a digital device, an amusement device, and a clock.

  The device is provided with an arbitrary function corresponding to the device. The electronic component mounting board according to the present disclosure is used for an electronic device such as an electronic chip used when executing this function. The electronic component mounting board according to the present disclosure can improve the peel strength, so that the reliability of the electronic component, the electronic device, and the device can be improved.

  The electronic component mounting substrate and the method of manufacturing the same according to the present disclosure can be applied to various electronic devices or applied to the manufacture of electronic devices.

11: Insulating layer 12: Conductor 121: Metal foil 122: Metal plating 13: Pattern resist 14: Insulating layer 15: VIA
11U: Front surfaces 111-1 to 111-9: concave portions 112-1, 112-6, 112-9: convex portions 113: tunnel 21: electroless plating layer 22: electrolytic plating layer

Claims (12)

An insulating layer,
A conductor provided on the insulating layer,
With
The substrate, wherein at least a part of the bottom surface and the side surface of the conductor is located on the back surface side of the front surface of the insulating layer.   2. The substrate according to claim 1, wherein all of the side surfaces of the conductor are located on a back surface side of the front surface of the insulating layer. 3.   3. The substrate according to claim 1, wherein a top surface of the conductor and a front surface of the insulating layer are located at the same height in a thickness direction.   The substrate according to claim 1, wherein a top surface of the conductor is located on a back surface side of a front surface of the insulating layer.   The substrate according to claim 1, wherein the side surface of the conductor has a concave portion.   The substrate according to claim 1, wherein the side surface of the conductor has a protrusion. The insulating layer has a plurality of stacked insulating layers,
The conductor is provided on one or more of the laminated insulating layers,
The substrate according to claim 1, wherein at least a part of the bottom surface and the side surface of the conductor is located on a back surface side of the front surface of the laminated insulating layer. . One or more of the conductors are such that the top surface is located closer to the front surface than the front surface of a certain laminated insulating layer on which the conductor is provided;
The substrate according to claim 7, wherein a top surface and side surfaces of the conductor are buried in another laminated insulating layer laminated on the certain laminated insulating layer.   The conductor provided on a certain laminated insulating layer and the conductor provided on another laminated insulating layer laminated on the certain laminated insulating layer are connected via a conductor part. 9. The substrate according to any one of 8. The insulating layer has an adhesion layer,
The substrate according to any one of claims 1 to 9, wherein the conductor is provided on the adhesion layer. A substrate according to any one of claims 1 to 10,
Electronic components provided on the substrate,
With
The electronic device, wherein the electronic component is provided on the conductor.   A mounting apparatus comprising the electronic device according to claim 11.

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