JPWO2006025139A1 - Circuit board, manufacturing method thereof, and electronic component using the same - Google Patents

Circuit board, manufacturing method thereof, and electronic component using the same Download PDF

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JPWO2006025139A1
JPWO2006025139A1 JP2006531290A JP2006531290A JPWO2006025139A1 JP WO2006025139 A1 JPWO2006025139 A1 JP WO2006025139A1 JP 2006531290 A JP2006531290 A JP 2006531290A JP 2006531290 A JP2006531290 A JP 2006531290A JP WO2006025139 A1 JPWO2006025139 A1 JP WO2006025139A1
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circuit board
hole
insulating substrate
main surface
conductive film
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光行 木村
光行 木村
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1007—Mounting in enclosures for bulk acoustic wave [BAW] devices
    • H03H9/1014—Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the BAW device
    • H03H9/1021—Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the BAW device the BAW device being of the cantilever type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10234—Metallic balls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/049—Wire bonding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections

Abstract

薄型化が可能な上、製造コストの低減が可能な回路基板とその製造方法、及びこれを用いた気密性の向上が可能な電子部品を提供する。 絶縁基板（１０）と、絶縁基板（１０）の厚さ方向に形成された、絶縁基板（１０）の第１主面（１０ａ）と絶縁基板（１０）の第２主面（１０ｂ）とを接続するためのスルーホール（１１）と、スルーホール（１１）の内壁と第１及び第２主面（１０ａ，１０ｂ）におけるスルーホール（１１）の開口部周囲とに形成された導電膜（１２）と、スルーホール（１１）に充填され、かつ導電膜（１２）と接合する金属部材（１４）とを含む回路基板（１）とする。Provided are a circuit board capable of being thinned and capable of reducing manufacturing costs, a manufacturing method thereof, and an electronic component capable of improving airtightness using the circuit board. An insulating substrate (10), and a first main surface (10a) of the insulating substrate (10) and a second main surface (10b) of the insulating substrate (10) formed in the thickness direction of the insulating substrate (10). A through hole (11) for connection, and a conductive film (12 formed around the inner wall of the through hole (11) and the opening of the through hole (11) in the first and second main surfaces (10a, 10b). ) And a metal member (14) filled in the through hole (11) and joined to the conductive film (12).

Description

本発明は、水晶片や半導体素子等を搭載する回路基板とその製造方法及びこれを用いた電子部品に関する。  The present invention relates to a circuit board on which a crystal piece, a semiconductor element, and the like are mounted, a manufacturing method thereof, and an electronic component using the circuit board.

従来、水晶片や半導体素子等の電子素子を搭載する回路基板では、セラミック基板に形成されたスルーホールに導電性組成物を充填し電気的導通部を形成していた。また、その形成方法としては、スルーホール内へ導電性組成物を充填した後、乾燥工程及び熱処理工程を経て電気的導通部を形成する方法を用いていた。更に、電子部品としては、電子素子を搭載した回路基板を蓋体で覆い保護しているものがあった（例えば、特許文献１参照）。  Conventionally, in a circuit board on which an electronic element such as a crystal piece or a semiconductor element is mounted, an electrically conductive part is formed by filling a through hole formed in a ceramic substrate with a conductive composition. Moreover, as the formation method, after filling the through hole with a conductive composition, a method of forming an electrically conductive portion through a drying process and a heat treatment process has been used. Further, as an electronic component, there is one in which a circuit board on which an electronic element is mounted is covered and protected (for example, see Patent Document 1).

図７は、特許文献１に記載された従来の回路基板を用いた電子部品の断面図である。図７に示すように、電子部品１０４では、セラミック材料からなる絶縁基板１０２の所定の位置に形成されたスルーホール１１０に導電性組成物を充填し、熱処理を行って電気的導通部１０８が形成されている。また、上記導電性組成物としては、銀粒子、ガラス粉末及びビヒクル（Ｖｅｈｉｃｌｅ）を含む混合物が使用されている。この混合物は、銀粒子とガラス粉末との合計量に対する銀粒子の含有量が８５〜９０重量％の範囲であり、含まれるガラス粉末の軟化温度が５５０〜６５０℃程度である。また、絶縁基板１０２としては、無機粉末とバインダとを含む複合物を焼成した後、平板状に仕上げ加工し、更に凹部１０５を設けたものが用いられている。  FIG. 7 is a cross-sectional view of an electronic component using a conventional circuit board described in Patent Document 1. As shown in FIG. 7, in the electronic component 104, a conductive composition is filled in a through hole 110 formed at a predetermined position of an insulating substrate 102 made of a ceramic material, and heat treatment is performed to form an electrically conductive portion 108. Has been. In addition, as the conductive composition, a mixture containing silver particles, glass powder, and vehicle is used. In this mixture, the silver particle content is in the range of 85 to 90% by weight with respect to the total amount of silver particles and glass powder, and the softening temperature of the contained glass powder is about 550 to 650 ° C. In addition, as the insulating substrate 102, a substrate in which a composite containing inorganic powder and a binder is fired and then finished into a flat plate shape and further provided with a recess 105 is used.

更に、電子部品１０４は、配線層１０６及び配線層１０７と、配線層１０７に実装された電子素子（水晶片）１０１と、電子素子１０１を覆って絶縁基板１０２上に設けられた蓋体１０３とを含む。また、蓋体１０３と配線層１０７、及び電子素子１０１と配線層１０７は、金−錫合金や金−シリコン合金等からなる接合層１０９を介して接着されている。
特開２００３−１０１１８１号公報 Further, the electronic component 104 includes a wiring layer 106 and a wiring layer 107, an electronic element (crystal piece) 101 mounted on the wiring layer 107, and a lid 103 that covers the electronic element 101 and is provided on the insulating substrate 102. including. The lid 103 and the wiring layer 107, and the electronic element 101 and the wiring layer 107 are bonded to each other through a bonding layer 109 made of a gold-tin alloy, a gold-silicon alloy, or the like.
JP 2003-10181 A

しかし、前記従来の構成では、電気的導通部を形成する際、７５０℃〜９００℃の熱処理を要するため、セラミック基板以外の絶縁基板を用いることが困難であった。そのため、製造コストに占める材料費の割合が大きくなり製造コストが上昇するおそれがあった。  However, in the conventional configuration, it is difficult to use an insulating substrate other than the ceramic substrate because a heat treatment at 750 ° C. to 900 ° C. is required when forming the electrically conductive portion. For this reason, the ratio of the material cost to the manufacturing cost is increased, which may increase the manufacturing cost.

また、一般に使用されるセラミック基板は、最小径が０．７μｍ程度のアルミナ粒子の集合体を含むことからアルミナ粒子間において粒界が存在するため、厚みが１５０μｍ以下のセラミック基板を用いて電子部品を構成すると、電子部品の気密性を維持することが困難となる可能性があった。また、セラミック基板の厚みを薄くすると、電気的導通部を形成する際の熱処理によって、セラミック基板が反る可能性があった。そのため、電子部品の気密性の維持が更に困難となる可能性があった。  In addition, since a ceramic substrate generally used includes an aggregate of alumina particles having a minimum diameter of about 0.7 μm, grain boundaries exist between the alumina particles, so that an electronic component using a ceramic substrate having a thickness of 150 μm or less is used. If it is configured, it may be difficult to maintain the airtightness of the electronic component. Further, when the thickness of the ceramic substrate is reduced, there is a possibility that the ceramic substrate is warped by the heat treatment in forming the electrically conductive portion. For this reason, there is a possibility that it is more difficult to maintain the airtightness of the electronic component.

本発明は上記課題を解決するものであり、薄型化が可能な上、製造コストの低減が可能な回路基板とその製造方法、及びこれを用いた気密性の向上が可能な電子部品を提供する。  The present invention solves the above-described problems, and provides a circuit board capable of being thinned and capable of reducing manufacturing costs, a manufacturing method thereof, and an electronic component capable of improving airtightness using the circuit board. .

本発明の第１の回路基板は、絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板であって、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、
前記スルーホールに充填され、かつ前記導電膜と接合する金属部材とを含むことを特徴とする。A first circuit board of the present invention is an through-hole for connecting an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a hole,
A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
And a metal member that fills the through hole and joins the conductive film.

本発明の第２の回路基板は、絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板であって、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、
前記スルーホールにおける前記第１主面側の開口部を塞ぎ、かつ前記導電膜と接合する金属部材とを含むことを特徴とする。A second circuit board of the present invention is an through-hole for connecting an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a hole,
A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
And a metal member that closes the opening of the through hole on the first main surface side and is bonded to the conductive film.

本発明の回路基板の第１の製造方法は、
絶縁基板の厚さ方向に、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールを形成し、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに導電膜を形成し、
略球状の金属部材を前記スルーホールに充填し、前記金属部材と前記導電膜とを接合する回路基板の製造方法である。The first manufacturing method of the circuit board of the present invention includes:
Forming a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate in the thickness direction of the insulating substrate;
Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
In this method, the through-hole is filled with a substantially spherical metal member, and the metal member and the conductive film are joined.

本発明の回路基板の第２の製造方法は、
絶縁基板の厚さ方向に、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールを形成し、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに導電膜を形成し、
前記スルーホールにおける前記第１主面側の開口部を略球状の金属部材で塞ぎ、前記金属部材と前記導電膜とを接合する回路基板の製造方法である。The second manufacturing method of the circuit board of the present invention includes:
Forming a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate in the thickness direction of the insulating substrate;
Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
In the method of manufacturing a circuit board, the opening on the first main surface side in the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined.

本発明の第１の電子部品は、絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板と、
前記回路基板に搭載された電子素子と、
前記電子素子を覆う蓋体とを含む電子部品であって、
前記回路基板は、前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールに充填され、かつ前記導電膜と接合する金属部材とを含み、
前記電子素子は、前記第１主面における前記開口部周囲に形成された前記導電膜に導電性材料を介して搭載されていることを特徴とする。According to a first electronic component of the present invention, there is provided a through hole for connecting an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate, which are formed in the thickness direction of the insulating substrate. A circuit board including a hole;
Electronic elements mounted on the circuit board;
An electronic component including a lid that covers the electronic element,
The circuit board has a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and fills the through hole and joins the conductive film. A metal member,
The electronic element is mounted on the conductive film formed around the opening in the first main surface via a conductive material.

本発明の第２の電子部品は、絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板と、
前記回路基板に搭載された電子素子と、
前記電子素子を覆う蓋体とを含む電子部品であって、
前記回路基板は、前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールにおける前記第１主面側の開口部を塞ぎ、かつ前記導電膜と接合する金属部材とを含み、
前記電子素子は、前記金属部材に搭載されていることを特徴とする。According to a second electronic component of the present invention, the through-hole for connecting the insulating substrate and the first main surface of the insulating substrate and the second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a hole;
Electronic elements mounted on the circuit board;
An electronic component including a lid that covers the electronic element,
The circuit board includes a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and an opening on the first main surface side of the through hole. A metal member that closes and joins the conductive film,
The electronic element is mounted on the metal member.

本発明の回路基板とその製造方法によれば、電気的導通部を形成する際、高温での熱処理が不要となるため、例えばセラミック基板以外の基板（ガラス基板等）を用いることができる。よって、薄型化が可能な上、製造コストの低減が可能となる。また、本発明の電子部品によれば、上記本発明の回路基板を用いるため、気密性の向上が可能となる。  According to the circuit board and the manufacturing method thereof of the present invention, when the electrically conductive portion is formed, a heat treatment at a high temperature is not required, and therefore, for example, a substrate (such as a glass substrate) other than the ceramic substrate can be used. Therefore, the thickness can be reduced and the manufacturing cost can be reduced. Further, according to the electronic component of the present invention, since the circuit board of the present invention is used, the airtightness can be improved.

図１Ａは本発明の第１実施形態に係る回路基板の断面図であり、図１Ｂは本発明の第１実施形態に係る回路基板の概略平面図である。FIG. 1A is a sectional view of a circuit board according to the first embodiment of the present invention, and FIG. 1B is a schematic plan view of the circuit board according to the first embodiment of the present invention. 図２は、本発明の第２実施形態に係る電子部品の断面図である。FIG. 2 is a cross-sectional view of an electronic component according to the second embodiment of the present invention. 図３Ａ〜Ｊは、本発明の第２実施形態に係る電子部品の製造方法の一例を示す工程断面図である。3A to 3J are process cross-sectional views illustrating an example of a method for manufacturing an electronic component according to the second embodiment of the present invention. 図４は、本発明の第３実施形態に係る回路基板の断面図である。FIG. 4 is a cross-sectional view of a circuit board according to the third embodiment of the present invention. 図５は、本発明の第４実施形態に係る電子部品の断面図である。FIG. 5 is a sectional view of an electronic component according to the fourth embodiment of the present invention. 図６Ａ〜Ｄは、本発明の第４実施形態に係る電子部品の製造方法の一例を示す工程断面図である。6A to 6D are process cross-sectional views illustrating an example of a method for manufacturing an electronic component according to the fourth embodiment of the present invention. 図７は、従来の回路基板を用いた電子部品の断面図である。FIG. 7 is a cross-sectional view of an electronic component using a conventional circuit board.

本発明の第１の回路基板は、絶縁基板と、この絶縁基板の厚さ方向に形成された、絶縁基板の第１主面と絶縁基板の第２主面とを接続するためのスルーホールとを含む。ここで、「第１主面」とは、上記回路基板を後述する電子部品に適用した際、電子素子が搭載される側の絶縁基板の主面をいう。後述する本発明の第２の回路基板においても同様である。  A first circuit board of the present invention includes an insulating substrate, and a through hole formed in the thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate. including. Here, the “first main surface” refers to the main surface of the insulating substrate on the side where the electronic element is mounted when the circuit board is applied to an electronic component described later. The same applies to the second circuit board of the present invention described later.

上記絶縁基板は、ガラス基板であることが好ましい。ガラス基板は酸化珪素分子がつながって出来た境目のない構造を有しているため、セラミック基板に比べ密に形成されている。よって、上記絶縁基板がガラス基板の場合は、後述する電子部品に適用した際、電子部品の気密性の向上が可能となる。ガラス基板としては、例えば、熱膨張係数が３×１０−６／℃〜８×１０−６／℃の硼珪酸ガラスや、同じく熱膨張係数が３×１０−６／℃〜８×１０−６／℃の無アルカリガラス、あるいは熱膨張係数が８×１０−６／℃〜１．２×１０−５／℃のソーダガラス等が使用できる。また、その厚みは、例えば１００〜３００μｍ程度である。The insulating substrate is preferably a glass substrate. Since the glass substrate has a seamless structure formed by connecting silicon oxide molecules, it is formed more densely than the ceramic substrate. Therefore, when the said insulating substrate is a glass substrate, when applied to the electronic component mentioned later, the airtightness of an electronic component can be improved. As the glass substrate, for example, borosilicate glass thermal expansion coefficient of 3 × 10 -6 / ℃ ~8 × 10 -6 / ℃, also the thermal expansion coefficient of 3 × 10 -6 / ℃ ~8 × 10 -6 An alkali-free glass having a thermal expansion coefficient of 8 × 10 −6 / ° C. to 1.2 × 10 −5 / ° C. can be used. Moreover, the thickness is about 100-300 micrometers, for example.

上記スルーホールは、上記第１主面から上記第２主面にかけてその径が漸次小さくなっていることが好ましい。後述する金属部材の充填を容易に行うことができるからである。スルーホールの径は、絶縁基板の厚みに応じて適宜設定すればよいが、例えば絶縁基板の厚みが１５０μｍの場合は、上記第１主面側の開口径を１００μｍ以上１５０μｍ以下の範囲とすればよく、上記第２主面側の開口径を５０μｍ以上１００μｍ以下の範囲とすればよい。また、スルーホールの形成は、例えばサンドブラスト法やエッチング法等により行うことができる。特に、サンドブラスト法でスルーホールを形成すると、スルーホールの内壁がブラストのメディアにより適度に粗面化されるため、スルーホールの内壁と後述する導電膜との密着性が向上する。  It is preferable that the diameter of the through hole gradually decreases from the first main surface to the second main surface. This is because the metal member described later can be easily filled. The diameter of the through hole may be set as appropriate according to the thickness of the insulating substrate. For example, when the thickness of the insulating substrate is 150 μm, the opening diameter on the first main surface side may be in the range of 100 μm to 150 μm. The opening diameter on the second main surface side may be in the range of 50 μm to 100 μm. The through hole can be formed by, for example, a sand blast method or an etching method. In particular, when the through hole is formed by the sand blast method, the inner wall of the through hole is appropriately roughened by the blasting medium, so that the adhesion between the inner wall of the through hole and the conductive film described later is improved.

そして、本発明の第１の回路基板は、上記スルーホールの内壁と上記第１及び第２主面における上記スルーホールの開口部周囲とに形成された導電膜と、上記スルーホールに充填され、かつ上記導電膜と接合する金属部材とを含む。金属部材は、例えば金、銅等の金属材料からなるため、導電膜と接合する際において高温（例えば７５０℃以上）での熱処理を要しない。よって、セラミック基板以外の基板（例えばガラス基板等）を用いることができるため、薄型化が可能な上、製造コストの低減が可能な回路基板を提供できる。  And the 1st circuit board of the present invention is filled in the through hole, the conductive film formed in the inner wall of the through hole and the periphery of the opening of the through hole in the first and second main surfaces, And a metal member bonded to the conductive film. Since the metal member is made of a metal material such as gold or copper, for example, heat treatment at a high temperature (for example, 750 ° C. or higher) is not required when the metal member is bonded to the conductive film. Therefore, since a substrate other than a ceramic substrate (for example, a glass substrate) can be used, a circuit substrate that can be reduced in thickness and can be manufactured at a reduced cost can be provided.

上記導電膜としては、例えばクロム、チタン、ニッケル、パラジウム、金等からなる金属薄膜が使用できる。導電膜は、１層の金属薄膜で形成してもよいし、複数層の金属薄膜で形成してもよい。複数層の金属薄膜で形成する場合は、クロム薄膜上にパラジウム薄膜及び金薄膜を順次積層した導電膜が好ましい。クロム薄膜と、保護層となる金薄膜との間にパラジウム薄膜が介在するため、このパラジウム薄膜が金薄膜とクロム薄膜との接着層として機能するからである。また、クロム薄膜はガラス基板との密着性が高いため、上記絶縁基板としてガラス基板を使用する場合は、上記組み合わせ（クロム薄膜／パラジウム薄膜／金薄膜）の導電膜が特に好ましい。また、上記組み合わせにおける各金属薄膜の厚みは、例えば、クロム薄膜が０．０５〜０．１μｍ程度であり、パラジウム薄膜が０．０１〜０．０５μｍ程度であり、金薄膜が０．３〜１．０μｍ程度である。上述した金属薄膜は、例えばスパッタリング法やめっき法等の手段を用いて形成できる。例えば、クロム薄膜やチタン薄膜やパラジウム薄膜を０．０５〜０．１μｍ程度の厚さに形成する場合は、スパッタリング法を用いて形成することができる。また、例えばニッケル薄膜を１〜２μｍ程度の厚さに形成する場合は、無電解めっき法を用いて形成することができる。また、スパッタリング法やめっき法によって形成された金属薄膜の保護層として、金薄膜を０．３〜１．０μｍ程度の厚さに形成する場合は、電解めっき法を用いて形成することができる。なお、金薄膜はスパッタリング法で形成することもできる。また、上記金薄膜の代わりに銀薄膜や銅薄膜を用いてもよい。銀薄膜や銅薄膜は、金薄膜と同様にスパッタリング法やめっき法によって形成することができる。  As the conductive film, for example, a metal thin film made of chromium, titanium, nickel, palladium, gold or the like can be used. The conductive film may be formed of a single-layer metal thin film or a multi-layer metal thin film. In the case of forming with a plurality of metal thin films, a conductive film in which a palladium thin film and a gold thin film are sequentially laminated on a chromium thin film is preferable. This is because a palladium thin film is interposed between the chromium thin film and the gold thin film serving as the protective layer, and this palladium thin film functions as an adhesive layer between the gold thin film and the chromium thin film. Further, since the chromium thin film has high adhesion to the glass substrate, the conductive film of the above combination (chromium thin film / palladium thin film / gold thin film) is particularly preferable when the glass substrate is used as the insulating substrate. The thickness of each metal thin film in the above combination is, for example, about 0.05 to 0.1 μm for a chromium thin film, about 0.01 to 0.05 μm for a palladium thin film, and 0.3 to 1 for a gold thin film. About 0.0 μm. The metal thin film described above can be formed using means such as sputtering or plating. For example, when a chromium thin film, a titanium thin film, or a palladium thin film is formed to a thickness of about 0.05 to 0.1 μm, it can be formed using a sputtering method. For example, when a nickel thin film is formed to a thickness of about 1 to 2 μm, it can be formed using an electroless plating method. Further, when a gold thin film is formed to a thickness of about 0.3 to 1.0 μm as a protective layer for a metal thin film formed by a sputtering method or a plating method, it can be formed using an electrolytic plating method. The gold thin film can also be formed by a sputtering method. A silver thin film or a copper thin film may be used instead of the gold thin film. A silver thin film or a copper thin film can be formed by sputtering or plating in the same manner as a gold thin film.

また、上記金属部材は、略球状に形成されていることが好ましい。スルーホールの内壁に形成された導電膜と金属部材との間の接合を均一に行うことができるからである。  The metal member is preferably formed in a substantially spherical shape. This is because the conductive film formed on the inner wall of the through hole and the metal member can be uniformly joined.

また、上記絶縁基板はシート状に形成されていることが好ましい。後述する電子部品に適用した際、電子部品の薄型化が容易となるからである。また、上記絶縁基板がシート状に形成されていると、後述する電子部品を製造する際、上記絶縁基板上に複数個の電子素子を同時に実装した後、電子素子毎に個片化して電子部品を製造することができるため、電子素子の実装工程が簡略化する。  The insulating substrate is preferably formed in a sheet shape. This is because when applied to an electronic component described later, it is easy to make the electronic component thinner. In addition, when the insulating substrate is formed in a sheet shape, when an electronic component to be described later is manufactured, a plurality of electronic elements are simultaneously mounted on the insulating substrate, and then the electronic components are separated into individual electronic components. Therefore, the mounting process of the electronic element is simplified.

次に、本発明の第２の回路基板について説明する。なお、以下の記述において、上述した本発明の第１の回路基板と同じ構成要素についての説明を省略する場合がある。  Next, the second circuit board of the present invention will be described. In the following description, description of the same components as those of the first circuit board of the present invention described above may be omitted.

本発明の第２の回路基板は、上述した本発明の第１の回路基板と同様に、絶縁基板と、この絶縁基板の厚さ方向に形成された、絶縁基板の第１主面と絶縁基板の第２主面とを接続するためのスルーホールと、このスルーホールの内壁と第１及び第２主面におけるスルーホールの開口部周囲とに形成された導電膜とを含む。そして、本発明の第２の回路基板は、上記構成に加え、上記スルーホールにおける上記第１主面側の開口部を塞ぎ、かつ上記導電膜と接合する金属部材を含む。これにより、上述した本発明の第１の回路基板と同様に、薄型化が可能な上、製造コストの低減が可能な回路基板を提供できる。  Similar to the above-described first circuit board of the present invention, the second circuit board of the present invention includes an insulating substrate, and the first main surface of the insulating substrate and the insulating substrate formed in the thickness direction of the insulating substrate. And a conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces. And the 2nd circuit board of this invention contains the metal member which plugs up the opening part of the said 1st main surface side in the said through hole, and joins the said electrically conductive film in addition to the said structure. Thereby, similarly to the above-described first circuit board of the present invention, it is possible to provide a circuit board that can be thinned and reduced in manufacturing cost.

また、本発明の第２の回路基板は、上記金属部材が略半球状に形成され、上記金属部材の半球面と上記導電膜とが接合されている回路基板であってもよい。上記第１主面側の開口部周囲に形成された導電膜と金属部材との間の接合を均一に行うことができる上、上記金属部材における上記半球面側と反対側に位置する平面部に、後述する電子素子を搭載することができるからである。  The second circuit board of the present invention may be a circuit board in which the metal member is formed in a substantially hemispherical shape, and the hemispherical surface of the metal member and the conductive film are bonded. The conductive film formed around the opening on the first main surface side and the metal member can be joined uniformly, and the flat surface portion located on the opposite side of the metal member from the hemispherical side is provided. This is because an electronic element to be described later can be mounted.

また、本発明の第２の回路基板に使用される絶縁基板は、上述した本発明の第１の回路基板と同様にガラス基板であることが好ましく、シート状に形成されていることが好ましい。  Further, the insulating substrate used for the second circuit board of the present invention is preferably a glass substrate like the above-described first circuit board of the present invention, and is preferably formed in a sheet shape.

次に、本発明の回路基板の第１の製造方法について説明する。なお、本発明の回路基板の第１の製造方法は、上述した本発明の第１の回路基板を製造するための好適な製造方法である。よって、以下の記述において、上述した本発明の第１の回路基板と重複する説明を省略する場合がある。  Next, the first manufacturing method of the circuit board of the present invention will be described. In addition, the 1st manufacturing method of the circuit board of this invention is a suitable manufacturing method for manufacturing the 1st circuit board of this invention mentioned above. Therefore, in the following description, description overlapping with the above-described first circuit board of the present invention may be omitted.

本発明の回路基板の第１の製造方法は、まず、絶縁基板の厚さ方向に、絶縁基板の第１主面と絶縁基板の第２主面とを接続するためのスルーホールを形成し、このスルーホールの内壁と上記第１及び第２主面における上記スルーホールの開口部周囲とに導電膜を形成する。スルーホール及び導電膜の形成方法は、上述の通りである。また、使用する絶縁基板は、上述した本発明の第１の回路基板と同様にガラス基板であることが好ましく、シート状に形成されていることが好ましい。  In the first manufacturing method of the circuit board of the present invention, first, a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate is formed in the thickness direction of the insulating substrate, A conductive film is formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces. The through hole and the conductive film are formed as described above. Further, the insulating substrate to be used is preferably a glass substrate like the first circuit board of the present invention described above, and is preferably formed in a sheet shape.

そして、略球状の金属部材を上記スルーホールに充填し、上記金属部材と上記導電膜とを接合する。これにより、上述した本発明の第１の回路基板を容易に製造できる。なお、「略球状の金属部材」は、例えばキャピラリーツールを用いて形成することができ、その形成方法の詳細については後述する。  Then, the through-hole is filled with a substantially spherical metal member, and the metal member and the conductive film are joined. Thereby, the first circuit board of the present invention described above can be easily manufactured. The “substantially spherical metal member” can be formed using, for example, a capillary tool, and the details of the formation method will be described later.

また、上記金属部材と上記導電膜とを接合する際は、超音波併用熱圧着法により接合するのが好ましい。この場合の「超音波併用熱圧着法」は、上記金属部材と上記導電膜との接合箇所に対して熱と荷重を加えながら超音波を印加して接合する方法である。超音波併用熱圧着法は、従来の熱と荷重を加えて接合する方式（熱圧着法）の加熱温度（３００℃を超える温度）に比べて、低温（１００〜３００℃程度）で接合することができる。よって、絶縁基板の変形を防ぐことができる。また、超音波を併用することで、導電膜と金属部材とが、超音波による摩擦熱で上記「熱圧着法」に比べより強固に接合される。  Moreover, when joining the said metal member and the said electrically conductive film, it is preferable to join by the ultrasonic thermocompression bonding method. In this case, the “ultrasonic combined thermocompression bonding method” is a method in which ultrasonic waves are applied and bonded to a bonding portion between the metal member and the conductive film while applying heat and a load. The ultrasonic thermocompression bonding method involves bonding at a low temperature (about 100 to 300 ° C) compared to the heating temperature (temperature exceeding 300 ° C) of the conventional method (thermocompression bonding method) in which heat and load are applied. Can do. Therefore, deformation of the insulating substrate can be prevented. Further, by using ultrasonic waves in combination, the conductive film and the metal member are bonded more firmly than the above-mentioned “thermocompression bonding method” by frictional heat generated by ultrasonic waves.

次に、本発明の回路基板の第２の製造方法について説明する。なお、本発明の回路基板の第２の製造方法は、上述した本発明の第２の回路基板を製造するための好適な製造方法である。また、以下の記述において、上述した本発明の第２の回路基板、及び上述した本発明の回路基板の第１の製造方法と重複する説明を省略する場合がある。  Next, the second manufacturing method of the circuit board of the present invention will be described. In addition, the 2nd manufacturing method of the circuit board of this invention is a suitable manufacturing method for manufacturing the 2nd circuit board of this invention mentioned above. Moreover, in the following description, the description which overlaps with the 2nd circuit board of this invention mentioned above and the 1st manufacturing method of the circuit board of this invention mentioned above may be abbreviate | omitted.

本発明の回路基板の第２の製造方法は、まず、絶縁基板の厚さ方向に、絶縁基板の第１主面と絶縁基板の第２主面とを接続するためのスルーホールを形成し、このスルーホールの内壁と上記第１及び第２主面における上記スルーホールの開口部周囲とに導電膜を形成する。そして、上記スルーホールにおける上記第１主面側の開口部を略球状の金属部材で塞ぎ、上記金属部材と上記導電膜とを接合する。これにより、上述した本発明の第２の回路基板を容易に製造できる。  In the second manufacturing method of the circuit board of the present invention, first, a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate is formed in the thickness direction of the insulating substrate, A conductive film is formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces. Then, the opening on the first main surface side in the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined. Thereby, the above-described second circuit board of the present invention can be easily manufactured.

また、本発明の回路基板の第２の製造方法において使用する絶縁基板については、上述した本発明の回路基板の第１の製造方法と同様にガラス基板であることが好ましく、シート状に形成されていることが好ましい。また、上記金属部材と上記導電膜とを接合する際は、上述したように超音波併用熱圧着法により接合するのが好ましい。  Further, the insulating substrate used in the second manufacturing method of the circuit board of the present invention is preferably a glass substrate, like the first manufacturing method of the circuit board of the present invention described above, and is formed in a sheet shape. It is preferable. Moreover, when joining the said metal member and the said electrically conductive film, it is preferable to join by the ultrasonic thermocompression bonding method as mentioned above.

次に、本発明の第１の電子部品について説明する。なお、本発明の第１の電子部品は、上述した本発明の第１の回路基板を含む電子部品である。よって、以下の記述において、上述した本発明の第１の回路基板と同じ構成要素についての説明を省略する場合がある。  Next, the first electronic component of the present invention will be described. In addition, the 1st electronic component of this invention is an electronic component containing the 1st circuit board of this invention mentioned above. Therefore, in the following description, the description of the same components as those of the first circuit board of the present invention described above may be omitted.

本発明の第１の電子部品は、上述した本発明の第１の回路基板と、この第１の回路基板に搭載された電子素子と、この電子素子を覆う蓋体とを含む。そして、上記電子素子は、上述した本発明の第１の回路基板の導電膜のうち、第１主面におけるスルーホールの開口部周囲に形成された領域に、導電性材料を介して搭載されている。上述したように、本発明の第１の回路基板は高温での熱処理が不要であるため、セラミック基板以外の基板（例えばガラス基板等）を用いることができる。よって、本発明の第１の電子部品によれば、電子部品の気密性の向上が可能となる。  A first electronic component of the present invention includes the above-described first circuit board of the present invention, an electronic element mounted on the first circuit board, and a lid that covers the electronic element. And the said electronic element is mounted in the area | region formed around the opening part of the through hole in the 1st main surface among the electrically conductive films of the 1st circuit board of this invention mentioned above through a conductive material. Yes. As described above, since the first circuit board of the present invention does not require heat treatment at a high temperature, a substrate other than a ceramic substrate (for example, a glass substrate) can be used. Therefore, according to the first electronic component of the present invention, the airtightness of the electronic component can be improved.

上記電子素子としては、例えば水晶片や半導体素子等が使用できる。例えば、上記電子素子が水晶片である場合、上記電子部品は水晶振動子となる。上記蓋体の材料については特に限定されないが、例えばガラス等を使用することができる。上記蓋体の厚みは、例えば０．３〜０．４ｍｍ程度である。また上記導電性材料としては、例えばエポキシ樹脂に導電微粒子として銀微粒子を配合した導電性接着剤が使用できる。  As the electronic element, for example, a crystal piece or a semiconductor element can be used. For example, when the electronic element is a crystal piece, the electronic component is a crystal resonator. Although it does not specifically limit about the material of the said cover body, For example, glass etc. can be used. The lid has a thickness of about 0.3 to 0.4 mm, for example. As the conductive material, for example, a conductive adhesive in which silver fine particles are mixed as conductive fine particles in an epoxy resin can be used.

また、上記第１主面における上記電子素子と面する領域には、凹部が形成されていてもよい。上記電子素子の動作空間の確保が容易となるからである。  Moreover, the recessed part may be formed in the area | region which faces the said electronic element in the said 1st main surface. This is because it is easy to secure the operation space of the electronic element.

次に、本発明の第２の電子部品について説明する。なお、本発明の第２の電子部品は、上述した本発明の第２の回路基板を含む電子部品である。また、以下の記述において、上述した本発明の第２の回路基板、及び上述した本発明の第１の電子部品と同じ構成要素についての説明を省略する場合がある。  Next, the second electronic component of the present invention will be described. In addition, the 2nd electronic component of this invention is an electronic component containing the 2nd circuit board of this invention mentioned above. Moreover, in the following description, description about the same component as the 2nd circuit board of this invention mentioned above and the 1st electronic component of this invention mentioned above may be abbreviate | omitted.

本発明の第２の電子部品は、上述した本発明の第２の回路基板と、この第２の回路基板に搭載された電子素子と、この電子素子を覆う蓋体とを含む。そして、上記電子素子は、上述した本発明の第２の回路基板の金属部材に搭載されている。よって、本発明の第２の電子部品によれば、上述した本発明の第１の電子部品と同様に、電子部品の気密性の向上が可能となる。  A second electronic component of the present invention includes the above-described second circuit board of the present invention, an electronic element mounted on the second circuit board, and a lid that covers the electronic element. And the said electronic element is mounted in the metal member of the 2nd circuit board of this invention mentioned above. Therefore, according to the second electronic component of the present invention, the airtightness of the electronic component can be improved in the same manner as the first electronic component of the present invention described above.

また、本発明の第２の電子部品において、電子素子と導電膜との間の間隔は、３０〜５０μｍの範囲であることが好ましい。上記電子素子の動作空間を確保した上で、電子部品の薄型化が可能となるからである。  In the second electronic component of the present invention, the distance between the electronic element and the conductive film is preferably in the range of 30 to 50 μm. This is because it is possible to reduce the thickness of the electronic component while securing the operation space of the electronic element.

以下、本発明の実施形態について、図面を参照しながら説明する。  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

［第１実施形態］
まず、本発明の第１実施形態について図面を参照して説明する。参照する図１Ａは、本発明の第１実施形態に係る回路基板の断面図である。また、参照する図１Ｂは、本発明の第１実施形態に係る回路基板の概略平面図である。なお、第１実施形態に係る回路基板は、上述した本発明の第１の回路基板の一例である。[First Embodiment]
First, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1A to be referred to is a cross-sectional view of a circuit board according to the first embodiment of the present invention. FIG. 1B to be referred to is a schematic plan view of the circuit board according to the first embodiment of the present invention. The circuit board according to the first embodiment is an example of the first circuit board of the present invention described above.

図１Ａに示すように、第１実施形態に係る回路基板１は、絶縁基板１０と、絶縁基板１０の厚さ方向に形成された、絶縁基板１０の第１主面１０ａと絶縁基板１０の第２主面１０ｂとを接続するためのスルーホール１１と、第１導電膜１２と、第２導電膜１３と、スルーホール１１に充填され、かつ第１導電膜１２と接合する金属部材１４とを含む。第１導電膜１２は、第１主面１０ａにおけるスルーホール１１の開口部周囲に形成された電子素子接続電極１２ａと、スルーホール１１の内壁に形成された接続導電膜１２ｂと、第２主面１０ｂにおけるスルーホール１１の開口部周囲に形成された外部接続電極１２ｃとからなる。なお、第１導電膜１２は、特許請求の範囲に記載された「導電膜」に相当する。  As shown in FIG. 1A, a circuit board 1 according to the first embodiment includes an insulating substrate 10, a first main surface 10 a of the insulating substrate 10 formed in the thickness direction of the insulating substrate 10, and the first of the insulating substrate 10. A through hole 11, a first conductive film 12, a second conductive film 13, and a metal member 14 filled in the through hole 11 and joined to the first conductive film 12; Including. The first conductive film 12 includes an electronic element connection electrode 12a formed around the opening of the through hole 11 in the first main surface 10a, a connection conductive film 12b formed on the inner wall of the through hole 11, and a second main surface. And an external connection electrode 12c formed around the opening of the through hole 11 at 10b. The first conductive film 12 corresponds to a “conductive film” recited in the claims.

金属部材１４は、例えば金、銅等の金属材料からなるため、第１導電膜１２と接合する際において高温（例えば７５０℃以上）での熱処理を要しない。これにより、薄型化が可能な上、製造コストの低減が可能な回路基板１とすることができる。また、金属部材１４は略球状に形成されている。これにより、スルーホール１１の内壁に形成された接続導電膜１２ｂと金属部材１４との間の接合を均一に行うことができる。  Since the metal member 14 is made of a metal material such as gold or copper, for example, heat treatment at a high temperature (for example, 750 ° C. or higher) is not required when the metal member 14 is bonded to the first conductive film 12. As a result, the circuit board 1 can be thinned and the manufacturing cost can be reduced. The metal member 14 is formed in a substantially spherical shape. Thereby, the joining between the connection conductive film 12b formed on the inner wall of the through hole 11 and the metal member 14 can be performed uniformly.

また、図１Ｂに示すように、第２導電膜１３は、絶縁基板１０の第１主面１０ａの外縁部に形成されている。この第２導電膜１３は、回路基板１を用いて電子部品を作製する際、後述する蓋体との接着面となる。  Further, as shown in FIG. 1B, the second conductive film 13 is formed on the outer edge portion of the first main surface 10 a of the insulating substrate 10. The second conductive film 13 serves as an adhesive surface with a lid, which will be described later, when an electronic component is manufactured using the circuit board 1.

また、図１Ａに示すように、スルーホール１１は、第１主面１０ａから第２主面１０ｂにかけてその径が漸次小さくなっている。これにより、金属部材１４の充填を容易に行うことができる。また、第１主面１０ａには凹部１０ｃが形成されている。これにより、回路基板１を電子部品に適用した際、後述する電子素子の動作空間の確保が容易となる。  As shown in FIG. 1A, the diameter of the through hole 11 gradually decreases from the first main surface 10a to the second main surface 10b. Thereby, the metal member 14 can be filled easily. A recess 10c is formed in the first main surface 10a. Thereby, when the circuit board 1 is applied to an electronic component, it becomes easy to secure an operation space of an electronic element described later.

［第２実施形態］
次に、本発明の第２実施形態について図面を参照して説明する。参照する図２は、本発明の第２実施形態に係る電子部品の断面図である。第２実施形態に係る電子部品は、上述した第１実施形態に係る回路基板１を含む。よって、図２において、図１と同一の構成要素には同一の符号を付し、その説明は省略する。なお、第２実施形態に係る電子部品は、上述した本発明の第１の電子部品の一例である。[Second Embodiment]
Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 2 to be referred to is a cross-sectional view of an electronic component according to the second embodiment of the present invention. The electronic component according to the second embodiment includes the circuit board 1 according to the first embodiment described above. Therefore, in FIG. 2, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted. The electronic component according to the second embodiment is an example of the first electronic component of the present invention described above.

図２に示すように、第２実施形態に係る電子部品２は、上述した第１実施形態に係る回路基板１と、回路基板１に搭載された電子素子２０と、電子素子２０を覆う蓋体２１とを含む。蓋体２１は、サンドブラスト法やエッチング法等の手段を用いて形成された凹部２１ａを有する。そして、電子素子２０は、電子素子接続電極１２ａに導電性接着剤２２を介して搭載されている。また、第２導電膜１３と蓋体２１とは、接着層２３を介して接着されている。接着層２３の構成材料としては、金−錫めっき膜や金−錫ペースト、あるいは低融点ガラス等が使用できる。このように、第２実施形態に係る電子部品２は、上述した本発明の第１実施形態に係る回路基板１を用いるため、電子部品２の気密性の向上が可能となる。  As shown in FIG. 2, the electronic component 2 according to the second embodiment includes the circuit board 1 according to the first embodiment described above, the electronic element 20 mounted on the circuit board 1, and a lid that covers the electronic element 20. 21. The lid 21 has a recess 21a formed by using a sandblasting method, an etching method, or the like. The electronic element 20 is mounted on the electronic element connection electrode 12 a via the conductive adhesive 22. In addition, the second conductive film 13 and the lid body 21 are bonded via an adhesive layer 23. As a constituent material of the adhesive layer 23, a gold-tin plating film, a gold-tin paste, a low melting point glass, or the like can be used. Thus, since the electronic component 2 according to the second embodiment uses the circuit board 1 according to the first embodiment of the present invention described above, the airtightness of the electronic component 2 can be improved.

また、絶縁基板１０の第１主面１０ａにおける電子素子２０と面する領域には、凹部１０ｃが形成されている。これにより、電子素子２０の動作空間（蓋体２１と第１主面１０ａとの間）の確保が容易となる。なお、電子素子２０として水晶片を用いる場合は、蓋体２１と第１主面１０ａとの間の間隔が２００μｍ以上であることが好ましい。その場合、凹部１０ｃの深さを３０〜５０μｍ程度とすればよい。  A recess 10 c is formed in a region facing the electronic element 20 on the first main surface 10 a of the insulating substrate 10. Thereby, it becomes easy to secure an operation space of the electronic element 20 (between the lid 21 and the first main surface 10a). In addition, when using a crystal piece as the electronic element 20, it is preferable that the space | interval between the cover body 21 and the 1st main surface 10a is 200 micrometers or more. In that case, what is necessary is just to make the depth of the recessed part 10c into about 30-50 micrometers.

また、電子素子２０として水晶片を用いる場合は、電子素子２０を蓋体２１で覆った後でも、水晶片にレーザーを照射することで周波数調整を行うことができるように、蓋体２１の構成材料として上記レーザーの透過性が高いガラスを使用するのが好ましい。また、電子素子２０として発光ダイオードを用いる場合は、蓋体２１の構成材料として可視光の透過性が高いガラスを使用するのが好ましい。  Further, when a crystal piece is used as the electronic element 20, the structure of the lid body 21 is such that frequency adjustment can be performed by irradiating the crystal piece with a laser even after the electronic element 20 is covered with the lid body 21. As the material, it is preferable to use glass having high laser transmittance. When a light emitting diode is used as the electronic element 20, it is preferable to use glass having a high visible light transmission property as a constituent material of the lid 21.

次に、上述した第２実施形態に係る電子部品２の製造方法の一例について図面を参照して説明する。参照する図３Ａ〜Ｊは、第２実施形態に係る電子部品２の製造方法の一例を示す工程断面図である。このうち図３Ａ〜Ｇは、上述した第１実施形態に係る回路基板１の製造方法の一例を示す工程断面図である。なお、図３Ａ〜Ｊにおいて、図１及び図２と同一の構成要素には同一の符号を付し、その説明は省略する。  Next, an example of a method for manufacturing the electronic component 2 according to the second embodiment will be described with reference to the drawings. 3A to J to be referred to are process cross-sectional views illustrating an example of a method for manufacturing the electronic component 2 according to the second embodiment. 3A to 3G are process cross-sectional views illustrating an example of a method for manufacturing the circuit board 1 according to the first embodiment described above. 3A to 3J, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and description thereof is omitted.

まず、図３Ａに示すように、熱膨張係数が３×１０−６／℃〜８×１０−６／℃の無アルカリガラスからなる絶縁基板１０（厚み：１５０μｍ）を用意する。First, as shown in FIG. 3A, an insulating substrate 10 (thickness: 150 μm) made of non-alkali glass having a thermal expansion coefficient of 3 × 10 −6 / ° C. to 8 × 10 −6 / ° C. is prepared.

次に、図３Ｂに示すように、絶縁基板１０の第１主面１０ａに、深さが３０〜５０μｍの凹部１０ｃをサンドブラスト法により形成する。  Next, as illustrated in FIG. 3B, a recess 10 c having a depth of 30 to 50 μm is formed on the first main surface 10 a of the insulating substrate 10 by a sandblast method.

続いて、図３Ｃに示すように、絶縁基板１０の第１主面１０ａ側からサンドブラスト法でスルーホール１１を形成する。この際、第１主面１０ａから第２主面１０ｂにかけてスルーホール１１の径が漸次小さくなるように形成することが好ましい。この場合、スルーホール１１の開口径は、例えば、第１主面１０ａ側を１２０μｍとし、第２主面１０ｂ側を８０μｍとすればよい。  Subsequently, as illustrated in FIG. 3C, the through hole 11 is formed from the first main surface 10 a side of the insulating substrate 10 by the sandblast method. At this time, it is preferable to form the through hole 11 so that the diameter of the through hole 11 gradually decreases from the first main surface 10a to the second main surface 10b. In this case, the opening diameter of the through hole 11 may be, for example, 120 μm on the first main surface 10 a side and 80 μm on the second main surface 10 b side.

次に、図３Ｄに示すように、絶縁基板１０の表面及びスルーホール１１の内壁に導電膜７を形成する。例えば、絶縁基板１０の表面及びスルーホール１１の内壁に、スパッタリング法によりクロム薄膜（厚み：０．１μｍ）を形成し、このクロム薄膜上に、スパッタリング法によりパラジウム薄膜（厚み：０．０５μｍ）を形成した後、このパラジウム薄膜上に、電解めっき法により金薄膜（厚み：０．５〜１．０μｍ）を形成することにより、クロム薄膜、パラジウム薄膜及び金薄膜からなる導電膜７を形成することができる。  Next, as illustrated in FIG. 3D, the conductive film 7 is formed on the surface of the insulating substrate 10 and the inner wall of the through hole 11. For example, a chromium thin film (thickness: 0.1 μm) is formed on the surface of the insulating substrate 10 and the inner wall of the through hole 11 by sputtering, and a palladium thin film (thickness: 0.05 μm) is formed on the chromium thin film by sputtering. After the formation, a conductive film 7 made of a chromium thin film, a palladium thin film, and a gold thin film is formed on the palladium thin film by forming a gold thin film (thickness: 0.5 to 1.0 μm) by electrolytic plating. Can do.

次に、導電膜７上の所定の箇所にレジスト膜（図示せず）を形成した後、導電膜７上の上記レジスト膜で覆われていない箇所をエッチングして、図３Ｅに示す第１及び第２導電膜１２，１３を形成する。  Next, after a resist film (not shown) is formed at a predetermined location on the conductive film 7, the portions on the conductive film 7 that are not covered with the resist film are etched, and the first and the second films shown in FIG. Second conductive films 12 and 13 are formed.

続いて、還元性雰囲気（Ｎ２ガス等）中で３００℃の加熱温度に設定されたヒーター（図示せず）上に絶縁基板１０を押さえガイド（図示せず）でセットし、ワイヤーボンダーのボンディングヘッド（図示せず）に組み込まれた上下動式のキャピラリーツール６（図３Ｆ参照）をスルーホール１１の真上に合わせて配置する。この際の位置合わせはワイヤーボンダーに備えられた位置認識装置により行うことができる。このときの位置精度は、例えば±５μｍ以下である。また、キャピラリーツール６には金属ワイヤ５（図３Ｆ参照）が挿通されている。金属ワイヤ５の構成材料としては、耐食性が高い金が好ましい。そして、トーチ（図示せず）により金属ワイヤ５の先端部を加熱溶融して、略球状の金属部材１４（図３Ｆ参照）を形成する。この金属部材１４は、直径が金属ワイヤ５の約３〜４倍程度となる。よって、例えば金属部材１４の直径を１２０μｍ程度の大きさにする場合は、金属ワイヤ５として直径が３８μｍ程度のものを使用すればよい。なお、金属部材１４は、金属ワイヤ５の先端部とトーチ（図示せず）との間で火花放電を発生させることにより形成している。Subsequently, the insulating substrate 10 is set with a pressing guide (not shown) on a heater (not shown) set to a heating temperature of 300 ° C. in a reducing atmosphere (N 2 gas or the like), and wire bonder bonding is performed. A vertically moving capillary tool 6 (refer to FIG. 3F) incorporated in a head (not shown) is arranged right above the through hole 11. The alignment at this time can be performed by a position recognition device provided in the wire bonder. The positional accuracy at this time is, for example, ± 5 μm or less. A metal wire 5 (see FIG. 3F) is inserted through the capillary tool 6. As a constituent material of the metal wire 5, gold having high corrosion resistance is preferable. And the front-end | tip part of the metal wire 5 is heat-melted with a torch (not shown), and the substantially spherical metal member 14 (refer FIG. 3F) is formed. The metal member 14 has a diameter of about 3 to 4 times that of the metal wire 5. Therefore, for example, when the metal member 14 has a diameter of about 120 μm, the metal wire 5 having a diameter of about 38 μm may be used. The metal member 14 is formed by generating a spark discharge between the tip of the metal wire 5 and a torch (not shown).

次に、図３Ｆに示すように、キャピラリーツール６を下降させて、金属部材１４をスルーホール１１内に１００〜３００ｇｆの荷重で押圧しながら充填する。この際、キャピラリーツール６に対し図１ＢのＹ方向に超音波振動を加え、同時にキャピラリーツール６に対し図１ＢのＸ方向に機械的な微振動を加える。この時の超音波の発振周波数は６０〜１２０ｋＨｚが好ましく、超音波の印加時間は１０〜５０ｍｓが好ましい。また、機械的な微振動を加える方法としては、例えばボンディングヘッドを上記Ｘ方向に振動させる方法が挙げられる。このときのＸ方向の振動幅は、超音波の振動幅と同程度（例えば５〜１０μｍ）であることが好ましい。このようにして、金属部材１４と接続導電膜１２ｂとを接合する。この後、キャピラリーツール６を上昇させ、金属ワイヤ５を切断する。これにより、図３Ｇに示す回路基板１が得られる。なお、金属ワイヤ５を切断する際に、トーチ（図示せず）で加熱することによって切断すると、切断と同時に略球状の金属部材１４が形成されるため、回路基板１を連続して製造する場合に作業性が向上する。また、本実施形態では、上述したような超音波併用熱圧着法を用いるため、接続導電膜１２ｂと金属部材１４とが強固に接合される。よって、後述するように、電子部品２（図３Ｊ参照）を形成した際、スルーホール１１の密閉性が高くなるため、気密性の高い電子部品２とすることができる。  Next, as shown in FIG. 3F, the capillary tool 6 is lowered and the metal member 14 is filled into the through hole 11 while being pressed with a load of 100 to 300 gf. At this time, ultrasonic vibration is applied to the capillary tool 6 in the Y direction of FIG. 1B, and at the same time, mechanical fine vibration is applied to the capillary tool 6 in the X direction of FIG. 1B. The ultrasonic oscillation frequency at this time is preferably 60 to 120 kHz, and the ultrasonic application time is preferably 10 to 50 ms. Further, as a method of applying mechanical micro vibration, for example, a method of vibrating the bonding head in the X direction can be mentioned. The vibration width in the X direction at this time is preferably about the same as the vibration width of ultrasonic waves (for example, 5 to 10 μm). Thus, the metal member 14 and the connection conductive film 12b are joined. Thereafter, the capillary tool 6 is raised and the metal wire 5 is cut. Thereby, the circuit board 1 shown in FIG. 3G is obtained. When cutting the metal wire 5 by heating with a torch (not shown), a substantially spherical metal member 14 is formed simultaneously with the cutting, and therefore the circuit board 1 is manufactured continuously. Workability is improved. In the present embodiment, since the ultrasonic combined thermocompression method as described above is used, the connection conductive film 12b and the metal member 14 are firmly bonded. Therefore, as will be described later, when the electronic component 2 (see FIG. 3J) is formed, the airtightness of the through hole 11 is increased, so that the electronic component 2 having high airtightness can be obtained.

続いて、図３Ｈに示すように、回路基板１の電子素子接続電極１２ａ上に導電性接着剤２２を介して電子素子２０を搭載する。これにより、回路基板１の外部接続電極１２ｃは、接続導電膜１２ｂ、電子素子接続電極１２ａ及び導電性接着剤２２を介して電子素子２０と電気的に接続される。なお、本実施形態では、電子素子２０として水晶片を用いている。  Subsequently, as shown in FIG. 3H, the electronic element 20 is mounted on the electronic element connection electrode 12 a of the circuit board 1 via the conductive adhesive 22. Thereby, the external connection electrode 12 c of the circuit board 1 is electrically connected to the electronic element 20 through the connection conductive film 12 b, the electronic element connection electrode 12 a, and the conductive adhesive 22. In the present embodiment, a crystal piece is used as the electronic element 20.

次に、真空雰囲気中で回路基板１を位置決め用冶具（図示せず）にセットした後、蓋体２１を回路基板１の真上に位置合わせし（図３Ｉ参照）、蓋体２１と回路基板１とを接着する。この際、図３Ｉに示すように、蓋体２１の回路基板１との接続部には、接着層２３が予め設けられている。本実施形態では、接着層２３として、電解めっきにより形成した金−錫合金（厚み：１０〜１５μｍ）を用いている。この場合、金−錫合金の質量比（金：錫）は、例えば４：１とすればよい。  Next, after the circuit board 1 is set on a positioning jig (not shown) in a vacuum atmosphere, the lid 21 is aligned directly above the circuit board 1 (see FIG. 3I), and the lid 21 and the circuit board are aligned. 1 is bonded. At this time, as shown in FIG. 3I, an adhesive layer 23 is provided in advance at the connection portion between the lid 21 and the circuit board 1. In the present embodiment, a gold-tin alloy (thickness: 10 to 15 μm) formed by electrolytic plating is used as the adhesive layer 23. In this case, the mass ratio of gold-tin alloy (gold: tin) may be 4: 1, for example.

次に、蓋体２１を５×１０４〜６×１０４Ｐａで加圧しながら、２９０〜３１０℃のＮ２ガス雰囲気炉中で回路基板１と共に加熱する。この時の加熱時間は３０〜６０秒が好ましい。これにより、回路基板１と蓋体２１とが接着層２３によって接合され、気密性が高い電子部品２が得られる（図３Ｊ）。なお、図３Ｊに示す電子部品２は、長胴方向及び短胴方向の寸法がそれぞれ２．０ｍｍ及び１．６ｍｍで、厚みが０．５ｍｍであるが、上記製造方法によれば、更に薄型の電子部品を安価に製造することができる。例えば、長胴方向及び短胴方向の寸法がそれぞれ１．６ｍｍ及び１．０ｍｍで、厚みが０．４ｍｍの電子部品を安価に製造することができる。Next, the lid 21 is heated together with the circuit board 1 in an N 2 gas atmosphere furnace at 290 to 310 ° C. while being pressurized at 5 × 10 4 to 6 × 10 4 Pa. The heating time at this time is preferably 30 to 60 seconds. Thereby, the circuit board 1 and the cover body 21 are joined by the adhesive layer 23, and the electronic component 2 with high airtightness is obtained (FIG. 3J). Note that the electronic component 2 shown in FIG. 3J has dimensions of 2.0 mm and 1.6 mm in the long torso direction and 1.6 mm in the short torso direction, respectively, and a thickness of 0.5 mm. Electronic components can be manufactured at low cost. For example, an electronic component having dimensions of 1.6 mm and 1.0 mm in the long and short cylinder directions and a thickness of 0.4 mm can be manufactured at low cost.

［第３実施形態］
次に、本発明の第３実施形態について図面を参照して説明する。参照する図４は、本発明の第３実施形態に係る回路基板の断面図である。なお、第３実施形態に係る回路基板は、上述した本発明の第２の回路基板の一例である。また、図４において、図１と同一の構成要素には同一の符号を付し、その説明は省略する。[Third Embodiment]
Next, a third embodiment of the present invention will be described with reference to the drawings. FIG. 4 to be referred to is a cross-sectional view of a circuit board according to the third embodiment of the present invention. The circuit board according to the third embodiment is an example of the above-described second circuit board of the present invention. In FIG. 4, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted.

図４に示すように、第３実施形態に係る回路基板３において、２つのスルーホール１１ａ，１１ｂのうちスルーホール１１ｂ内には、第１実施形態に係る回路基板１（図１Ａ参照）と同様に金属部材１４が充填されている。一方、スルーホール１１ａは、第１主面１０ａ側の開口部が金属部材３０で塞がれている。金属部材３０は、略半球状に形成されており、その半球面と第１導電膜１２とが接合されている。また、第１主面１０ａには凹部が形成されていない。その他は、上述した第１実施形態に係る回路基板１（図１Ａ参照）と同様である。上記構成を有することにより、第３実施形態に係る回路基板３は、上述した第１実施形態に係る回路基板１と同様の効果を発揮することができる。  As shown in FIG. 4, in the circuit board 3 according to the third embodiment, the two through holes 11a and 11b have the same inside of the through hole 11b as the circuit board 1 according to the first embodiment (see FIG. 1A). Is filled with a metal member 14. On the other hand, the through hole 11 a is closed with the metal member 30 at the opening on the first main surface 10 a side. The metal member 30 is formed in a substantially hemispherical shape, and the hemispherical surface and the first conductive film 12 are joined. Further, no recess is formed in the first main surface 10a. Others are the same as the circuit board 1 (refer FIG. 1A) which concerns on 1st Embodiment mentioned above. By having the said structure, the circuit board 3 which concerns on 3rd Embodiment can exhibit the effect similar to the circuit board 1 which concerns on 1st Embodiment mentioned above.

また、第３実施形態に係る回路基板３によれば、金属部材３０の平面部３０ａに、導電性材料等を介さずに電子素子を直接搭載することができるため、電子部品に適用した際、電子部品の薄型化を容易に行うことができる。なお、図４に示すスルーホール１１ａ，１１ｂでは、第１主面１０ａから第２主面１０ｂにかけてその径が漸次小さくなっているが、スルーホール１１ａ，１１ｂの径が漸次小さくなっていなくてもよい。即ち、スルーホール１１ａ，１１ｂの第１主面１０ａ側の開口径が、スルーホール１１ａ，１１ｂの第２主面１０ｂ側の開口径と同じか小さくてもよい。  In addition, according to the circuit board 3 according to the third embodiment, an electronic element can be directly mounted on the flat surface portion 30a of the metal member 30 without using a conductive material or the like. Electronic components can be easily reduced in thickness. In the through holes 11a and 11b shown in FIG. 4, the diameter gradually decreases from the first main surface 10a to the second main surface 10b. However, even though the diameters of the through holes 11a and 11b are not gradually decreased. Good. That is, the opening diameter of the through holes 11a and 11b on the first main surface 10a side may be the same as or smaller than the opening diameter of the through holes 11a and 11b on the second main surface 10b side.

［第４実施形態］
次に、本発明の第４実施形態について図面を参照して説明する。参照する図５は、本発明の第４実施形態に係る電子部品の断面図である。第４実施形態に係る電子部品は、上述した第３実施形態に係る回路基板３を含む。なお、第４実施形態に係る電子部品は、上述した本発明の第２の電子部品の一例である。また、図５において、図２及び図４と同一の構成要素には同一の符号を付し、その説明は省略する。[Fourth Embodiment]
Next, a fourth embodiment of the present invention will be described with reference to the drawings. FIG. 5 to be referred to is a cross-sectional view of an electronic component according to the fourth embodiment of the present invention. The electronic component according to the fourth embodiment includes the circuit board 3 according to the third embodiment described above. The electronic component according to the fourth embodiment is an example of the second electronic component of the present invention described above. In FIG. 5, the same components as those in FIGS. 2 and 4 are denoted by the same reference numerals, and the description thereof is omitted.

図５に示すように、第４実施形態に係る電子部品４は、上述した第２実施形態に係る電子部品２（図２参照）に対し、回路基板として第３実施形態に係る回路基板３を用いたことと、電子素子２０が金属部材３０上に直接搭載されていること以外は、第２実施形態に係る電子部品２と同様である。よって、第４実施形態に係る電子部品４は、上述した第２実施形態に係る電子部品２と同様の効果を有する上、導電性材料等を介さずに電子素子２０が搭載されているため、薄型化を容易に行うことができる。なお、電子素子２０の動作空間を確保するためには、電子素子２０と電子素子接続電極１２ａとの間の間隔が、３０〜５０μｍの範囲であることが好ましい。  As shown in FIG. 5, the electronic component 4 according to the fourth embodiment is different from the electronic component 2 according to the second embodiment (see FIG. 2) in that the circuit board 3 according to the third embodiment is used as a circuit board. It is the same as the electronic component 2 according to the second embodiment except that it is used and the electronic element 20 is directly mounted on the metal member 30. Therefore, the electronic component 4 according to the fourth embodiment has the same effect as the electronic component 2 according to the second embodiment described above, and the electronic element 20 is mounted without using a conductive material or the like. Thinning can be easily performed. In addition, in order to ensure the operation space of the electronic element 20, it is preferable that the space | interval between the electronic element 20 and the electronic element connection electrode 12a is the range of 30-50 micrometers.

次に、上述した第４実施形態に係る電子部品４の製造方法の一例について図面を参照して説明する。参照する図６Ａ〜Ｄは、第４実施形態に係る電子部品４の製造方法の一例を示す工程断面図である。このうち図６Ａ，Ｂは、上述した第３実施形態に係る回路基板３の製造方法の一例を示す工程断面図である。なお、図６Ａ〜Ｄにおいて、図４及び図５と同一の構成要素には同一の符号を付し、その説明は省略する。  Next, an example of a method for manufacturing the electronic component 4 according to the above-described fourth embodiment will be described with reference to the drawings. 6A to 6D to be referred to are process cross-sectional views illustrating an example of a method for manufacturing the electronic component 4 according to the fourth embodiment. 6A and 6B are process cross-sectional views illustrating an example of a method for manufacturing the circuit board 3 according to the third embodiment described above. 6A to 6D, the same components as those in FIGS. 4 and 5 are denoted by the same reference numerals, and the description thereof is omitted.

まず、上述した図３Ｃ〜Ｅと同様の工程を行って、スルーホール１１ａ，１１ｂと、第１及び第２導電膜１２，１３とが設けられた絶縁基板１０を用意する（図６Ａ）。  First, the same process as that of FIGS. 3C to E described above is performed to prepare the insulating substrate 10 provided with the through holes 11a and 11b and the first and second conductive films 12 and 13 (FIG. 6A).

次に、キャピラリーツール６（図３Ｆ参照）を用いてスルーホール１１ｂに金属部材１４を充填し、上述した図３Ｆの工程と同様に接続導電膜１２ｂと金属部材１４とを接合する（図６Ｂ）。  Next, the capillary member 6 (see FIG. 3F) is used to fill the through hole 11b with the metal member 14, and the connection conductive film 12b and the metal member 14 are joined in the same manner as in the process of FIG. 3F described above (FIG. 6B). .

続いて、キャピラリーツール６（図３Ｆ参照）を用いてスルーホール１１ａの第１主面１０ａ側の開口部を略球状の金属部材３０で塞ぎ、第１導電膜１２と金属部材３０とを接合する（図示せず）。この際、１００〜３００ｇｆの荷重で金属部材３０を押圧することにより、キャピラリーツール６を用いて略球状に形成された金属部材３０が、図６Ｂに示すような略半球状の金属部材３０となる。この際、キャピラリーツール６に挿通される金属ワイヤ５（図３Ｆ参照）としては、例えばスルーホール１１ａの第１主面１０ａ側の開口径が１２０μｍ程度である場合、直径が５１μｍ程度のものを使用すればよい。その他の条件は上述した図３Ｆの工程と同様である。このようにして、図６Ｂに示す回路基板３が得られる。  Subsequently, using the capillary tool 6 (see FIG. 3F), the opening on the first main surface 10a side of the through hole 11a is closed with a substantially spherical metal member 30, and the first conductive film 12 and the metal member 30 are joined. (Not shown). At this time, by pressing the metal member 30 with a load of 100 to 300 gf, the metal member 30 formed into a substantially spherical shape using the capillary tool 6 becomes a substantially hemispherical metal member 30 as shown in FIG. 6B. . At this time, as the metal wire 5 inserted into the capillary tool 6 (see FIG. 3F), for example, when the opening diameter on the first main surface 10a side of the through hole 11a is about 120 μm, the one having a diameter of about 51 μm is used. do it. Other conditions are the same as those in the process of FIG. 3F described above. In this way, the circuit board 3 shown in FIG. 6B is obtained.

続いて、図６Ｃに示すように、回路基板３の金属部材３０上に電子素子２０の電極部（図示せず）を重ねた後、超音波併用熱圧着法により金属部材３０と上記電極部とを接合することにより、電子素子２０を搭載する。そして、上述した図３Ｉ，Ｊと同様の工程を行うことにより、図６Ｄに示す電子部品４が得られる。  Subsequently, as shown in FIG. 6C, after the electrode part (not shown) of the electronic element 20 is stacked on the metal member 30 of the circuit board 3, the metal member 30, the electrode part, The electronic element 20 is mounted by bonding. And the electronic component 4 shown to FIG. 6D is obtained by performing the process similar to FIG. 3I and J mentioned above.

得られた電子部品４を、ＩＥＣ（Ｉｎｔｅｒｎａｔｉｏｎａｌ Ｅｌｅｃｔｏｒｏｔｅｃｈｎｉｃａｌ Ｃｏｍｍｉｓｓｉｏｎ：国際電気標準会議）６８−２−６６による不飽和型蒸気加圧試験（試験条件：１３０℃、８５％相対湿度（ＲＨ）、４０時間）での高湿条件下に曝した後、気密性試験を行った結果（各１００個）、電子部品４の気密性は良好であることが確認できた。ここでいう「気密性が良好」とは、ヘリウムをトレーサガスに用いた気密性試験機において、１×１０−９Ｐａ・ｍ３／ｓｅｃ以下の漏れ量に保持できる状態の事をいう。なお、上記気密性試験は、ＪＩＳＺ２３３１「ヘリウム漏れ試験方法（真空吹き付け法）」に準拠する試験であり、気密性試験機として、株式会社アルバック社製ヘリウムリークディテクターを用いて行った。The obtained electronic component 4 was subjected to an unsaturated steam pressurization test according to IEC (International Electrotechnical Commission) 68-2-66 (test conditions: 130 ° C., 85% relative humidity (RH), 40 hours). As a result of conducting an air tightness test after exposure to high humidity conditions (100 pieces each), it was confirmed that the air tightness of the electronic component 4 was good. Here, “good airtightness” refers to a state in which a leak rate of 1 × 10 −9 Pa · m 3 / sec or less can be maintained in an airtightness tester using helium as a tracer gas. In addition, the said airtightness test is a test based on JISZ2331 "Helium leak test method (vacuum spraying method)", and was performed using the helium leak detector by ULVAC, Inc. as an airtightness tester.

本発明は、水晶片や半導体素子等を含む電子部品に有用であり、特に、高気密性が要求される電子部品に有用である。  The present invention is useful for electronic parts including crystal pieces and semiconductor elements, and is particularly useful for electronic parts that require high airtightness.

本発明は、水晶片や半導体素子等を搭載する回路基板とその製造方法及びこれを用いた電子部品に関する。   The present invention relates to a circuit board on which a crystal piece, a semiconductor element, and the like are mounted, a manufacturing method thereof, and an electronic component using the circuit board.

従来、水晶片や半導体素子等の電子素子を搭載する回路基板では、セラミック基板に形成されたスルーホールに導電性組成物を充填し電気的導通部を形成していた。また、その形成方法としては、スルーホール内へ導電性組成物を充填した後、乾燥工程及び熱処理工程を経て電気的導通部を形成する方法を用いていた。更に、電子部品としては、電子素子を搭載した回路基板を蓋体で覆い保護しているものがあった（例えば、特許文献１参照）。   Conventionally, in a circuit board on which an electronic element such as a crystal piece or a semiconductor element is mounted, an electrically conductive part is formed by filling a through hole formed in a ceramic substrate with a conductive composition. Moreover, as the formation method, after filling the through hole with a conductive composition, a method of forming an electrically conductive portion through a drying process and a heat treatment process has been used. Further, as an electronic component, there is one in which a circuit board on which an electronic element is mounted is covered and protected (for example, see Patent Document 1).

図７は、特許文献１に記載された従来の回路基板を用いた電子部品の断面図である。図７に示すように、電子部品１０４では、セラミック材料からなる絶縁基板１０２の所定の位置に形成されたスルーホール１１０に導電性組成物を充填し、熱処理を行って電気的導通部１０８が形成されている。また、上記導電性組成物としては、銀粒子、ガラス粉末及びビヒクル（Ｖｅｈｉｃｌｅ）を含む混合物が使用されている。この混合物は、銀粒子とガラス粉末との合計量に対する銀粒子の含有量が８５〜９０重量％の範囲であり、含まれるガラス粉末の軟化温度が５５０〜６５０℃程度である。また、絶縁基板１０２としては、無機粉末とバインダとを含む複合物を焼成した後、平板状に仕上げ加工し、更に凹部１０５を設けたものが用いられている。   FIG. 7 is a cross-sectional view of an electronic component using a conventional circuit board described in Patent Document 1. As shown in FIG. 7, in the electronic component 104, a conductive composition is filled in a through hole 110 formed at a predetermined position of an insulating substrate 102 made of a ceramic material, and heat treatment is performed to form an electrically conductive portion 108. Has been. In addition, as the conductive composition, a mixture containing silver particles, glass powder, and vehicle is used. In this mixture, the silver particle content is in the range of 85 to 90% by weight with respect to the total amount of silver particles and glass powder, and the softening temperature of the contained glass powder is about 550 to 650 ° C. In addition, as the insulating substrate 102, a substrate in which a composite containing inorganic powder and a binder is fired and then finished into a flat plate shape and further provided with a recess 105 is used.

更に、電子部品１０４は、配線層１０６及び配線層１０７と、配線層１０７に実装された電子素子（水晶片）１０１と、電子素子１０１を覆って絶縁基板１０２上に設けられた蓋体１０３とを含む。また、蓋体１０３と配線層１０７、及び電子素子１０１と配線層１０７は、金−錫合金や金−シリコン合金等からなる接合層１０９を介して接着されている。
特開２００３−１０１１８１号公報 Further, the electronic component 104 includes a wiring layer 106 and a wiring layer 107, an electronic element (crystal piece) 101 mounted on the wiring layer 107, and a lid 103 that covers the electronic element 101 and is provided on the insulating substrate 102. including. The lid 103 and the wiring layer 107, and the electronic element 101 and the wiring layer 107 are bonded to each other through a bonding layer 109 made of a gold-tin alloy, a gold-silicon alloy, or the like.
JP 2003-10181 A

しかし、前記従来の構成では、電気的導通部を形成する際、７５０℃〜９００℃の熱処理を要するため、セラミック基板以外の絶縁基板を用いることが困難であった。そのため、製造コストに占める材料費の割合が大きくなり製造コストが上昇するおそれがあった。   However, in the conventional configuration, it is difficult to use an insulating substrate other than the ceramic substrate because a heat treatment at 750 ° C. to 900 ° C. is required when forming the electrically conductive portion. For this reason, the ratio of the material cost to the manufacturing cost is increased, which may increase the manufacturing cost.

また、一般に使用されるセラミック基板は、最小径が０．７μｍ程度のアルミナ粒子の集合体を含むことからアルミナ粒子間において粒界が存在するため、厚みが１５０μｍ以下のセラミック基板を用いて電子部品を構成すると、電子部品の気密性を維持することが困難となる可能性があった。また、セラミック基板の厚みを薄くすると、電気的導通部を形成する際の熱処理によって、セラミック基板が反る可能性があった。そのため、電子部品の気密性の維持が更に困難となる可能性があった。   In addition, since a ceramic substrate generally used includes an aggregate of alumina particles having a minimum diameter of about 0.7 μm, grain boundaries exist between the alumina particles, so that an electronic component using a ceramic substrate having a thickness of 150 μm or less is used. If it is configured, it may be difficult to maintain the airtightness of the electronic component. Further, when the thickness of the ceramic substrate is reduced, there is a possibility that the ceramic substrate is warped by the heat treatment in forming the electrically conductive portion. For this reason, there is a possibility that it is more difficult to maintain the airtightness of the electronic component.

本発明は上記課題を解決するものであり、薄型化が可能な上、製造コストの低減が可能な回路基板とその製造方法、及びこれを用いた気密性の向上が可能な電子部品を提供する。   The present invention solves the above-described problems, and provides a circuit board capable of being thinned and capable of reducing manufacturing costs, a manufacturing method thereof, and an electronic component capable of improving airtightness using the circuit board. .

本発明の第１の回路基板は、絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板であって、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、
前記スルーホールに充填され、かつ前記導電膜と接合する金属部材とを含むことを特徴とする。 A first circuit board of the present invention is an through-hole for connecting an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a hole,
A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
And a metal member that fills the through hole and joins the conductive film.

本発明の第２の回路基板は、絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板であって、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、
前記スルーホールにおける前記第１主面側の開口部を塞ぎ、かつ前記導電膜と接合する金属部材とを含むことを特徴とする。 A second circuit board of the present invention is an through-hole for connecting an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a hole,
A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
And a metal member that closes the opening of the through hole on the first main surface side and is bonded to the conductive film.

本発明の回路基板の第１の製造方法は、
絶縁基板の厚さ方向に、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールを形成し、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに導電膜を形成し、
略球状の金属部材を前記スルーホールに充填し、前記金属部材と前記導電膜とを接合する回路基板の製造方法である。 The first manufacturing method of the circuit board of the present invention includes:
Forming a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate in the thickness direction of the insulating substrate;
Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
In this method, the through-hole is filled with a substantially spherical metal member, and the metal member and the conductive film are joined.

本発明の回路基板の第２の製造方法は、
絶縁基板の厚さ方向に、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールを形成し、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに導電膜を形成し、
前記スルーホールにおける前記第１主面側の開口部を略球状の金属部材で塞ぎ、前記金属部材と前記導電膜とを接合する回路基板の製造方法である。 The second manufacturing method of the circuit board of the present invention includes:
Forming a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate in the thickness direction of the insulating substrate;
Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
In the method of manufacturing a circuit board, the opening on the first main surface side in the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined.

本発明の第１の電子部品は、絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板と、
前記回路基板に搭載された電子素子と、
前記電子素子を覆う蓋体とを含む電子部品であって、
前記回路基板は、前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールに充填され、かつ前記導電膜と接合する金属部材とを含み、
前記電子素子は、前記第１主面における前記開口部周囲に形成された前記導電膜に導電性材料を介して搭載されていることを特徴とする。 According to a first electronic component of the present invention, there is provided a through hole for connecting an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate, which are formed in the thickness direction of the insulating substrate. A circuit board including a hole;
Electronic elements mounted on the circuit board;
An electronic component including a lid that covers the electronic element,
The circuit board has a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and fills the through hole and joins the conductive film. A metal member,
The electronic element is mounted on the conductive film formed around the opening in the first main surface via a conductive material.

本発明の第２の電子部品は、絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板と、
前記回路基板に搭載された電子素子と、
前記電子素子を覆う蓋体とを含む電子部品であって、
前記回路基板は、前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールにおける前記第１主面側の開口部を塞ぎ、かつ前記導電膜と接合する金属部材とを含み、
前記電子素子は、前記金属部材に搭載されていることを特徴とする。 According to a second electronic component of the present invention, the through-hole for connecting the insulating substrate and the first main surface of the insulating substrate and the second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a hole;
Electronic elements mounted on the circuit board;
An electronic component including a lid that covers the electronic element,
The circuit board includes a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and an opening on the first main surface side of the through hole. A metal member that closes and joins the conductive film,
The electronic element is mounted on the metal member.

本発明の回路基板とその製造方法によれば、電気的導通部を形成する際、高温での熱処理が不要となるため、例えばセラミック基板以外の基板（ガラス基板等）を用いることができる。よって、薄型化が可能な上、製造コストの低減が可能となる。また、本発明の電子部品によれば、上記本発明の回路基板を用いるため、気密性の向上が可能となる。   According to the circuit board and the manufacturing method thereof of the present invention, when the electrically conductive portion is formed, a heat treatment at a high temperature is not required, and therefore, for example, a substrate (such as a glass substrate) other than the ceramic substrate can be used. Therefore, the thickness can be reduced and the manufacturing cost can be reduced. Further, according to the electronic component of the present invention, since the circuit board of the present invention is used, the airtightness can be improved.

本発明の第１の回路基板は、絶縁基板と、この絶縁基板の厚さ方向に形成された、絶縁基板の第１主面と絶縁基板の第２主面とを接続するためのスルーホールとを含む。ここで、「第１主面」とは、上記回路基板を後述する電子部品に適用した際、電子素子が搭載される側の絶縁基板の主面をいう。後述する本発明の第２の回路基板においても同様である。   A first circuit board of the present invention includes an insulating substrate, and a through hole formed in the thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate. including. Here, the “first main surface” refers to the main surface of the insulating substrate on the side where the electronic element is mounted when the circuit board is applied to an electronic component described later. The same applies to the second circuit board of the present invention described later.

上記絶縁基板は、ガラス基板であることが好ましい。ガラス基板は酸化珪素分子がつながって出来た境目のない構造を有しているため、セラミック基板に比べ密に形成されている。よって、上記絶縁基板がガラス基板の場合は、後述する電子部品に適用した際、電子部品の気密性の向上が可能となる。ガラス基板としては、例えば、熱膨張係数が３×１０-6／℃〜８×１０-6／℃の硼珪酸ガラスや、同じく熱膨張係数が３×１０-6／℃〜８×１０-6／℃の無アルカリガラス、あるいは熱膨張係数が８×１０-6／℃〜１．２×１０-5／℃のソーダガラス等が使用できる。また、その厚みは、例えば１００〜３００μｍ程度である。 The insulating substrate is preferably a glass substrate. Since the glass substrate has a seamless structure formed by connecting silicon oxide molecules, it is formed more densely than the ceramic substrate. Therefore, when the said insulating substrate is a glass substrate, when applied to the electronic component mentioned later, the airtightness of an electronic component can be improved. As the glass substrate, for example, borosilicate glass thermal expansion coefficient of 3 × 10 -6 / ℃ ~8 × 10 -6 / ℃, also the thermal expansion coefficient of 3 × 10 -6 / ℃ ~8 × 10 -6 An alkali-free glass having a thermal expansion coefficient of 8 × 10 −6 / ° C. to 1.2 × 10 −5 / ° C. can be used. Moreover, the thickness is about 100-300 micrometers, for example.

上記スルーホールは、上記第１主面から上記第２主面にかけてその径が漸次小さくなっていることが好ましい。後述する金属部材の充填を容易に行うことができるからである。スルーホールの径は、絶縁基板の厚みに応じて適宜設定すればよいが、例えば絶縁基板の厚みが１５０μｍの場合は、上記第１主面側の開口径を１００μｍ以上１５０μｍ以下の範囲とすればよく、上記第２主面側の開口径を５０μｍ以上１００μｍ以下の範囲とすればよい。また、スルーホールの形成は、例えばサンドブラスト法やエッチング法等により行うことができる。特に、サンドブラスト法でスルーホールを形成すると、スルーホールの内壁がブラストのメディアにより適度に粗面化されるため、スルーホールの内壁と後述する導電膜との密着性が向上する。   It is preferable that the diameter of the through hole gradually decreases from the first main surface to the second main surface. This is because the metal member described later can be easily filled. The diameter of the through hole may be set as appropriate according to the thickness of the insulating substrate. For example, when the thickness of the insulating substrate is 150 μm, the opening diameter on the first main surface side may be in the range of 100 μm to 150 μm. The opening diameter on the second main surface side may be in the range of 50 μm to 100 μm. The through hole can be formed by, for example, a sand blast method or an etching method. In particular, when the through hole is formed by the sand blast method, the inner wall of the through hole is appropriately roughened by the blasting medium, so that the adhesion between the inner wall of the through hole and the conductive film described later is improved.

そして、本発明の第１の回路基板は、上記スルーホールの内壁と上記第１及び第２主面における上記スルーホールの開口部周囲とに形成された導電膜と、上記スルーホールに充填され、かつ上記導電膜と接合する金属部材とを含む。金属部材は、例えば金、銅等の金属材料からなるため、導電膜と接合する際において高温（例えば７５０℃以上）での熱処理を要しない。よって、セラミック基板以外の基板（例えばガラス基板等）を用いることができるため、薄型化が可能な上、製造コストの低減が可能な回路基板を提供できる。   And the 1st circuit board of the present invention is filled in the through hole, the conductive film formed in the inner wall of the through hole and the periphery of the opening of the through hole in the first and second main surfaces, And a metal member bonded to the conductive film. Since the metal member is made of a metal material such as gold or copper, for example, heat treatment at a high temperature (for example, 750 ° C. or higher) is not required when the metal member is bonded to the conductive film. Therefore, since a substrate other than a ceramic substrate (for example, a glass substrate) can be used, a circuit substrate that can be reduced in thickness and can be manufactured at a reduced cost can be provided.

上記導電膜としては、例えばクロム、チタン、ニッケル、パラジウム、金等からなる金属薄膜が使用できる。導電膜は、１層の金属薄膜で形成してもよいし、複数層の金属薄膜で形成してもよい。複数層の金属薄膜で形成する場合は、クロム薄膜上にパラジウム薄膜及び金薄膜を順次積層した導電膜が好ましい。クロム薄膜と、保護層となる金薄膜との間にパラジウム薄膜が介在するため、このパラジウム薄膜が金薄膜とクロム薄膜との接着層として機能するからである。また、クロム薄膜はガラス基板との密着性が高いため、上記絶縁基板としてガラス基板を使用する場合は、上記組み合わせ（クロム薄膜／パラジウム薄膜／金薄膜）の導電膜が特に好ましい。また、上記組み合わせにおける各金属薄膜の厚みは、例えば、クロム薄膜が０．０５〜０．１μｍ程度であり、パラジウム薄膜が０．０１〜０．０５μｍ程度であり、金薄膜が０．３〜１．０μｍ程度である。上述した金属薄膜は、例えばスパッタリング法やめっき法等の手段を用いて形成できる。例えば、クロム薄膜やチタン薄膜やパラジウム薄膜を０．０５〜０．１μｍ程度の厚さに形成する場合は、スパッタリング法を用いて形成することができる。また、例えばニッケル薄膜を１〜２μｍ程度の厚さに形成する場合は、無電解めっき法を用いて形成することができる。また、スパッタリング法やめっき法によって形成された金属薄膜の保護層として、金薄膜を０．３〜１．０μｍ程度の厚さに形成する場合は、電解めっき法を用いて形成することができる。なお、金薄膜はスパッタリング法で形成することもできる。また、上記金薄膜の代わりに銀薄膜や銅薄膜を用いてもよい。銀薄膜や銅薄膜は、金薄膜と同様にスパッタリング法やめっき法によって形成することができる。   As the conductive film, for example, a metal thin film made of chromium, titanium, nickel, palladium, gold or the like can be used. The conductive film may be formed of a single-layer metal thin film or a multi-layer metal thin film. In the case of forming with a plurality of metal thin films, a conductive film in which a palladium thin film and a gold thin film are sequentially laminated on a chromium thin film is preferable. This is because a palladium thin film is interposed between the chromium thin film and the gold thin film serving as the protective layer, and this palladium thin film functions as an adhesive layer between the gold thin film and the chromium thin film. Further, since the chromium thin film has high adhesion to the glass substrate, the conductive film of the above combination (chromium thin film / palladium thin film / gold thin film) is particularly preferable when the glass substrate is used as the insulating substrate. The thickness of each metal thin film in the above combination is, for example, about 0.05 to 0.1 μm for a chromium thin film, about 0.01 to 0.05 μm for a palladium thin film, and 0.3 to 1 for a gold thin film. About 0.0 μm. The metal thin film described above can be formed using means such as sputtering or plating. For example, when a chromium thin film, a titanium thin film, or a palladium thin film is formed to a thickness of about 0.05 to 0.1 μm, it can be formed using a sputtering method. For example, when a nickel thin film is formed to a thickness of about 1 to 2 μm, it can be formed using an electroless plating method. Further, when a gold thin film is formed to a thickness of about 0.3 to 1.0 μm as a protective layer for a metal thin film formed by a sputtering method or a plating method, it can be formed using an electrolytic plating method. The gold thin film can also be formed by a sputtering method. A silver thin film or a copper thin film may be used instead of the gold thin film. A silver thin film or a copper thin film can be formed by sputtering or plating in the same manner as a gold thin film.

また、上記金属部材は、略球状に形成されていることが好ましい。スルーホールの内壁に形成された導電膜と金属部材との間の接合を均一に行うことができるからである。   The metal member is preferably formed in a substantially spherical shape. This is because the conductive film formed on the inner wall of the through hole and the metal member can be uniformly joined.

また、上記絶縁基板はシート状に形成されていることが好ましい。後述する電子部品に適用した際、電子部品の薄型化が容易となるからである。また、上記絶縁基板がシート状に形成されていると、後述する電子部品を製造する際、上記絶縁基板上に複数個の電子素子を同時に実装した後、電子素子毎に個片化して電子部品を製造することができるため、電子素子の実装工程が簡略化する。   The insulating substrate is preferably formed in a sheet shape. This is because when applied to an electronic component described later, it is easy to make the electronic component thinner. In addition, when the insulating substrate is formed in a sheet shape, when an electronic component to be described later is manufactured, a plurality of electronic elements are simultaneously mounted on the insulating substrate, and then the electronic components are separated into individual electronic components. Therefore, the mounting process of the electronic element is simplified.

次に、本発明の第２の回路基板について説明する。なお、以下の記述において、上述した本発明の第１の回路基板と同じ構成要素についての説明を省略する場合がある。   Next, the second circuit board of the present invention will be described. In the following description, description of the same components as those of the first circuit board of the present invention described above may be omitted.

本発明の第２の回路基板は、上述した本発明の第１の回路基板と同様に、絶縁基板と、この絶縁基板の厚さ方向に形成された、絶縁基板の第１主面と絶縁基板の第２主面とを接続するためのスルーホールと、このスルーホールの内壁と第１及び第２主面におけるスルーホールの開口部周囲とに形成された導電膜とを含む。そして、本発明の第２の回路基板は、上記構成に加え、上記スルーホールにおける上記第１主面側の開口部を塞ぎ、かつ上記導電膜と接合する金属部材を含む。これにより、上述した本発明の第１の回路基板と同様に、薄型化が可能な上、製造コストの低減が可能な回路基板を提供できる。   Similar to the above-described first circuit board of the present invention, the second circuit board of the present invention includes an insulating substrate, and the first main surface of the insulating substrate and the insulating substrate formed in the thickness direction of the insulating substrate. And a conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces. And the 2nd circuit board of this invention contains the metal member which plugs up the opening part of the said 1st main surface side in the said through hole, and joins the said electrically conductive film in addition to the said structure. Thereby, similarly to the above-described first circuit board of the present invention, it is possible to provide a circuit board that can be thinned and reduced in manufacturing cost.

また、本発明の第２の回路基板は、上記金属部材が略半球状に形成され、上記金属部材の半球面と上記導電膜とが接合されている回路基板であってもよい。上記第１主面側の開口部周囲に形成された導電膜と金属部材との間の接合を均一に行うことができる上、上記金属部材における上記半球面側と反対側に位置する平面部に、後述する電子素子を搭載することができるからである。   The second circuit board of the present invention may be a circuit board in which the metal member is formed in a substantially hemispherical shape, and the hemispherical surface of the metal member and the conductive film are bonded. The conductive film formed around the opening on the first main surface side and the metal member can be joined uniformly, and the flat surface portion located on the opposite side of the metal member from the hemispherical side is provided. This is because an electronic element to be described later can be mounted.

また、本発明の第２の回路基板に使用される絶縁基板は、上述した本発明の第１の回路基板と同様にガラス基板であることが好ましく、シート状に形成されていることが好ましい。   Further, the insulating substrate used for the second circuit board of the present invention is preferably a glass substrate like the above-described first circuit board of the present invention, and is preferably formed in a sheet shape.

次に、本発明の回路基板の第１の製造方法について説明する。なお、本発明の回路基板の第１の製造方法は、上述した本発明の第１の回路基板を製造するための好適な製造方法である。よって、以下の記述において、上述した本発明の第１の回路基板と重複する説明を省略する場合がある。   Next, the first manufacturing method of the circuit board of the present invention will be described. In addition, the 1st manufacturing method of the circuit board of this invention is a suitable manufacturing method for manufacturing the 1st circuit board of this invention mentioned above. Therefore, in the following description, description overlapping with the above-described first circuit board of the present invention may be omitted.

本発明の回路基板の第１の製造方法は、まず、絶縁基板の厚さ方向に、絶縁基板の第１主面と絶縁基板の第２主面とを接続するためのスルーホールを形成し、このスルーホールの内壁と上記第１及び第２主面における上記スルーホールの開口部周囲とに導電膜を形成する。スルーホール及び導電膜の形成方法は、上述の通りである。また、使用する絶縁基板は、上述した本発明の第１の回路基板と同様にガラス基板であることが好ましく、シート状に形成されていることが好ましい。   In the first manufacturing method of the circuit board of the present invention, first, a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate is formed in the thickness direction of the insulating substrate, A conductive film is formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces. The through hole and the conductive film are formed as described above. Further, the insulating substrate to be used is preferably a glass substrate like the first circuit board of the present invention described above, and is preferably formed in a sheet shape.

そして、略球状の金属部材を上記スルーホールに充填し、上記金属部材と上記導電膜とを接合する。これにより、上述した本発明の第１の回路基板を容易に製造できる。なお、「略球状の金属部材」は、例えばキャピラリーツールを用いて形成することができ、その形成方法の詳細については後述する。   Then, the through-hole is filled with a substantially spherical metal member, and the metal member and the conductive film are joined. Thereby, the first circuit board of the present invention described above can be easily manufactured. The “substantially spherical metal member” can be formed using, for example, a capillary tool, and the details of the formation method will be described later.

また、上記金属部材と上記導電膜とを接合する際は、超音波併用熱圧着法により接合するのが好ましい。この場合の「超音波併用熱圧着法」は、上記金属部材と上記導電膜との接合箇所に対して熱と荷重を加えながら超音波を印加して接合する方法である。超音波併用熱圧着法は、従来の熱と荷重を加えて接合する方式（熱圧着法）の加熱温度（３００℃を超える温度）に比べて、低温（１００〜３００℃程度）で接合することができる。よって、絶縁基板の変形を防ぐことができる。また、超音波を併用することで、導電膜と金属部材とが、超音波による摩擦熱で上記「熱圧着法」に比べより強固に接合される。   Moreover, when joining the said metal member and the said electrically conductive film, it is preferable to join by the ultrasonic thermocompression bonding method. In this case, the “ultrasonic combined thermocompression bonding method” is a method in which ultrasonic waves are applied and bonded to a bonding portion between the metal member and the conductive film while applying heat and a load. The ultrasonic thermocompression bonding method involves bonding at a low temperature (about 100 to 300 ° C) compared to the heating temperature (temperature exceeding 300 ° C) of the conventional method (thermocompression bonding method) in which heat and load are applied. Can do. Therefore, deformation of the insulating substrate can be prevented. Further, by using ultrasonic waves in combination, the conductive film and the metal member are bonded more firmly than the above-mentioned “thermocompression bonding method” by frictional heat generated by ultrasonic waves.

次に、本発明の回路基板の第２の製造方法について説明する。なお、本発明の回路基板の第２の製造方法は、上述した本発明の第２の回路基板を製造するための好適な製造方法である。また、以下の記述において、上述した本発明の第２の回路基板、及び上述した本発明の回路基板の第１の製造方法と重複する説明を省略する場合がある。   Next, the second manufacturing method of the circuit board of the present invention will be described. In addition, the 2nd manufacturing method of the circuit board of this invention is a suitable manufacturing method for manufacturing the 2nd circuit board of this invention mentioned above. Moreover, in the following description, the description which overlaps with the 2nd circuit board of this invention mentioned above and the 1st manufacturing method of the circuit board of this invention mentioned above may be abbreviate | omitted.

本発明の回路基板の第２の製造方法は、まず、絶縁基板の厚さ方向に、絶縁基板の第１主面と絶縁基板の第２主面とを接続するためのスルーホールを形成し、このスルーホールの内壁と上記第１及び第２主面における上記スルーホールの開口部周囲とに導電膜を形成する。そして、上記スルーホールにおける上記第１主面側の開口部を略球状の金属部材で塞ぎ、上記金属部材と上記導電膜とを接合する。これにより、上述した本発明の第２の回路基板を容易に製造できる。   In the second manufacturing method of the circuit board of the present invention, first, a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate is formed in the thickness direction of the insulating substrate, A conductive film is formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces. Then, the opening on the first main surface side in the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined. Thereby, the above-described second circuit board of the present invention can be easily manufactured.

また、本発明の回路基板の第２の製造方法において使用する絶縁基板については、上述した本発明の回路基板の第１の製造方法と同様にガラス基板であることが好ましく、シート状に形成されていることが好ましい。また、上記金属部材と上記導電膜とを接合する際は、上述したように超音波併用熱圧着法により接合するのが好ましい。   Further, the insulating substrate used in the second manufacturing method of the circuit board of the present invention is preferably a glass substrate, like the first manufacturing method of the circuit board of the present invention described above, and is formed in a sheet shape. It is preferable. Moreover, when joining the said metal member and the said electrically conductive film, it is preferable to join by the ultrasonic thermocompression bonding method as mentioned above.

次に、本発明の第１の電子部品について説明する。なお、本発明の第１の電子部品は、上述した本発明の第１の回路基板を含む電子部品である。よって、以下の記述において、上述した本発明の第１の回路基板と同じ構成要素についての説明を省略する場合がある。   Next, the first electronic component of the present invention will be described. In addition, the 1st electronic component of this invention is an electronic component containing the 1st circuit board of this invention mentioned above. Therefore, in the following description, the description of the same components as those of the first circuit board of the present invention described above may be omitted.

本発明の第１の電子部品は、上述した本発明の第１の回路基板と、この第１の回路基板に搭載された電子素子と、この電子素子を覆う蓋体とを含む。そして、上記電子素子は、上述した本発明の第１の回路基板の導電膜のうち、第１主面におけるスルーホールの開口部周囲に形成された領域に、導電性材料を介して搭載されている。上述したように、本発明の第１の回路基板は高温での熱処理が不要であるため、セラミック基板以外の基板（例えばガラス基板等）を用いることができる。よって、本発明の第１の電子部品によれば、電子部品の気密性の向上が可能となる。   A first electronic component of the present invention includes the above-described first circuit board of the present invention, an electronic element mounted on the first circuit board, and a lid that covers the electronic element. And the said electronic element is mounted in the area | region formed around the opening part of the through hole in the 1st main surface among the electrically conductive films of the 1st circuit board of this invention mentioned above through a conductive material. Yes. As described above, since the first circuit board of the present invention does not require heat treatment at a high temperature, a substrate other than a ceramic substrate (for example, a glass substrate) can be used. Therefore, according to the first electronic component of the present invention, the airtightness of the electronic component can be improved.

上記電子素子としては、例えば水晶片や半導体素子等が使用できる。例えば、上記電子素子が水晶片である場合、上記電子部品は水晶振動子となる。上記蓋体の材料については特に限定されないが、例えばガラス等を使用することができる。上記蓋体の厚みは、例えば０．３〜０．４ｍｍ程度である。また上記導電性材料としては、例えばエポキシ樹脂に導電微粒子として銀微粒子を配合した導電性接着剤が使用できる。   As the electronic element, for example, a crystal piece or a semiconductor element can be used. For example, when the electronic element is a crystal piece, the electronic component is a crystal resonator. Although it does not specifically limit about the material of the said cover body, For example, glass etc. can be used. The lid has a thickness of about 0.3 to 0.4 mm, for example. As the conductive material, for example, a conductive adhesive in which silver fine particles are mixed as conductive fine particles in an epoxy resin can be used.

また、上記第１主面における上記電子素子と面する領域には、凹部が形成されていてもよい。上記電子素子の動作空間の確保が容易となるからである。   Moreover, the recessed part may be formed in the area | region which faces the said electronic element in the said 1st main surface. This is because it is easy to secure the operation space of the electronic element.

次に、本発明の第２の電子部品について説明する。なお、本発明の第２の電子部品は、上述した本発明の第２の回路基板を含む電子部品である。また、以下の記述において、上述した本発明の第２の回路基板、及び上述した本発明の第１の電子部品と同じ構成要素についての説明を省略する場合がある。   Next, the second electronic component of the present invention will be described. In addition, the 2nd electronic component of this invention is an electronic component containing the 2nd circuit board of this invention mentioned above. Moreover, in the following description, description about the same component as the 2nd circuit board of this invention mentioned above and the 1st electronic component of this invention mentioned above may be abbreviate | omitted.

本発明の第２の電子部品は、上述した本発明の第２の回路基板と、この第２の回路基板に搭載された電子素子と、この電子素子を覆う蓋体とを含む。そして、上記電子素子は、上述した本発明の第２の回路基板の金属部材に搭載されている。よって、本発明の第２の電子部品によれば、上述した本発明の第１の電子部品と同様に、電子部品の気密性の向上が可能となる。   A second electronic component of the present invention includes the above-described second circuit board of the present invention, an electronic element mounted on the second circuit board, and a lid that covers the electronic element. And the said electronic element is mounted in the metal member of the 2nd circuit board of this invention mentioned above. Therefore, according to the second electronic component of the present invention, the airtightness of the electronic component can be improved in the same manner as the first electronic component of the present invention described above.

また、本発明の第２の電子部品において、電子素子と導電膜との間の間隔は、３０〜５０μｍの範囲であることが好ましい。上記電子素子の動作空間を確保した上で、電子部品の薄型化が可能となるからである。   In the second electronic component of the present invention, the distance between the electronic element and the conductive film is preferably in the range of 30 to 50 μm. This is because it is possible to reduce the thickness of the electronic component while securing the operation space of the electronic element.

以下、本発明の実施形態について、図面を参照しながら説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

［第１実施形態］
まず、本発明の第１実施形態について図面を参照して説明する。参照する図１Ａは、本発明の第１実施形態に係る回路基板の断面図である。また、参照する図１Ｂは、本発明の第１実施形態に係る回路基板の概略平面図である。なお、第１実施形態に係る回路基板は、上述した本発明の第１の回路基板の一例である。 [First Embodiment]
First, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1A to be referred to is a cross-sectional view of a circuit board according to the first embodiment of the present invention. FIG. 1B to be referred to is a schematic plan view of the circuit board according to the first embodiment of the present invention. The circuit board according to the first embodiment is an example of the first circuit board of the present invention described above.

図１Ａに示すように、第１実施形態に係る回路基板１は、絶縁基板１０と、絶縁基板１０の厚さ方向に形成された、絶縁基板１０の第１主面１０ａと絶縁基板１０の第２主面１０ｂとを接続するためのスルーホール１１と、第１導電膜１２と、第２導電膜１３と、スルーホール１１に充填され、かつ第１導電膜１２と接合する金属部材１４とを含む。第１導電膜１２は、第１主面１０ａにおけるスルーホール１１の開口部周囲に形成された電子素子接続電極１２ａと、スルーホール１１の内壁に形成された接続導電膜１２ｂと、第２主面１０ｂにおけるスルーホール１１の開口部周囲に形成された外部接続電極１２ｃとからなる。なお、第１導電膜１２は、特許請求の範囲に記載された「導電膜」に相当する。   As shown in FIG. 1A, a circuit board 1 according to the first embodiment includes an insulating substrate 10, a first main surface 10 a of the insulating substrate 10 formed in the thickness direction of the insulating substrate 10, and the first of the insulating substrate 10. A through hole 11, a first conductive film 12, a second conductive film 13, and a metal member 14 filled in the through hole 11 and joined to the first conductive film 12; Including. The first conductive film 12 includes an electronic element connection electrode 12a formed around the opening of the through hole 11 in the first main surface 10a, a connection conductive film 12b formed on the inner wall of the through hole 11, and a second main surface. And an external connection electrode 12c formed around the opening of the through hole 11 at 10b. The first conductive film 12 corresponds to a “conductive film” recited in the claims.

金属部材１４は、例えば金、銅等の金属材料からなるため、第１導電膜１２と接合する際において高温（例えば７５０℃以上）での熱処理を要しない。これにより、薄型化が可能な上、製造コストの低減が可能な回路基板１とすることができる。また、金属部材１４は略球状に形成されている。これにより、スルーホール１１の内壁に形成された接続導電膜１２ｂと金属部材１４との間の接合を均一に行うことができる。   Since the metal member 14 is made of a metal material such as gold or copper, for example, heat treatment at a high temperature (for example, 750 ° C. or higher) is not required when the metal member 14 is bonded to the first conductive film 12. As a result, the circuit board 1 can be thinned and the manufacturing cost can be reduced. The metal member 14 is formed in a substantially spherical shape. Thereby, the joining between the connection conductive film 12b formed on the inner wall of the through hole 11 and the metal member 14 can be performed uniformly.

また、図１Ｂに示すように、第２導電膜１３は、絶縁基板１０の第１主面１０ａの外縁部に形成されている。この第２導電膜１３は、回路基板１を用いて電子部品を作製する際、後述する蓋体との接着面となる。   Further, as shown in FIG. 1B, the second conductive film 13 is formed on the outer edge portion of the first main surface 10 a of the insulating substrate 10. The second conductive film 13 serves as an adhesive surface with a lid, which will be described later, when an electronic component is manufactured using the circuit board 1.

また、図１Ａに示すように、スルーホール１１は、第１主面１０ａから第２主面１０ｂにかけてその径が漸次小さくなっている。これにより、金属部材１４の充填を容易に行うことができる。また、第１主面１０ａには凹部１０ｃが形成されている。これにより、回路基板１を電子部品に適用した際、後述する電子素子の動作空間の確保が容易となる。   As shown in FIG. 1A, the diameter of the through hole 11 gradually decreases from the first main surface 10a to the second main surface 10b. Thereby, the metal member 14 can be filled easily. A recess 10c is formed in the first main surface 10a. Thereby, when the circuit board 1 is applied to an electronic component, it becomes easy to secure an operation space of an electronic element described later.

［第２実施形態］
次に、本発明の第２実施形態について図面を参照して説明する。参照する図２は、本発明の第２実施形態に係る電子部品の断面図である。第２実施形態に係る電子部品は、上述した第１実施形態に係る回路基板１を含む。よって、図２において、図１と同一の構成要素には同一の符号を付し、その説明は省略する。なお、第２実施形態に係る電子部品は、上述した本発明の第１の電子部品の一例である。 [Second Embodiment]
Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 2 to be referred to is a cross-sectional view of an electronic component according to the second embodiment of the present invention. The electronic component according to the second embodiment includes the circuit board 1 according to the first embodiment described above. Therefore, in FIG. 2, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted. The electronic component according to the second embodiment is an example of the first electronic component of the present invention described above.

図２に示すように、第２実施形態に係る電子部品２は、上述した第１実施形態に係る回路基板１と、回路基板１に搭載された電子素子２０と、電子素子２０を覆う蓋体２１とを含む。蓋体２１は、サンドブラスト法やエッチング法等の手段を用いて形成された凹部２１ａを有する。そして、電子素子２０は、電子素子接続電極１２ａに導電性接着剤２２を介して搭載されている。また、第２導電膜１３と蓋体２１とは、接着層２３を介して接着されている。接着層２３の構成材料としては、金−錫めっき膜や金−錫ペースト、あるいは低融点ガラス等が使用できる。このように、第２実施形態に係る電子部品２は、上述した本発明の第１実施形態に係る回路基板１を用いるため、電子部品２の気密性の向上が可能となる。   As shown in FIG. 2, the electronic component 2 according to the second embodiment includes the circuit board 1 according to the first embodiment described above, the electronic element 20 mounted on the circuit board 1, and a lid that covers the electronic element 20. 21. The lid 21 has a recess 21a formed by using a sandblasting method, an etching method, or the like. The electronic element 20 is mounted on the electronic element connection electrode 12 a via the conductive adhesive 22. In addition, the second conductive film 13 and the lid body 21 are bonded via an adhesive layer 23. As a constituent material of the adhesive layer 23, a gold-tin plating film, a gold-tin paste, a low melting point glass, or the like can be used. Thus, since the electronic component 2 according to the second embodiment uses the circuit board 1 according to the first embodiment of the present invention described above, the airtightness of the electronic component 2 can be improved.

また、絶縁基板１０の第１主面１０ａにおける電子素子２０と面する領域には、凹部１０ｃが形成されている。これにより、電子素子２０の動作空間（蓋体２１と第１主面１０ａとの間）の確保が容易となる。なお、電子素子２０として水晶片を用いる場合は、蓋体２１と第１主面１０ａとの間の間隔が２００μｍ以上であることが好ましい。その場合、凹部１０ｃの深さを３０〜５０μｍ程度とすればよい。   A recess 10 c is formed in a region facing the electronic element 20 on the first main surface 10 a of the insulating substrate 10. Thereby, it becomes easy to secure an operation space of the electronic element 20 (between the lid 21 and the first main surface 10a). In addition, when using a crystal piece as the electronic element 20, it is preferable that the space | interval between the cover body 21 and the 1st main surface 10a is 200 micrometers or more. In that case, what is necessary is just to make the depth of the recessed part 10c into about 30-50 micrometers.

また、電子素子２０として水晶片を用いる場合は、電子素子２０を蓋体２１で覆った後でも、水晶片にレーザーを照射することで周波数調整を行うことができるように、蓋体２１の構成材料として上記レーザーの透過性が高いガラスを使用するのが好ましい。また、電子素子２０として発光ダイオードを用いる場合は、蓋体２１の構成材料として可視光の透過性が高いガラスを使用するのが好ましい。   Further, when a crystal piece is used as the electronic element 20, the structure of the lid body 21 is such that frequency adjustment can be performed by irradiating the crystal piece with a laser even after the electronic element 20 is covered with the lid body 21. As the material, it is preferable to use glass having high laser transmittance. When a light emitting diode is used as the electronic element 20, it is preferable to use glass having a high visible light transmission property as a constituent material of the lid 21.

次に、上述した第２実施形態に係る電子部品２の製造方法の一例について図面を参照して説明する。参照する図３Ａ〜Ｊは、第２実施形態に係る電子部品２の製造方法の一例を示す工程断面図である。このうち図３Ａ〜Ｇは、上述した第１実施形態に係る回路基板１の製造方法の一例を示す工程断面図である。なお、図３Ａ〜Ｊにおいて、図１及び図２と同一の構成要素には同一の符号を付し、その説明は省略する。   Next, an example of a method for manufacturing the electronic component 2 according to the second embodiment will be described with reference to the drawings. 3A to J to be referred to are process cross-sectional views illustrating an example of a method for manufacturing the electronic component 2 according to the second embodiment. 3A to 3G are process cross-sectional views illustrating an example of a method for manufacturing the circuit board 1 according to the first embodiment described above. 3A to 3J, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and description thereof is omitted.

まず、図３Ａに示すように、熱膨張係数が３×１０-6／℃〜８×１０-6／℃の無アルカリガラスからなる絶縁基板１０（厚み：１５０μｍ）を用意する。 First, as shown in FIG. 3A, an insulating substrate 10 (thickness: 150 μm) made of alkali-free glass having a thermal expansion coefficient of 3 × 10 −6 / ° C. to 8 × 10 −6 / ° C. is prepared.

次に、図３Ｂに示すように、絶縁基板１０の第１主面１０ａに、深さが３０〜５０μｍの凹部１０ｃをサンドブラスト法により形成する。   Next, as illustrated in FIG. 3B, a recess 10 c having a depth of 30 to 50 μm is formed on the first main surface 10 a of the insulating substrate 10 by a sandblast method.

続いて、図３Ｃに示すように、絶縁基板１０の第１主面１０ａ側からサンドブラスト法でスルーホール１１を形成する。この際、第１主面１０ａから第２主面１０ｂにかけてスルーホール１１の径が漸次小さくなるように形成することが好ましい。この場合、スルーホール１１の開口径は、例えば、第１主面１０ａ側を１２０μｍとし、第２主面１０ｂ側を８０μｍとすればよい。   Subsequently, as illustrated in FIG. 3C, the through hole 11 is formed from the first main surface 10 a side of the insulating substrate 10 by the sandblast method. At this time, it is preferable to form the through hole 11 so that the diameter of the through hole 11 gradually decreases from the first main surface 10a to the second main surface 10b. In this case, the opening diameter of the through hole 11 may be, for example, 120 μm on the first main surface 10 a side and 80 μm on the second main surface 10 b side.

次に、図３Ｄに示すように、絶縁基板１０の表面及びスルーホール１１の内壁に導電膜７を形成する。例えば、絶縁基板１０の表面及びスルーホール１１の内壁に、スパッタリング法によりクロム薄膜（厚み：０．１μｍ）を形成し、このクロム薄膜上に、スパッタリング法によりパラジウム薄膜（厚み：０．０５μｍ）を形成した後、このパラジウム薄膜上に、電解めっき法により金薄膜（厚み：０．５〜１．０μｍ）を形成することにより、クロム薄膜、パラジウム薄膜及び金薄膜からなる導電膜７を形成することができる。   Next, as illustrated in FIG. 3D, the conductive film 7 is formed on the surface of the insulating substrate 10 and the inner wall of the through hole 11. For example, a chromium thin film (thickness: 0.1 μm) is formed on the surface of the insulating substrate 10 and the inner wall of the through hole 11 by sputtering, and a palladium thin film (thickness: 0.05 μm) is formed on the chromium thin film by sputtering. After the formation, a conductive film 7 made of a chromium thin film, a palladium thin film, and a gold thin film is formed on the palladium thin film by forming a gold thin film (thickness: 0.5 to 1.0 μm) by electrolytic plating. Can do.

次に、導電膜７上の所定の箇所にレジスト膜（図示せず）を形成した後、導電膜７上の上記レジスト膜で覆われていない箇所をエッチングして、図３Ｅに示す第１及び第２導電膜１２，１３を形成する。   Next, after a resist film (not shown) is formed at a predetermined location on the conductive film 7, the portions on the conductive film 7 that are not covered with the resist film are etched, and the first and the second films shown in FIG. Second conductive films 12 and 13 are formed.

続いて、還元性雰囲気（Ｎ2ガス等）中で３００℃の加熱温度に設定されたヒーター（図示せず）上に絶縁基板１０を押さえガイド（図示せず）でセットし、ワイヤーボンダーのボンディングヘッド（図示せず）に組み込まれた上下動式のキャピラリーツール６（図３Ｆ参照）をスルーホール１１の真上に合わせて配置する。この際の位置合わせはワイヤーボンダーに備えられた位置認識装置により行うことができる。このときの位置精度は、例えば±５μｍ以下である。また、キャピラリーツール６には金属ワイヤ５（図３Ｆ参照）が挿通されている。金属ワイヤ５の構成材料としては、耐食性が高い金が好ましい。そして、トーチ（図示せず）により金属ワイヤ５の先端部を加熱溶融して、略球状の金属部材１４（図３Ｆ参照）を形成する。この金属部材１４は、直径が金属ワイヤ５の約３〜４倍程度となる。よって、例えば金属部材１４の直径を１２０μｍ程度の大きさにする場合は、金属ワイヤ５として直径が３８μｍ程度のものを使用すればよい。なお、金属部材１４は、金属ワイヤ５の先端部とトーチ（図示せず）との間で火花放電を発生させることにより形成している。 Subsequently, the insulating substrate 10 is set with a pressing guide (not shown) on a heater (not shown) set to a heating temperature of 300 ° C. in a reducing atmosphere (N 2 gas or the like), and bonding of the wire bonder is performed. A vertically moving capillary tool 6 (refer to FIG. 3F) incorporated in a head (not shown) is arranged right above the through hole 11. The alignment at this time can be performed by a position recognition device provided in the wire bonder. The positional accuracy at this time is, for example, ± 5 μm or less. A metal wire 5 (see FIG. 3F) is inserted through the capillary tool 6. As a constituent material of the metal wire 5, gold having high corrosion resistance is preferable. And the front-end | tip part of the metal wire 5 is heat-melted with a torch (not shown), and the substantially spherical metal member 14 (refer FIG. 3F) is formed. The metal member 14 has a diameter of about 3 to 4 times that of the metal wire 5. Therefore, for example, when the metal member 14 has a diameter of about 120 μm, the metal wire 5 having a diameter of about 38 μm may be used. The metal member 14 is formed by generating a spark discharge between the tip of the metal wire 5 and a torch (not shown).

次に、図３Ｆに示すように、キャピラリーツール６を下降させて、金属部材１４をスルーホール１１内に１００〜３００ｇｆの荷重で押圧しながら充填する。この際、キャピラリーツール６に対し図１ＢのＹ方向に超音波振動を加え、同時にキャピラリーツール６に対し図１ＢのＸ方向に機械的な微振動を加える。この時の超音波の発振周波数は６０〜１２０ｋＨｚが好ましく、超音波の印加時間は１０〜５０ｍｓが好ましい。また、機械的な微振動を加える方法としては、例えばボンディングヘッドを上記Ｘ方向に振動させる方法が挙げられる。このときのＸ方向の振動幅は、超音波の振動幅と同程度（例えば５〜１０μｍ）であることが好ましい。このようにして、金属部材１４と接続導電膜１２ｂとを接合する。この後、キャピラリーツール６を上昇させ、金属ワイヤ５を切断する。これにより、図３Ｇに示す回路基板１が得られる。なお、金属ワイヤ５を切断する際に、トーチ（図示せず）で加熱することによって切断すると、切断と同時に略球状の金属部材１４が形成されるため、回路基板１を連続して製造する場合に作業性が向上する。また、本実施形態では、上述したような超音波併用熱圧着法を用いるため、接続導電膜１２ｂと金属部材１４とが強固に接合される。よって、後述するように、電子部品２（図３Ｊ参照）を形成した際、スルーホール１１の密閉性が高くなるため、気密性の高い電子部品２とすることができる。   Next, as shown in FIG. 3F, the capillary tool 6 is lowered and the metal member 14 is filled into the through hole 11 while being pressed with a load of 100 to 300 gf. At this time, ultrasonic vibration is applied to the capillary tool 6 in the Y direction of FIG. 1B, and at the same time, mechanical fine vibration is applied to the capillary tool 6 in the X direction of FIG. 1B. The ultrasonic oscillation frequency at this time is preferably 60 to 120 kHz, and the ultrasonic application time is preferably 10 to 50 ms. Further, as a method of applying mechanical micro vibration, for example, a method of vibrating the bonding head in the X direction can be mentioned. The vibration width in the X direction at this time is preferably about the same as the vibration width of ultrasonic waves (for example, 5 to 10 μm). Thus, the metal member 14 and the connection conductive film 12b are joined. Thereafter, the capillary tool 6 is raised and the metal wire 5 is cut. Thereby, the circuit board 1 shown in FIG. 3G is obtained. When cutting the metal wire 5 by heating with a torch (not shown), a substantially spherical metal member 14 is formed simultaneously with the cutting, and therefore the circuit board 1 is manufactured continuously. Workability is improved. In the present embodiment, since the ultrasonic combined thermocompression method as described above is used, the connection conductive film 12b and the metal member 14 are firmly bonded. Therefore, as will be described later, when the electronic component 2 (see FIG. 3J) is formed, the airtightness of the through hole 11 is increased, so that the electronic component 2 having high airtightness can be obtained.

続いて、図３Ｈに示すように、回路基板１の電子素子接続電極１２ａ上に導電性接着剤２２を介して電子素子２０を搭載する。これにより、回路基板１の外部接続電極１２ｃは、接続導電膜１２ｂ、電子素子接続電極１２ａ及び導電性接着剤２２を介して電子素子２０と電気的に接続される。なお、本実施形態では、電子素子２０として水晶片を用いている。   Subsequently, as shown in FIG. 3H, the electronic element 20 is mounted on the electronic element connection electrode 12 a of the circuit board 1 via the conductive adhesive 22. Thereby, the external connection electrode 12 c of the circuit board 1 is electrically connected to the electronic element 20 through the connection conductive film 12 b, the electronic element connection electrode 12 a, and the conductive adhesive 22. In the present embodiment, a crystal piece is used as the electronic element 20.

次に、真空雰囲気中で回路基板１を位置決め用冶具（図示せず）にセットした後、蓋体２１を回路基板１の真上に位置合わせし（図３Ｉ参照）、蓋体２１と回路基板１とを接着する。この際、図３Ｉに示すように、蓋体２１の回路基板１との接続部には、接着層２３が予め設けられている。本実施形態では、接着層２３として、電解めっきにより形成した金−錫合金（厚み：１０〜１５μｍ）を用いている。この場合、金−錫合金の質量比（金：錫）は、例えば４：１とすればよい。   Next, after the circuit board 1 is set on a positioning jig (not shown) in a vacuum atmosphere, the lid 21 is aligned directly above the circuit board 1 (see FIG. 3I), and the lid 21 and the circuit board are aligned. 1 is bonded. At this time, as shown in FIG. 3I, an adhesive layer 23 is provided in advance at the connection portion between the lid 21 and the circuit board 1. In the present embodiment, a gold-tin alloy (thickness: 10 to 15 μm) formed by electrolytic plating is used as the adhesive layer 23. In this case, the mass ratio of gold-tin alloy (gold: tin) may be 4: 1, for example.

次に、蓋体２１を５×１０4〜６×１０4Ｐａで加圧しながら、２９０〜３１０℃のＮ2ガス雰囲気炉中で回路基板１と共に加熱する。この時の加熱時間は３０〜６０秒が好ましい。これにより、回路基板１と蓋体２１とが接着層２３によって接合され、気密性が高い電子部品２が得られる（図３Ｊ）。なお、図３Ｊに示す電子部品２は、長胴方向及び短胴方向の寸法がそれぞれ２．０ｍｍ及び１．６ｍｍで、厚みが０．５ｍｍであるが、上記製造方法によれば、更に薄型の電子部品を安価に製造することができる。例えば、長胴方向及び短胴方向の寸法がそれぞれ１．６ｍｍ及び１．０ｍｍで、厚みが０．４ｍｍの電子部品を安価に製造することができる。 Next, the lid body 21 is heated together with the circuit board 1 in an N 2 gas atmosphere furnace at 290 to 310 ° C. while being pressurized at 5 × 10 4 to 6 × 10 4 Pa. The heating time at this time is preferably 30 to 60 seconds. Thereby, the circuit board 1 and the cover body 21 are joined by the adhesive layer 23, and the electronic component 2 with high airtightness is obtained (FIG. 3J). Note that the electronic component 2 shown in FIG. 3J has dimensions of 2.0 mm and 1.6 mm in the long torso direction and 1.6 mm in the short torso direction, respectively, and a thickness of 0.5 mm. Electronic components can be manufactured at low cost. For example, an electronic component having dimensions of 1.6 mm and 1.0 mm in the long and short cylinder directions and a thickness of 0.4 mm can be manufactured at low cost.

［第３実施形態］
次に、本発明の第３実施形態について図面を参照して説明する。参照する図４は、本発明の第３実施形態に係る回路基板の断面図である。なお、第３実施形態に係る回路基板は、上述した本発明の第２の回路基板の一例である。また、図４において、図１と同一の構成要素には同一の符号を付し、その説明は省略する。 [Third Embodiment]
Next, a third embodiment of the present invention will be described with reference to the drawings. FIG. 4 to be referred to is a cross-sectional view of a circuit board according to the third embodiment of the present invention. The circuit board according to the third embodiment is an example of the above-described second circuit board of the present invention. In FIG. 4, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted.

図４に示すように、第３実施形態に係る回路基板３において、２つのスルーホール１１ａ，１１ｂのうちスルーホール１１ｂ内には、第１実施形態に係る回路基板１（図１Ａ参照）と同様に金属部材１４が充填されている。一方、スルーホール１１ａは、第１主面１０ａ側の開口部が金属部材３０で塞がれている。金属部材３０は、略半球状に形成されており、その半球面と第１導電膜１２とが接合されている。また、第１主面１０ａには凹部が形成されていない。その他は、上述した第１実施形態に係る回路基板１（図１Ａ参照）と同様である。上記構成を有することにより、第３実施形態に係る回路基板３は、上述した第１実施形態に係る回路基板１と同様の効果を発揮することができる。   As shown in FIG. 4, in the circuit board 3 according to the third embodiment, the two through holes 11a and 11b have the same inside of the through hole 11b as the circuit board 1 according to the first embodiment (see FIG. 1A). Is filled with a metal member 14. On the other hand, the through hole 11 a is closed with the metal member 30 at the opening on the first main surface 10 a side. The metal member 30 is formed in a substantially hemispherical shape, and the hemispherical surface and the first conductive film 12 are joined. Further, no recess is formed in the first main surface 10a. Others are the same as the circuit board 1 (refer FIG. 1A) which concerns on 1st Embodiment mentioned above. By having the said structure, the circuit board 3 which concerns on 3rd Embodiment can exhibit the effect similar to the circuit board 1 which concerns on 1st Embodiment mentioned above.

また、第３実施形態に係る回路基板３によれば、金属部材３０の平面部３０ａに、導電性材料等を介さずに電子素子を直接搭載することができるため、電子部品に適用した際、電子部品の薄型化を容易に行うことができる。なお、図４に示すスルーホール１１ａ，１１ｂでは、第１主面１０ａから第２主面１０ｂにかけてその径が漸次小さくなっているが、スルーホール１１ａ，１１ｂの径が漸次小さくなっていなくてもよい。即ち、スルーホール１１ａ，１１ｂの第１主面１０ａ側の開口径が、スルーホール１１ａ，１１ｂの第２主面１０ｂ側の開口径と同じか小さくてもよい。   In addition, according to the circuit board 3 according to the third embodiment, an electronic element can be directly mounted on the flat surface portion 30a of the metal member 30 without using a conductive material or the like. Electronic components can be easily reduced in thickness. In addition, in the through holes 11a and 11b shown in FIG. 4, the diameter gradually decreases from the first main surface 10a to the second main surface 10b. Good. That is, the opening diameter of the through holes 11a and 11b on the first main surface 10a side may be the same as or smaller than the opening diameter of the through holes 11a and 11b on the second main surface 10b side.

［第４実施形態］
次に、本発明の第４実施形態について図面を参照して説明する。参照する図５は、本発明の第４実施形態に係る電子部品の断面図である。第４実施形態に係る電子部品は、上述した第３実施形態に係る回路基板３を含む。なお、第４実施形態に係る電子部品は、上述した本発明の第２の電子部品の一例である。また、図５において、図２及び図４と同一の構成要素には同一の符号を付し、その説明は省略する。 [Fourth Embodiment]
Next, a fourth embodiment of the present invention will be described with reference to the drawings. FIG. 5 to be referred to is a cross-sectional view of an electronic component according to the fourth embodiment of the present invention. The electronic component according to the fourth embodiment includes the circuit board 3 according to the third embodiment described above. The electronic component according to the fourth embodiment is an example of the second electronic component of the present invention described above. In FIG. 5, the same components as those in FIGS. 2 and 4 are denoted by the same reference numerals, and the description thereof is omitted.

図５に示すように、第４実施形態に係る電子部品４は、上述した第２実施形態に係る電子部品２（図２参照）に対し、回路基板として第３実施形態に係る回路基板３を用いたことと、電子素子２０が金属部材３０上に直接搭載されていること以外は、第２実施形態に係る電子部品２と同様である。よって、第４実施形態に係る電子部品４は、上述した第２実施形態に係る電子部品２と同様の効果を有する上、導電性材料等を介さずに電子素子２０が搭載されているため、薄型化を容易に行うことができる。なお、電子素子２０の動作空間を確保するためには、電子素子２０と電子素子接続電極１２ａとの間の間隔が、３０〜５０μｍの範囲であることが好ましい。   As shown in FIG. 5, the electronic component 4 according to the fourth embodiment is different from the electronic component 2 according to the second embodiment (see FIG. 2) in that the circuit board 3 according to the third embodiment is used as a circuit board. It is the same as the electronic component 2 according to the second embodiment except that it is used and the electronic element 20 is directly mounted on the metal member 30. Therefore, the electronic component 4 according to the fourth embodiment has the same effect as the electronic component 2 according to the second embodiment described above, and the electronic element 20 is mounted without using a conductive material or the like. Thinning can be easily performed. In addition, in order to ensure the operation space of the electronic element 20, it is preferable that the space | interval between the electronic element 20 and the electronic element connection electrode 12a is the range of 30-50 micrometers.

次に、上述した第４実施形態に係る電子部品４の製造方法の一例について図面を参照して説明する。参照する図６Ａ〜Ｄは、第４実施形態に係る電子部品４の製造方法の一例を示す工程断面図である。このうち図６Ａ，Ｂは、上述した第３実施形態に係る回路基板３の製造方法の一例を示す工程断面図である。なお、図６Ａ〜Ｄにおいて、図４及び図５と同一の構成要素には同一の符号を付し、その説明は省略する。   Next, an example of a method for manufacturing the electronic component 4 according to the above-described fourth embodiment will be described with reference to the drawings. 6A to 6D to be referred to are process cross-sectional views illustrating an example of a method for manufacturing the electronic component 4 according to the fourth embodiment. 6A and 6B are process cross-sectional views illustrating an example of a method for manufacturing the circuit board 3 according to the third embodiment described above. 6A to 6D, the same components as those in FIGS. 4 and 5 are denoted by the same reference numerals, and the description thereof is omitted.

まず、上述した図３Ｃ〜Ｅと同様の工程を行って、スルーホール１１ａ，１１ｂと、第１及び第２導電膜１２，１３とが設けられた絶縁基板１０を用意する（図６Ａ）。   First, the same process as that of FIGS. 3C to E described above is performed to prepare the insulating substrate 10 provided with the through holes 11a and 11b and the first and second conductive films 12 and 13 (FIG. 6A).

次に、キャピラリーツール６（図３Ｆ参照）を用いてスルーホール１１ｂに金属部材１４を充填し、上述した図３Ｆの工程と同様に接続導電膜１２ｂと金属部材１４とを接合する（図６Ｂ）。   Next, the capillary member 6 (see FIG. 3F) is used to fill the through hole 11b with the metal member 14, and the connection conductive film 12b and the metal member 14 are joined in the same manner as in the process of FIG. 3F described above (FIG. 6B). .

続いて、キャピラリーツール６（図３Ｆ参照）を用いてスルーホール１１ａの第１主面１０ａ側の開口部を略球状の金属部材３０で塞ぎ、第１導電膜１２と金属部材３０とを接合する（図示せず）。この際、１００〜３００ｇｆの荷重で金属部材３０を押圧することにより、キャピラリーツール６を用いて略球状に形成された金属部材３０が、図６Ｂに示すような略半球状の金属部材３０となる。この際、キャピラリーツール６に挿通される金属ワイヤ５（図３Ｆ参照）としては、例えばスルーホール１１ａの第１主面１０ａ側の開口径が１２０μｍ程度である場合、直径が５１μｍ程度のものを使用すればよい。その他の条件は上述した図３Ｆの工程と同様である。このようにして、図６Ｂに示す回路基板３が得られる。   Subsequently, using the capillary tool 6 (see FIG. 3F), the opening on the first main surface 10a side of the through hole 11a is closed with a substantially spherical metal member 30, and the first conductive film 12 and the metal member 30 are joined. (Not shown). At this time, by pressing the metal member 30 with a load of 100 to 300 gf, the metal member 30 formed into a substantially spherical shape using the capillary tool 6 becomes a substantially hemispherical metal member 30 as shown in FIG. 6B. . At this time, as the metal wire 5 inserted into the capillary tool 6 (see FIG. 3F), for example, when the opening diameter on the first main surface 10a side of the through hole 11a is about 120 μm, the one having a diameter of about 51 μm is used. do it. Other conditions are the same as those in the process of FIG. 3F described above. In this way, the circuit board 3 shown in FIG. 6B is obtained.

続いて、図６Ｃに示すように、回路基板３の金属部材３０上に電子素子２０の電極部（図示せず）を重ねた後、超音波併用熱圧着法により金属部材３０と上記電極部とを接合することにより、電子素子２０を搭載する。そして、上述した図３Ｉ，Ｊと同様の工程を行うことにより、図６Ｄに示す電子部品４が得られる。   Subsequently, as shown in FIG. 6C, after the electrode part (not shown) of the electronic element 20 is stacked on the metal member 30 of the circuit board 3, the metal member 30, the electrode part, The electronic element 20 is mounted by bonding. And the electronic component 4 shown to FIG. 6D is obtained by performing the process similar to FIG. 3I and J mentioned above.

得られた電子部品４を、ＩＥＣ（Ｉｎｔｅｒｎａｔｉｏｎａｌ Ｅｌｅｃｔｏｒｏｔｅｃｈｎｉｃａｌ Ｃｏｍｍｉｓｓｉｏｎ：国際電気標準会議）６８−２−６６による不飽和型蒸気加圧試験（試験条件：１３０℃、８５％相対湿度（ＲＨ）、４０時間）での高湿条件下に曝した後、気密性試験を行った結果（各１００個）、電子部品４の気密性は良好であることが確認できた。ここでいう「気密性が良好」とは、ヘリウムをトレーサガスに用いた気密性試験機において、１×１０-9Ｐａ・ｍ3／ｓｅｃ以下の漏れ量に保持できる状態の事をいう。なお、上記気密性試験は、ＪＩＳＺ２３３１「ヘリウム漏れ試験方法（真空吹き付け法）」に準拠する試験であり、気密性試験機として、株式会社アルバック社製ヘリウムリークディテクターを用いて行った。 The obtained electronic component 4 was subjected to an unsaturated steam pressurization test according to IEC (International Electrotechnical Commission) 68-2-66 (test conditions: 130 ° C., 85% relative humidity (RH), 40 hours). As a result of conducting an air tightness test after exposure to high humidity conditions (100 pieces each), it was confirmed that the air tightness of the electronic component 4 was good. Here, “good airtightness” means a state in which a leak rate of 1 × 10 −9 Pa · m 3 / sec or less can be maintained in an airtightness tester using helium as a tracer gas. In addition, the said airtightness test is a test based on JISZ2331 "Helium leak test method (vacuum spraying method)", and was performed using the helium leak detector by ULVAC, Inc. as an airtightness tester.

本発明は、水晶片や半導体素子等を含む電子部品に有用であり、特に、高気密性が要求される電子部品に有用である。   The present invention is useful for electronic parts including crystal pieces and semiconductor elements, and is particularly useful for electronic parts that require high airtightness.

Ａは本発明の第１実施形態に係る回路基板の断面図であり、Ｂは本発明の第１実施形態に係る回路基板の概略平面図である。A is a sectional view of a circuit board according to the first embodiment of the present invention, and B is a schematic plan view of the circuit board according to the first embodiment of the present invention. 本発明の第２実施形態に係る電子部品の断面図である。It is sectional drawing of the electronic component which concerns on 2nd Embodiment of this invention. Ａ〜Ｊは、本発明の第２実施形態に係る電子部品の製造方法の一例を示す工程断面図である。AJ is process sectional drawing which shows an example of the manufacturing method of the electronic component which concerns on 2nd Embodiment of this invention. 本発明の第３実施形態に係る回路基板の断面図である。It is sectional drawing of the circuit board which concerns on 3rd Embodiment of this invention. 本発明の第４実施形態に係る電子部品の断面図である。It is sectional drawing of the electronic component which concerns on 4th Embodiment of this invention. Ａ〜Ｄは、本発明の第４実施形態に係る電子部品の製造方法の一例を示す工程断面図である。AD is process sectional drawing which shows an example of the manufacturing method of the electronic component which concerns on 4th Embodiment of this invention. 従来の回路基板を用いた電子部品の断面図である。It is sectional drawing of the electronic component using the conventional circuit board.

符号の説明Explanation of symbols

１，３ 回路基板
２，４ 電子部品
５ 金属ワイヤ
６ キャピラリーツール
７ 導電膜
１０ 絶縁基板
１０ａ 第１主面
１０ｂ 第２主面
１０ｃ，２１ａ 凹部
１１，１１ａ，１１ｂ スルーホール
１２ 第１導電膜
１２ａ 電子素子接続電極
１２ｂ 接続導電膜
１２ｃ 外部接続電極
１３ 第２導電膜
１４，３０ 金属部材
２０ 電子素子
２１ 蓋体
２２ 導電性接着剤（導電性材料）
２３ 接着層
３０ａ 平面部 DESCRIPTION OF SYMBOLS 1,3 Circuit board 2,4 Electronic component 5 Metal wire 6 Capillary tool 7 Conductive film 10 Insulating substrate 10a 1st main surface 10b 2nd main surface 10c, 21a Recess 11,11a, 11b Through hole 12 1st conductive film 12a Electron Element connection electrode 12b Connection conductive film 12c External connection electrode 13 Second conductive film 14, 30 Metal member 20 Electronic element 21 Lid 22 Conductive adhesive (conductive material)
23 Adhesive layer 30a Plane part

Claims (16)

絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板であって、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、
前記スルーホールに充填され、かつ前記導電膜と接合する金属部材とを含むことを特徴とする回路基板。A circuit board comprising: an insulating substrate; and a through hole formed in a thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate;
A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
A circuit board comprising: a metal member filled in the through hole and bonded to the conductive film. 前記スルーホールは、前記第１主面から前記第２主面にかけてその径が漸次小さくなっている請求項１に記載の回路基板。The circuit board according to claim 1, wherein a diameter of the through hole gradually decreases from the first main surface to the second main surface. 前記金属部材は、略球状に形成されている請求項１に記載の回路基板。The circuit board according to claim 1, wherein the metal member is formed in a substantially spherical shape. 絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板であって、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、
前記スルーホールにおける前記第１主面側の開口部を塞ぎ、かつ前記導電膜と接合する金属部材とを含むことを特徴とする回路基板。A circuit board comprising: an insulating substrate; and a through hole formed in a thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate;
A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
A circuit board comprising: a metal member that closes an opening of the through hole on the first main surface side and is bonded to the conductive film. 前記金属部材は、略半球状に形成されており、
前記金属部材の半球面と前記導電膜とが接合されている請求項４に記載の回路基板。The metal member is formed in a substantially hemispherical shape,
The circuit board according to claim 4, wherein the hemispherical surface of the metal member and the conductive film are bonded. 前記絶縁基板は、ガラス基板である請求項１又は請求項４に記載の回路基板。The circuit board according to claim 1, wherein the insulating substrate is a glass substrate. 前記絶縁基板は、シート状に形成されている請求項１，４，６のいずれか１項に記載の回路基板。The circuit board according to claim 1, wherein the insulating substrate is formed in a sheet shape. 絶縁基板の厚さ方向に、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールを形成し、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに導電膜を形成し、
略球状の金属部材を前記スルーホールに充填し、前記金属部材と前記導電膜とを接合する回路基板の製造方法。Forming a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate in the thickness direction of the insulating substrate;
Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
A method of manufacturing a circuit board, comprising filling a through-hole with a substantially spherical metal member and bonding the metal member and the conductive film. 絶縁基板の厚さ方向に、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールを形成し、
前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに導電膜を形成し、
前記スルーホールにおける前記第１主面側の開口部を略球状の金属部材で塞ぎ、前記金属部材と前記導電膜とを接合する回路基板の製造方法。Forming a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate in the thickness direction of the insulating substrate;
Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
A method of manufacturing a circuit board, wherein an opening on the first main surface side of the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined. 前記絶縁基板は、ガラス基板である請求項８又は請求項９に記載の回路基板の製造方法。The method for manufacturing a circuit board according to claim 8, wherein the insulating substrate is a glass substrate. 前記絶縁基板は、シート状に形成されている請求項８〜１０のいずれか１項に記載の回路基板の製造方法。The circuit board manufacturing method according to claim 8, wherein the insulating substrate is formed in a sheet shape. 前記金属部材と前記導電膜とを接合する際、前記金属部材と前記導電膜との接合箇所に対して熱と荷重を加えながら超音波を印加して接合する請求項８又は請求項９に記載の回路基板の製造方法。10. When joining the metal member and the conductive film, applying ultrasonic waves while applying heat and a load to a joint portion between the metal member and the conductive film, and joining them. Circuit board manufacturing method. 絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板と、
前記回路基板に搭載された電子素子と、
前記電子素子を覆う蓋体とを含む電子部品であって、
前記回路基板は、前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールに充填され、かつ前記導電膜と接合する金属部材とを含み、
前記電子素子は、前記第１主面における前記開口部周囲に形成された前記導電膜に導電性材料を介して搭載されていることを特徴とする電子部品。A circuit board including an insulating substrate and a through hole formed in a thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate;
Electronic elements mounted on the circuit board;
An electronic component including a lid that covers the electronic element,
The circuit board has a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and fills the through hole and joins the conductive film. A metal member,
The electronic component is mounted on the conductive film formed around the opening on the first main surface via a conductive material. 前記第１主面における前記電子素子と面する領域には、凹部が形成されている請求項１３に記載の電子部品。The electronic component according to claim 13, wherein a concave portion is formed in a region facing the electronic element on the first main surface. 絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第１主面と前記絶縁基板の第２主面とを接続するためのスルーホールとを含む回路基板と、
前記回路基板に搭載された電子素子と、
前記電子素子を覆う蓋体とを含む電子部品であって、
前記回路基板は、前記スルーホールの内壁と前記第１及び第２主面における前記スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールにおける前記第１主面側の開口部を塞ぎ、かつ前記導電膜と接合する金属部材とを含み、
前記電子素子は、前記金属部材に搭載されていることを特徴とする電子部品。A circuit board including an insulating substrate and a through hole formed in a thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate;
Electronic elements mounted on the circuit board;
An electronic component including a lid that covers the electronic element,
The circuit board includes a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and an opening on the first main surface side of the through hole. A metal member that closes and joins the conductive film,
The electronic component is mounted on the metal member. 前記電子素子と前記導電膜との間の間隔が３０〜５０μｍである請求項１５に記載の電子部品。The electronic component according to claim 15, wherein a distance between the electronic element and the conductive film is 30 to 50 μm.
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