JPS649543A - Abnormality detecting system for data processing system - Google Patents

Abnormality detecting system for data processing system

Info

Publication number
JPS649543A
JPS649543A JP62164999A JP16499987A JPS649543A JP S649543 A JPS649543 A JP S649543A JP 62164999 A JP62164999 A JP 62164999A JP 16499987 A JP16499987 A JP 16499987A JP S649543 A JPS649543 A JP S649543A
Authority
JP
Japan
Prior art keywords
task
period
flag
initiated
tasks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62164999A
Other languages
Japanese (ja)
Inventor
Yumiko Mimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62164999A priority Critical patent/JPS649543A/en
Publication of JPS649543A publication Critical patent/JPS649543A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Computer And Data Communications (AREA)

Abstract

PURPOSE:To clearly decide the factors of the abnormality or an overload of a device by monitoring a task initiated at a constant period of the tasks constituting the system of a data processing system. CONSTITUTION:The respective tasks 10-12 are initiated at the constant period, for instance, at the period T to execute respective processings by a task control mechanism, respectively make access to a task initiation monitor flag buffer 13 to erect the flag of a corresponding bit position. A system monitor task 14 having the priority level of a higher order than the tasks 10-12 for processing a communication is initiated at the period about twice as long as the period T to inspect the state of the task initiation monitor flag buffer 13 and examine whether all the flags are '1' or not. According to this inspection, when the flags are completely '1', they are completely cleared to have '0' and at the time of NO, the entirely bit pattern of the flag is outputted to an external output device. Thereby, the mutual states of the plural flag bits are viewed, at which stage the abnormality is generated or the factor thereof can be discriminated based on the type of the task.
JP62164999A 1987-07-01 1987-07-01 Abnormality detecting system for data processing system Pending JPS649543A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62164999A JPS649543A (en) 1987-07-01 1987-07-01 Abnormality detecting system for data processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62164999A JPS649543A (en) 1987-07-01 1987-07-01 Abnormality detecting system for data processing system

Publications (1)

Publication Number Publication Date
JPS649543A true JPS649543A (en) 1989-01-12

Family

ID=15803921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62164999A Pending JPS649543A (en) 1987-07-01 1987-07-01 Abnormality detecting system for data processing system

Country Status (1)

Country Link
JP (1) JPS649543A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115086828A (en) * 2022-08-23 2022-09-20 荣耀终端有限公司 Earphone control method and related device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115086828A (en) * 2022-08-23 2022-09-20 荣耀终端有限公司 Earphone control method and related device
CN115086828B (en) * 2022-08-23 2022-12-27 荣耀终端有限公司 Earphone control method and related device

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