JPS6489883A - Television receiver - Google Patents

Television receiver

Info

Publication number
JPS6489883A
JPS6489883A JP24690187A JP24690187A JPS6489883A JP S6489883 A JPS6489883 A JP S6489883A JP 24690187 A JP24690187 A JP 24690187A JP 24690187 A JP24690187 A JP 24690187A JP S6489883 A JPS6489883 A JP S6489883A
Authority
JP
Japan
Prior art keywords
signal
driving signal
proceeding
various processing
matrix circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24690187A
Other languages
Japanese (ja)
Other versions
JP2865665B2 (en
Inventor
Yukinori Senju
Toshinori Shimoyana
Kazuo Mochizuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP24690187A priority Critical patent/JP2865665B2/en
Publication of JPS6489883A publication Critical patent/JPS6489883A/en
Application granted granted Critical
Publication of JP2865665B2 publication Critical patent/JP2865665B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)
  • Color Television Systems (AREA)
  • Processing Of Color Television Signals (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

PURPOSE:To enable deflection operation to be properly executed by separating a horizontal driving signal for a deflection circuit not by a system clock signal but from a luminance signal proceeding to a matrix circuit and obtaining it. CONSTITUTION:The time base of a video signal having various processing and proceeding to a CRT display device from the matrix circuit and the time base of the system clock signal do not agree for the time while they pass through various processing circuits. Due to that, the deflection operation is not properly executed. Then, the horizontal driving signal RD is formed by separating it from the luminance signal proceeding to the matrix circuit 8. As the vertical synchronizing term of a vertical driving signal is long, the vertical driving signal does not take the influence of time delay caused by the various processing. The vertical driving signal is formed by the things obtained by synchronouseparating it from a composite video signal of which constitution is easy. Thus, the deflection operation can be properly executed without the influence such as jitter.
JP24690187A 1987-09-30 1987-09-30 Television receiver Expired - Lifetime JP2865665B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24690187A JP2865665B2 (en) 1987-09-30 1987-09-30 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24690187A JP2865665B2 (en) 1987-09-30 1987-09-30 Television receiver

Publications (2)

Publication Number Publication Date
JPS6489883A true JPS6489883A (en) 1989-04-05
JP2865665B2 JP2865665B2 (en) 1999-03-08

Family

ID=17155428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24690187A Expired - Lifetime JP2865665B2 (en) 1987-09-30 1987-09-30 Television receiver

Country Status (1)

Country Link
JP (1) JP2865665B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4904635A (en) * 1987-05-15 1990-02-27 Fuji Photo Film Co., Ltd. Heat-sensitive recording paper
US5375317A (en) * 1992-12-01 1994-12-27 Sumitomo Wiring Systems, Ltd. Terminal crimping apparatus with terminal attitude correcting unit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60177569U (en) * 1984-04-30 1985-11-26 日本電気ホームエレクトロニクス株式会社 Clock signal generation circuit for digital television receivers
JPS62175091A (en) * 1986-01-29 1987-07-31 Hitachi Ltd Color television signal processing circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60177569U (en) * 1984-04-30 1985-11-26 日本電気ホームエレクトロニクス株式会社 Clock signal generation circuit for digital television receivers
JPS62175091A (en) * 1986-01-29 1987-07-31 Hitachi Ltd Color television signal processing circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4904635A (en) * 1987-05-15 1990-02-27 Fuji Photo Film Co., Ltd. Heat-sensitive recording paper
US5375317A (en) * 1992-12-01 1994-12-27 Sumitomo Wiring Systems, Ltd. Terminal crimping apparatus with terminal attitude correcting unit

Also Published As

Publication number Publication date
JP2865665B2 (en) 1999-03-08

Similar Documents

Publication Publication Date Title
JPS56168484A (en) Stereoscopic television system
JPS5526792A (en) Television screen display unit
CA1246734A (en) Apparatus for detecting movement in a television signal
JPS6489883A (en) Television receiver
JPS5636280A (en) Video signal cipher processing system
DE3782814D1 (en) TELEVISION IMPROVEMENTS.
EP0306071A3 (en) Extended horizontal resolution of luminance and chrominance in a high definition television system
JPS5713868A (en) Two-screen television receiver
JPS5765971A (en) Receiving device for multiplexed information
JPS52144224A (en) Tv picture receiver
EP0334351A3 (en) Video signal processing circuit and an insertion circuit utilized therein
JPS5717269A (en) Display device for information television at home
JPS51122316A (en) Delay circuit vertical synchronizing signal
JPS55130272A (en) Deflecting circuit device
JPS5444821A (en) Synchronization system of external synchronous monitor television
ES454659A1 (en) Circuit arrangement for a television receiver
JPS5575382A (en) Video signal process method
JPS647889A (en) Device for synthesizing secam signal and character signal
EP0285250A3 (en) Arrangement for the display of processing data by means of pixels on a cathode ray tube
JPS5229115A (en) Synchronous circuit
CA2086833A1 (en) Synchronization of Television Vertical Deflection System
JPS5687991A (en) Spurious color signal suppression system for color television camera
KR970019537A (en) Horizontal position setting device in PDTV
JPS6446396A (en) Scramble circuit for chrominance sub-carrier signal
JPS5685986A (en) Color television signal processing circuit