JPS6488381A - Device for counting delay time of circuit - Google Patents

Device for counting delay time of circuit

Info

Publication number
JPS6488381A
JPS6488381A JP62248636A JP24863687A JPS6488381A JP S6488381 A JPS6488381 A JP S6488381A JP 62248636 A JP62248636 A JP 62248636A JP 24863687 A JP24863687 A JP 24863687A JP S6488381 A JPS6488381 A JP S6488381A
Authority
JP
Japan
Prior art keywords
lsi
mos element
light emission
type mos
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62248636A
Other languages
Japanese (ja)
Inventor
Toshiro Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62248636A priority Critical patent/JPS6488381A/en
Publication of JPS6488381A publication Critical patent/JPS6488381A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Pulse Circuits (AREA)

Abstract

PURPOSE:To count a delay time between arbitrary elements in an LSI by providing a signal device for generating an input pulse, a device for detecting a light emission by a hot electron and a device for counting the generation time of the light emission. CONSTITUTION:An LSI tester 1 generates a signal P to be brought to switching and outputs it to an LSI 2 to be measured. In this case, a partial circuit of the LSI 2 is constituted of an N-type MOS element where inverter circuits 11-13 are connected in series. When the signal P is inputted to a gate G of the N-type MOS element by a leading waveform of a pulse, the output of a drain D of the N-type MOS element outputs a trailing waveform being reverse to the input signal. Between the input of this leading waveform and the output of the trailing waveform, the N-type MOS element is saturated, and a hot electron is generated. Therefore, in the drain D of the MOS element of the LSI 2, its point is magnified by an optical microscope 3, and a light emission at that measuring point is enlarged 4 electronically. Subsequently, a position data set based on a light emission data, etc., of a photoelectric multiplying device 4 and the image of a CCD image sensor 5 are analyzed 6.
JP62248636A 1987-09-30 1987-09-30 Device for counting delay time of circuit Pending JPS6488381A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62248636A JPS6488381A (en) 1987-09-30 1987-09-30 Device for counting delay time of circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62248636A JPS6488381A (en) 1987-09-30 1987-09-30 Device for counting delay time of circuit

Publications (1)

Publication Number Publication Date
JPS6488381A true JPS6488381A (en) 1989-04-03

Family

ID=17181059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62248636A Pending JPS6488381A (en) 1987-09-30 1987-09-30 Device for counting delay time of circuit

Country Status (1)

Country Link
JP (1) JPS6488381A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4792191B2 (en) * 2000-04-21 2011-10-12 株式会社アドバンテスト Circuit test apparatus and circuit test method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4792191B2 (en) * 2000-04-21 2011-10-12 株式会社アドバンテスト Circuit test apparatus and circuit test method

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