JPS648750A - Bypass circuit for transversal equalizer - Google Patents

Bypass circuit for transversal equalizer

Info

Publication number
JPS648750A
JPS648750A JP62164579A JP16457987A JPS648750A JP S648750 A JPS648750 A JP S648750A JP 62164579 A JP62164579 A JP 62164579A JP 16457987 A JP16457987 A JP 16457987A JP S648750 A JPS648750 A JP S648750A
Authority
JP
Japan
Prior art keywords
path
output
error rate
transversal equalizer
code error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62164579A
Other languages
Japanese (ja)
Inventor
Michinaga Yamagishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62164579A priority Critical patent/JPS648750A/en
Publication of JPS648750A publication Critical patent/JPS648750A/en
Pending legal-status Critical Current

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  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To always obtain the best code error rate characteristic in all of both high and low S/N for a base band signal by switching selectively the base band signal whether or not it passes through a transversal equalizer in response to the code error rate. CONSTITUTION:The base band signal of an output of a detector is divided into two by a distributer 1 and the paths are provided, which are a 1st path 10 passing through the transversal equalizer and a 2nd path 20 passing through the transversal equalizer. Then the code error rate of outputs D1, D2 of the paths 10, 20 is measured by a measuring circuit 3. The decision circuit 4 compares the code error rate measured by a measuring circuit 3 with a prescribed value to decide whether or not the value is proper, thereby outputting a selection signal (s). The signal selector 2 receives the selection signal (s) to select an output of the path having the better error rate in the output D1 of the 1st path 10 and an output D2 of the 2nd path and gives an output to the demodulator.
JP62164579A 1987-07-01 1987-07-01 Bypass circuit for transversal equalizer Pending JPS648750A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62164579A JPS648750A (en) 1987-07-01 1987-07-01 Bypass circuit for transversal equalizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62164579A JPS648750A (en) 1987-07-01 1987-07-01 Bypass circuit for transversal equalizer

Publications (1)

Publication Number Publication Date
JPS648750A true JPS648750A (en) 1989-01-12

Family

ID=15795851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62164579A Pending JPS648750A (en) 1987-07-01 1987-07-01 Bypass circuit for transversal equalizer

Country Status (1)

Country Link
JP (1) JPS648750A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5159282A (en) * 1989-12-06 1992-10-27 Kabushiki Kaisha Toshiba Demodulation apparatus incorporating adaptive equalizer for digital communication
US5283531A (en) * 1989-12-06 1994-02-01 Kabushiki Kaisha Toshiba Demodulation apparatus incorporating adaptive equalizer for digital communication
US5450442A (en) * 1990-11-02 1995-09-12 Kabushiki Kaisha Toshiba Digital radio telephone apparatus having an equalizer selectively employed in the apparatus
JP2008022392A (en) * 2006-07-14 2008-01-31 Hitachi Ltd Serializer/deserializer type transfer device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5159282A (en) * 1989-12-06 1992-10-27 Kabushiki Kaisha Toshiba Demodulation apparatus incorporating adaptive equalizer for digital communication
US5283531A (en) * 1989-12-06 1994-02-01 Kabushiki Kaisha Toshiba Demodulation apparatus incorporating adaptive equalizer for digital communication
US5450442A (en) * 1990-11-02 1995-09-12 Kabushiki Kaisha Toshiba Digital radio telephone apparatus having an equalizer selectively employed in the apparatus
JP2008022392A (en) * 2006-07-14 2008-01-31 Hitachi Ltd Serializer/deserializer type transfer device
US8050333B2 (en) 2006-07-14 2011-11-01 Hitachi, Ltd. Data transfer device of serializer/deserializer system

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