JPS6482090A - Flat type display device - Google Patents

Flat type display device

Info

Publication number
JPS6482090A
JPS6482090A JP24210987A JP24210987A JPS6482090A JP S6482090 A JPS6482090 A JP S6482090A JP 24210987 A JP24210987 A JP 24210987A JP 24210987 A JP24210987 A JP 24210987A JP S6482090 A JPS6482090 A JP S6482090A
Authority
JP
Japan
Prior art keywords
circuit
type display
tuning
insulating substrate
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24210987A
Other languages
Japanese (ja)
Inventor
Hiroshi Ishiwatari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24210987A priority Critical patent/JPS6482090A/en
Publication of JPS6482090A publication Critical patent/JPS6482090A/en
Pending legal-status Critical Current

Links

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE: To suppress electromagnetic wave discharge by providing a tuning resonance circuit, having conductor foil stuck over the one entire one surface of an insulating substrate and strips of conductor foil formed on the other surface, between a flat plate type display board and a circuit board. CONSTITUTION: The tuning resonance circuit 3 has the copper foil stuck over the one entire surface of the insulating substrate 4 and also has the other surface composed of a tuning circuit which consists of a microstrip circuit and is made to resonate with >=1 discharged electromagnetic waves. Then a proper gap is left between back glass 2 and a circuit board 5. Then a driving circuit element 6 is connected and mounted on the substrate 5. Consequently, various electromagnetic fields produced by the driving circuit part are shielded from and trapped to suppress electromagnetic waves from the device.
JP24210987A 1987-09-25 1987-09-25 Flat type display device Pending JPS6482090A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24210987A JPS6482090A (en) 1987-09-25 1987-09-25 Flat type display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24210987A JPS6482090A (en) 1987-09-25 1987-09-25 Flat type display device

Publications (1)

Publication Number Publication Date
JPS6482090A true JPS6482090A (en) 1989-03-28

Family

ID=17084432

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24210987A Pending JPS6482090A (en) 1987-09-25 1987-09-25 Flat type display device

Country Status (1)

Country Link
JP (1) JPS6482090A (en)

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