JPH02244803A - Electronic circuit with plane antenna - Google Patents

Electronic circuit with plane antenna

Info

Publication number
JPH02244803A
JPH02244803A JP6424789A JP6424789A JPH02244803A JP H02244803 A JPH02244803 A JP H02244803A JP 6424789 A JP6424789 A JP 6424789A JP 6424789 A JP6424789 A JP 6424789A JP H02244803 A JPH02244803 A JP H02244803A
Authority
JP
Japan
Prior art keywords
electronic circuit
antenna
ground conductor
conductor layer
dielectric substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6424789A
Other languages
Japanese (ja)
Inventor
Kenji Omiya
健司 大宮
Hideo Sugawara
菅原 秀夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6424789A priority Critical patent/JPH02244803A/en
Publication of JPH02244803A publication Critical patent/JPH02244803A/en
Pending legal-status Critical Current

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  • Variable-Direction Aerials And Aerial Arrays (AREA)

Abstract

PURPOSE:To prevent possibility from being suffered from ESD(Electronics Static Damage) by forming an antenna of slot structure by cutting a groove on a ground conductor layer vapor-deposited on one plane of a dielectric substrate, and enclosing the whole of an electronic circuit with the ground conductor layer. CONSTITUTION:The dielectric substrate 1 is provided with the component of the electronic circuit 4 and a circuit pattern on the one plane inside, and is provided with the ground conductor layer 3 on the outside plane. The antenna 2 is the one of slot structure in which the groove (slot) is cut on the ground conductor layer 3 on one plane outside the dielectric substrate 1, and is faced with the outside, and performs the transmission and reception of the signal of the electronic circuit 4 as an electromagnetic wave. Since the whole of the electronic circuit 4 is enclosed with the ground conductor layer 3, no static electricity occurring at the outside is discharged to the antenna 2. In such a way, the possibility to generate the ESD which damages or deteriorates the electronic circuit 4 can be reduced.

Description

【発明の詳細な説明】 〔概要〕 アンテナと電子回路とそれらを収納するケースとを一体
化した構成の平面アンテナ付き電子回路に関し、 外部で発生した静電気がアンテナに放電することにより
プリント板の電子回路を破壊したり劣化する εSD(
Electronics 5tatic Damage
)を防止した平面アンテナ付き電子回路を目的とし、ア
ンテナを平面形の誘電体基板の片面に設けた接地導体層
に所要の寸法の溝を切ってスロット構造のアンテナとし
、該誘電体基板の他面に設け該アンテナに接続した電子
回路の全体を前記接地導体層により包囲するように構成
する。
[Detailed Description of the Invention] [Summary] Regarding an electronic circuit with a planar antenna that integrates an antenna, an electronic circuit, and a case that houses them, static electricity generated on the outside is discharged to the antenna, thereby discharging the electronics on the printed board. εSD (
Electronics 5tatic Damage
), the antenna is made into a slot-structured antenna by cutting a groove of the required size in the ground conductor layer provided on one side of a planar dielectric substrate, and the other side of the dielectric substrate is The entire electronic circuit provided on the surface and connected to the antenna is surrounded by the ground conductor layer.

〔産業上の利用分野〕[Industrial application field]

本発明は平面アンテナ付きのプリント板の電子回路に係
り、特に、[1SD(Blectronics 5ta
tic口amage)を防止した平面アンテナ付き電子
回路に関する。
The present invention relates to a printed circuit board electronic circuit with a planar antenna, and in particular, [1SD (Blectronics 5ta
This invention relates to an electronic circuit with a planar antenna that prevents tic mouth image.

〔従来の技術〕[Conventional technology]

従来の平面アンテナ付き電子回路は、第4図に示す如く
、絶縁物のケースIOAの外側の面にアンテナ導体板2
人を設け、該ケースIOAの内側に誘電体のプリント板
IAを設ける。そして該プリント板1^のケース側の面
に接地導体パターン3Aを設け、反対の内側の面に電子
回路4Aの部品41Aを取付け、回路パターン4.2A
を形成する。そしてプリント板IAの内側の電子回路4
Aと、ケース10^の外側のアンテナ導体板2人とを、
接続ピ〉・5Aでプリント板IAとケース10Aを貫通
して接続し、アンテナと電子回路とそれらを収納するケ
ースとを一体化した構成となっている。
A conventional electronic circuit with a planar antenna has an antenna conductor plate 2 on the outer surface of an insulating case IOA, as shown in FIG.
A dielectric printed board IA is installed inside the case IOA. Then, a ground conductor pattern 3A is provided on the case side surface of the printed board 1^, a component 41A of the electronic circuit 4A is attached to the opposite inner surface, and a circuit pattern 4.2A is installed.
form. And the electronic circuit 4 inside the printed board IA
A and the two antenna conductor plates on the outside of case 10^,
The printed circuit board IA and the case 10A are connected with a connection pin of 5A, and the antenna, the electronic circuit, and the case that houses them are integrated.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の平面アンテナ付き電子回路は、上述の如く、アン
テナ導体板2Aが誘電体のプリント板IAの内側の電子
回路4と直接、接続ビン5Aでプリント板IAとケース
1.OAを貫通して接続されているため、外部で発生し
た静電気が、アンテナ導体板2Aに放電することにより
、プリント板IAの電子回路4Aが破壊されたり劣化す
る、所謂ESD(ElectronicsStatic
 DaIIlage)を受ける可能性が大きいという問
題がある。本発明はこのESCを防止した平面アンテナ
付き電子回路を課題とする。
As described above, in the conventional electronic circuit with a planar antenna, the antenna conductor plate 2A is directly connected to the electronic circuit 4 inside the dielectric printed board IA, and the printed board IA and the case 1. Because the connection is made through the OA, static electricity generated externally is discharged onto the antenna conductor plate 2A, causing damage to or deterioration of the electronic circuit 4A on the printed board IA.
There is a problem that there is a high possibility of receiving Da II lage). The object of the present invention is to provide an electronic circuit with a planar antenna that prevents this ESC.

〔課題を解決するための手段〕[Means to solve the problem]

この課題は、第1図の原理図の如く、外に面し電磁波を
送受信するアンテナ2を誘電体基板1の片面に蒸着した
接地導体層3に溝(スロット)を切ってスロット構造の
アンテナとし、該誘電体基板1の他面に設けた該アンテ
ナ2の電子回路4の部品41や回路パターン42の全体
を前記接地導体層3により包囲する構造であることを特
徴とする本発明によって解決される。
As shown in the principle diagram in Fig. 1, the problem was to create an antenna with a slot structure by cutting a groove (slot) in a ground conductor layer 3 deposited on one side of a dielectric substrate 1 to form an antenna 2 that faces outward and transmits and receives electromagnetic waves. The present invention is characterized in that the ground conductor layer 3 surrounds the whole parts 41 and the circuit pattern 42 of the electronic circuit 4 of the antenna 2 provided on the other surface of the dielectric substrate 1. Ru.

本発明の平面アンテナ付き電子回路の基本構成を示す第
1図の原理図において、 lは、電子回路4の部品41や回路バクーン42を内側
の片面に設け、外側の面に接地導体層3を設けた電子回
路4の誘電体基板である。
In the principle diagram of FIG. 1 showing the basic configuration of the electronic circuit with a planar antenna of the present invention, l is a structure in which the components 41 of the electronic circuit 4 and the circuit backing 42 are provided on one inner surface, and the ground conductor layer 3 is provided on the outer surface. This is a dielectric substrate of the electronic circuit 4 provided.

2は、外に面したアンチ犬であって、誘電体基板1の外
側の片面の接地導体層3に、溝(スロット)を切ったス
ロット構造のアンテナである。
Reference numeral 2 denotes an antenna facing outward and having a slot structure in which a groove (slot) is cut in the ground conductor layer 3 on one side of the outer side of the dielectric substrate 1.

3は、誘電体基板1の外側の片面に設けた接地導体層で
ある。
Reference numeral 3 denotes a ground conductor layer provided on one outer surface of the dielectric substrate 1.

4は、誘電体基板lの内側の片面に部品41や回路パタ
ーン42を設けた電子回路である。
4 is an electronic circuit in which components 41 and a circuit pattern 42 are provided on one side of the inside of a dielectric substrate l.

そして電子回路4の部品41や回路パターン42の全体
を前記接地導体層3により包囲するように構成する。
The components 41 of the electronic circuit 4 and the circuit pattern 42 are entirely surrounded by the ground conductor layer 3.

〔作用〕[Effect]

誘電体基板1は、電子回路4の部品41や回路パターン
42を内側の片面に設け、外側の面にその接地導体層3
を設ける。
The dielectric substrate 1 has components 41 of the electronic circuit 4 and a circuit pattern 42 on one inner side, and has its ground conductor layer 3 on the outer side.
will be established.

アンテナ2は、誘電体基板1の外側の片面の接地導体N
3に、r!4(スロット)を切ったスロット構造のアン
テナであって、外に面し、電子回路4の信号をTi磁彼
として送信又は受信する。
The antenna 2 has a ground conductor N on one side outside the dielectric substrate 1.
3, r! The antenna has a slot structure with 4 (slots) cut out, faces outward, and transmits or receives signals from the electronic circuit 4 as a Ti magnetic field.

そして電子回路4の全体を前記接地導体層3により包囲
するので、外部で発生した静電気が、アンテナ2に放電
することはなく、従って誘電体基板1の電子回路4が破
壊されたり劣化するESCの可能性は小さくなるので問
題は解決される。
Since the entire electronic circuit 4 is surrounded by the ground conductor layer 3, static electricity generated externally will not be discharged to the antenna 2, thereby preventing the ESC from destroying or deteriorating the electronic circuit 4 on the dielectric substrate 1. The probability is reduced and the problem is solved.

〔実施例〕〔Example〕

第2図は本発明の実施例の平面アンテナ付き電子回路の
構成を示す構造図であって、第2図のAの誘電体基板1
は、−船釣なガラスエボキン樹脂の銅張り板で、厚さ0
.8〜1.6m/mのプリント板を用いる。そしてプリ
ント板の外側のアンテナ側の面は、全面に金属蒸着など
で接地導体N3を形成し、その接地導体N3の適当な一
部に、長さが約λ/2の溝を切り抜いてスロット構造の
アンテナ2とする。そして該スロットアンテナ2は、そ
のスロット中央の開放点(OPEN>の近傍を、接地ビ
ン32により、反対側の電子回路パターン4のライン4
2の接地点(S)IORT>と接続し結合される。
FIG. 2 is a structural diagram showing the configuration of an electronic circuit with a planar antenna according to an embodiment of the present invention, in which the dielectric substrate 1 of A in FIG.
- Made of glass evokin resin copper clad plate, thickness 0.
.. A printed board of 8 to 1.6 m/m is used. Then, on the outer surface of the printed circuit board facing the antenna, a ground conductor N3 is formed on the entire surface by metal vapor deposition, etc., and a groove with a length of approximately λ/2 is cut out in a suitable part of the ground conductor N3 to form a slot structure. Antenna 2 is assumed to be antenna 2. The slot antenna 2 is connected to the line 4 of the electronic circuit pattern 4 on the opposite side by a grounding bottle 32 near the open point (OPEN) at the center of the slot.
It is connected and coupled to the ground point (S)IORT> of No. 2.

スロットアンテナは公知であるが、第3図の説明図で簡
単に説明すると、長さが約λ/2のスロット2sと反対
側の電子回路のライン4.2Lの結合は、結合部が、ス
ロット2s側は中央の開放点(OPEN)であり、ライ
ン42L側は接地点(S)IORT)であって、互に結
合されることにより、スロット2sがアンテナとして動
作する。
Slot antennas are well known, but to briefly explain with reference to the explanatory diagram in FIG. The 2s side is a central open point (OPEN), and the line 42L side is a grounding point (SIORT), and by being coupled to each other, the slot 2s operates as an antenna.

誘電体基板1のプリント板の内側の面には、電子回路パ
ターン4として電子部品を搭載したり、マイクロストリ
ップラインによるマイクロ波回路を形成している。その
スロットアンテナ2と電子回路パターン4に共用した誘
電体基板1のプリント板を、例えば第2図の8に示すプ
ラスチックの表面にクロムメツキを施した筐体10に入
れ、プリント板の装置全体を接地された導体層で覆う構
成とする。
On the inner surface of the printed board of the dielectric substrate 1, electronic components are mounted as an electronic circuit pattern 4, and a microwave circuit is formed using a microstrip line. The printed board of the dielectric substrate 1 used in common for the slot antenna 2 and the electronic circuit pattern 4 is placed in a housing 10 made of plastic with chrome plating as shown in 8 in FIG. 2, for example, and the entire printed board device is grounded. The structure is such that it is covered with a conductive layer.

第2図の本発明の実施例の平面アンテナ付き電子回路は
、電子回路4の部品41や回路パターン42の全体を接
地導体層3により包囲するので、外部で発生した静電気
などが、アンテナ2に放電することはなく、従って誘電
体基板1の電子回路4が破壊されたり劣化するESDの
可能性が小さくなるので問題は無い。更に、電子回路4
の内部で発生する電磁波の外部への漏れも無くなるので
外部機器への干渉E旧(Electro Magnet
ic Interference)の対策にもなる。
In the electronic circuit with a planar antenna according to the embodiment of the present invention shown in FIG. 2, the parts 41 and the circuit pattern 42 of the electronic circuit 4 are entirely surrounded by the ground conductor layer 3, so that static electricity generated externally is not applied to the antenna 2. There is no problem because there is no discharge and, therefore, the possibility of ESD causing destruction or deterioration of the electronic circuit 4 of the dielectric substrate 1 is reduced. Furthermore, electronic circuit 4
Electro Magnet
It also serves as a countermeasure against ic interference.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く、本発明によれば、平面アンテナ付き
電子回路のESDを完全に防ぎ、同時に外部への電磁波
の漏れを防ぐ口I対策の効果が得られる。
As described above, according to the present invention, it is possible to completely prevent ESD in an electronic circuit with a planar antenna, and at the same time, it is possible to obtain the effect of preventing leakage of electromagnetic waves to the outside.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の平面アンテナ付き電子回路の基本構成
を示す原理図、 第2図は本発明の実施例の平面アンテナ付き電子回路の
構成を示す構造図、 第3図は本発明の実施例の動作を説明するためのスロッ
トアンテナの説明図、 第4図は従来の平面アンテナ付き電子回路の構造図であ
る。 図において、 1は誘電体基板、2はアンテナ、3は接地導体層、4は
電子回路、10は筐体である。 庖示1.甲狸圓 第 フ [;?] $、発」月c7N奪“−乏存1」の平面7−テ亡付A電
千互路の構成を示1櫃造団 第 団 >q旦門14を凸ピ1jの上手τを九初門下ろT−4〜
”y(nスこ]・・トアン2六l−Nン」グ1? 窮 回
Figure 1 is a principle diagram showing the basic configuration of an electronic circuit with a planar antenna according to the present invention, Figure 2 is a structural diagram showing the configuration of an electronic circuit with a flat antenna according to an embodiment of the present invention, and Figure 3 is an implementation of the present invention. An explanatory diagram of a slot antenna for explaining the operation of an example. FIG. 4 is a structural diagram of a conventional electronic circuit with a planar antenna. In the figure, 1 is a dielectric substrate, 2 is an antenna, 3 is a ground conductor layer, 4 is an electronic circuit, and 10 is a housing. Proof 1. Kotanuki Endaifu [;? ] $, shows the composition of the plane 7-te of the moon c7N taken "-poor existence 1" 1 査戻dandandan > q Danmon 14 is convex Pi 1j's upper hand τ is 9 First student down T-4~
"y(nsuko)...toan26l-Nn"g1? A difficult situation

Claims (1)

【特許請求の範囲】 電磁波を送受信する平面形のアンテナを含む電子回路に
おいて、 該アンテナ(2)を平面形の誘電体基板(1)の片面に
設けた接地導体層(3)に所要の寸法の溝を切ってスロ
ット構造のアンテナとし、該誘電体基板の他面に設け該
アンテナに接続した電子回路(4)の全体を前記接地導
体層により包囲することを特徴とした平面アンテナ付き
電子回路。
[Claims] In an electronic circuit including a planar antenna for transmitting and receiving electromagnetic waves, the antenna (2) is provided on one side of a planar dielectric substrate (1) with a ground conductor layer (3) having required dimensions. An electronic circuit with a planar antenna, characterized in that the antenna has a slot structure by cutting a groove in the dielectric substrate, and the electronic circuit (4) provided on the other surface of the dielectric substrate and connected to the antenna is entirely surrounded by the ground conductor layer. .
JP6424789A 1989-03-16 1989-03-16 Electronic circuit with plane antenna Pending JPH02244803A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6424789A JPH02244803A (en) 1989-03-16 1989-03-16 Electronic circuit with plane antenna

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6424789A JPH02244803A (en) 1989-03-16 1989-03-16 Electronic circuit with plane antenna

Publications (1)

Publication Number Publication Date
JPH02244803A true JPH02244803A (en) 1990-09-28

Family

ID=13252634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6424789A Pending JPH02244803A (en) 1989-03-16 1989-03-16 Electronic circuit with plane antenna

Country Status (1)

Country Link
JP (1) JPH02244803A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04188904A (en) * 1990-11-21 1992-07-07 A T R Koudenpa Tsushin Kenkyusho:Kk Coplanar antenna
WO1995025387A1 (en) * 1994-03-17 1995-09-21 Fujitsu Limited Transceiver with antenna
JP2000151267A (en) * 1998-11-17 2000-05-30 Mitsubishi Electric Corp Antenna device
KR100538770B1 (en) * 2001-07-25 2005-12-26 가부시키가이샤 무라타 세이사쿠쇼 Method for manufacturing surface-mounted antenna and wireless communication device comprising the same
JP2010154495A (en) * 2008-11-19 2010-07-08 Mitsubishi Electric Corp Antenna apparatus
JP2011233952A (en) * 2010-04-23 2011-11-17 Mitsubishi Electric Corp Housing integrated antenna
WO2016075923A1 (en) * 2014-11-10 2016-05-19 日本電気株式会社 Planar antenna and method for producing same
WO2019008813A1 (en) * 2017-07-07 2019-01-10 スター精密株式会社 Beacon device and beacon transmission/reception system

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04188904A (en) * 1990-11-21 1992-07-07 A T R Koudenpa Tsushin Kenkyusho:Kk Coplanar antenna
WO1995025387A1 (en) * 1994-03-17 1995-09-21 Fujitsu Limited Transceiver with antenna
JP2000151267A (en) * 1998-11-17 2000-05-30 Mitsubishi Electric Corp Antenna device
KR100538770B1 (en) * 2001-07-25 2005-12-26 가부시키가이샤 무라타 세이사쿠쇼 Method for manufacturing surface-mounted antenna and wireless communication device comprising the same
JP2010154495A (en) * 2008-11-19 2010-07-08 Mitsubishi Electric Corp Antenna apparatus
JP2011233952A (en) * 2010-04-23 2011-11-17 Mitsubishi Electric Corp Housing integrated antenna
WO2016075923A1 (en) * 2014-11-10 2016-05-19 日本電気株式会社 Planar antenna and method for producing same
JPWO2016075923A1 (en) * 2014-11-10 2017-08-10 日本電気株式会社 Planar antenna and manufacturing method thereof
WO2019008813A1 (en) * 2017-07-07 2019-01-10 スター精密株式会社 Beacon device and beacon transmission/reception system

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