JPS6478173A - Ic tester - Google Patents

Ic tester

Info

Publication number
JPS6478173A
JPS6478173A JP62235170A JP23517087A JPS6478173A JP S6478173 A JPS6478173 A JP S6478173A JP 62235170 A JP62235170 A JP 62235170A JP 23517087 A JP23517087 A JP 23517087A JP S6478173 A JPS6478173 A JP S6478173A
Authority
JP
Japan
Prior art keywords
logical
waveform
information
display
logical waveform
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62235170A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Jinno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62235170A priority Critical patent/JPS6478173A/en
Publication of JPS6478173A publication Critical patent/JPS6478173A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To easily and instantly confirm a quantitative feature of a logical waveform and a variation at the time of waveform change by displaying simultaneously the logical waveform and logical information corresponding thereto and changing this display in accordance with an input of logical waveform change information. CONSTITUTION:To a CPU 49, a storage device 41 for storing the logical information corresponding to a logical waveform, a display 42 for displaying simultaneously the logical waveform and the logical information for showing its quantitative feature, and logical waveform generating circuits 43-45 for generating a control voltage corresponding to a shape of the logical waveform and applying it to an IC to be tested 70 are connected. In this state, when the logical information or the logical waveform is inputted from a keyboard 40, the CPU 49 stores the logical information in the storage device 41, and also, displays the logical waveform and the logical information on the display 42. Subsequently, when a desired logical waveform change instruction is inputted, the CPU 49 interprets this change instruction, rewrites the logical information of the storage device 41, and thereafter, reads it out, stores it in desired storage devices 46-48 belonging to the circuits 43-45, and on the other hand, generates the logical waveform by executing an arithmetic operation, and displays the logical information and the logical waveform on the display 42.
JP62235170A 1987-09-18 1987-09-18 Ic tester Pending JPS6478173A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62235170A JPS6478173A (en) 1987-09-18 1987-09-18 Ic tester

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62235170A JPS6478173A (en) 1987-09-18 1987-09-18 Ic tester

Publications (1)

Publication Number Publication Date
JPS6478173A true JPS6478173A (en) 1989-03-23

Family

ID=16982100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62235170A Pending JPS6478173A (en) 1987-09-18 1987-09-18 Ic tester

Country Status (1)

Country Link
JP (1) JPS6478173A (en)

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