JPS647704B2 - - Google Patents

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention eliminates echoes caused by impedance mismatch of hybrid coils installed in 2-wire and 4-wire conversion sections in long-distance telephone lines using communication satellites, submarine cables, etc. This invention relates to an echo canceller inserted into a 4-wire section for the purpose of improving call quality. [Prior Art] A block diagram of this type of echo canceller is shown in FIG. This echo canceller 60 is inserted into a communication path between the hybrid coil 66 on the near end side and the far end side. The echo canceller 60 includes a pseudo-echo path 61 that predicts an echo signal from a received signal and generates a pseudo-echo signal, a subtractor 62 that subtracts the pseudo-echo signal from the echo signal returned from the near end side using the output of the pseudo-echo path 61; A correction amount calculator 63 calculates and outputs a correction amount for the parameters of the pseudo echo path 61 (transversal filter tap coefficient) from the residual echo signal output from the subtractor 62 and the received signal, and outputs this correction amount as Δh. .
In order to clarify the corresponding positions of this Fig. 6 and Figs. 1 to 4 explained later, the reference numerals 1, 4, 6, and 11 of Fig. 1 are shown in Fig. 6 in the corresponding positions. displayed. Generally, the main part of the pseudo echo path 61 is composed of a transversal filter, and the synthesis of the pseudo echo signal is performed by convolving the tap coefficient of this transversal filter with the received signal. Further, the tap coefficient of this transversal filter is successively modified so as to reduce the signal after subtracting the echo signal from the echo signal (ie, the residual echo signal). In other words, the transversal filter stores the impulse response of the echo path in a memory circuit, and outputs a pseudo echo signal of the response in response to the received signal. ) is successively corrected by adding the correction amount calculated and output by the correction amount calculator 63 using the residual echo signal and the received signal according to a predetermined algorithm, and the residual echo signal is The characteristics of the pseudo echo path 61 are adapted so that it becomes smaller. [Problem to be Solved by the Invention] By the way, if the contents of the above-mentioned storage circuit and the correction amount are added and rewritten in the pseudo echo path 61 with linear codes, the capacity of the storage circuit of the transversal filter is becomes larger, and the scale of the multiplication circuit for the convolution operation also becomes larger. FIG. 1 is a diagram for explaining tap coefficient modification of a conventional transversal filter in a pseudo echo path. That is, a signal in which the correction amount is linearly encoded by a nonlinear/linear code converter 12 is inputted to a terminal 1, and an adder circuit 2 inputs a signal into which the correction amount is linearly encoded by a tap coefficient storage circuit 3 of the transversal filter.
is added to the contents of The tap coefficients are stored in the memory circuit 3 in the form of linear codes. The output of the adder 2 is a modified tap coefficient, which is multiplied by the received signal input from the received signal input terminal 4 by the multiplier 5 and outputted from the output terminal 6. At the same time, the contents of the memory circuit 3 are rewritten and updated using the output signal of the adder 2. Here, since the storage circuit 3 stores tap coefficients of linear codes, it requires a larger capacity than when storing nonlinear codes. Furthermore, since this capacity is determined by the precision of the tap coefficients and the number of taps, a storage circuit for a high-precision, multi-tap transversal filter requires an enormous storage capacity. Furthermore, since the (modified) tap coefficients supplied to the multiplier 5 are linear codes, the scale of the multiplier 5 also becomes large. Furthermore, the modification amount calculator also has the drawback of requiring the aforementioned nonlinear/linear conversion circuit 12. In order to solve the above-mentioned drawbacks, some devices have conventionally used a method as shown in FIG. That is, in FIG. 2, the tap coefficient storage circuit 3' stores tap coefficients in nonlinear codes. For this reason,
The capacity of the memory circuit 3' may be smaller than that shown in FIG. However, in order to add the correction amount in the addition circuit 2, the nonlinear/linear code conversion circuit 21 converts it into a linear code and adds it to the correction amount of the linear code, so that the output signal of the addition circuit 2 becomes linear again. /Converted into a nonlinear code by the nonlinear code conversion circuit 22,
The tap coefficient of the storage circuit 3' is updated by the output of the linear/nonlinear code conversion circuit 22. Therefore, double code conversion circuits are required, which complicates the hardware. As a result, there is a drawback that the scale cannot be reduced. Therefore, the parameters of the pseudo echo path are expressed in non-linear codes and stored, a pseudo echo signal is created from the stored parameters and the received signal, subtracted from the echo signal by a subtractor, and then the stored parameters are A technique has been proposed in which the stored value of the circuit is rewritten by adding the correction amount of the parameter, the residual echo signal, and the stored parameter (Japanese Patent Application Laid-Open No. 153315/1983, Publication No. 54408). FIG. 7 shows an example of a circuit that expresses, stores, and modifies this pseudo echo path using nonlinear codes. FIG. 7 is an example of an echo canceller disclosed in Japanese Patent Application Laid-Open No. 53-54408. In this drawing, symbols indicating correspondence with the present invention in FIG. 3 are written. Techniques for expressing and modifying these pseudo-echo paths using nonlinear codes have the excellent effect of reducing the capacity of the pseudo-echo path storage circuit. However, the algorithm for modifying the tap coefficient of the transversal filter of the pseudo echo path is complicated, and
In the figure, a multiplication/division circuit is required in the circuit configuration of the correction amount calculation circuit for calculating the correction amount, and there is a problem in that the hardware for performing the tap coefficient correction becomes large-scale. It is an object of the present invention to solve the above-mentioned conventional drawbacks, to simplify the algorithm for modifying the tap coefficient of an echo canceller with a transversal filter, and to reduce the need for hardware processing speed. The purpose of this invention is to provide an echo canceller that can be miniaturized. [Means for Solving the Problems] The echo canceller of the present invention includes a pseudo echo path that creates a pseudo echo signal from a received signal, and a residual echo signal that takes the difference between the echo signal and the output of the pseudo echo path. a subtractor that outputs a tap coefficient of the transversal filter of the pseudo echo path from the received signal and the residual echo signal; A memory circuit that stores information in
In the echo canceler, the echo canceler includes an adding means for adding the tap coefficient stored in the memory circuit and the tap coefficient correction amount and rewriting the contents of the memory circuit by the output thereof, the adding means adding the tap coefficient correction amount to the tap coefficient correction amount. a comparison circuit that compares the magnitude and sign of the nonlinear code of the coefficient correction amount with the contents of the storage circuit; and a comparison circuit that compares the magnitude and sign of the nonlinear code of the coefficient correction amount with the contents of the storage circuit; and a tap coefficient correction amount of the output signal of the storage circuit or the nonlinear code corresponding to the comparison result of the comparison circuit. The pseudo addition circuit is characterized in that it includes a selection control circuit that selectively outputs one of the following, and a circuit that adds or subtracts a predetermined value to the output signal of the selection control circuit. [Operation] In the pseudo addition circuit of the present invention, the tap coefficient modification amount of the transversal filter of the pseudo echo path is input, this modification amount and the tap coefficient of the storage circuit are input, and the sign and magnitude are compared in the comparison circuit. Then, depending on the comparison result, either the correction amount or the contents of the storage circuit is selected and output.
The addition algorithm is simple because a predetermined value (step width) is added to either of these outputs based on this selection output. [Example] Next, the present invention will be described in detail with reference to the drawings. FIG. 3 is a block diagram showing one embodiment of the present invention. In this figure, the input terminal of 1 is the 6th input terminal.
The received signal input terminal 4 corresponds to the output position of the correction amount calculator 63 in the figure, the received signal input terminal 4 corresponds to the received signal input position to the pseudo echo path 61, and the output terminal 6 corresponds to the received signal input position to the pseudo echo path 61.
1 corresponds to the output position. In the present invention, a pseudo addition circuit 31 is provided, and the pseudo adder 31 performs pseudo addition of the content of the nonlinear code representation stored in the storage circuit 3' of the transversal filter and the output of the nonlinear code representation of the correction amount calculator. Update the contents of the memory circuit 3' according to the result,
Then, the received signal is multiplied by the multiplier circuit 5 and output. The pseudo-addition described above compares the non-linearly encoded modification amount with the size of the memory circuit contents (tap coefficient), and calculates the value (based on a predetermined value) in the mantissa part for the larger sign. Addition is performed, and the carry operation from the mantissa to the area is performed by the operation of a normal linear addition circuit. The echo canceller operates by starting from an initial value of the tap coefficient of 0 and successively modifying the tap coefficient to reduce the residual echo signal, but even if the tap coefficient itself has a linear sign, There is no problem even if it is a nonlinear code. This is because if the multiplier circuit is constructed assuming that the tap coefficients supplied to the multiplier circuit 5 for synthesizing the pseudo-reverberation signal have non-linear codes, the tap coefficients will be corrected assuming that the tap coefficients are non-linear, and vice versa. This is because if the multiplier circuit is constructed assuming that the tap coefficient is a linear code, correction of the tap coefficient will be performed assuming that the tap coefficient is linear. In the conventional example shown in FIG. 1, the tap coefficient of the storage circuit 3 has a linear sign, but in the conventional example shown in FIG. 2, the tap coefficient of the storage circuit 3' has a nonlinear sign. However, in the past, it was necessary to perform linear encoding for addition, but in the present invention, by introducing the above-mentioned concept of pseudo addition, it is possible to perform pseudo addition as is with nonlinear codes. As a result, in FIG. 3, the capacity of the storage circuit 3' can be reduced, and the scale of the multiplication circuit 5 can also be reduced. Furthermore, a nonlinear/linear conversion circuit (exponential decoding circuit) 12 (shown in FIGS. 1 and 2) for linearly encoding the nonlinear code of the modified arithmetic circuit
will also become unnecessary. FIG. 4 shows the pseudo addition circuit 3 used in this embodiment.
1 is a block diagram showing an example of the configuration of FIG. In the figure, reference numeral 41 is a comparison circuit, reference numeral 42 is a selection control circuit, and reference numeral 43 is an addition circuit.
The comparison circuit 41 compares the amount of correction Δh of the nonlinear code inputted to the terminal 1 with the stored content (tap coefficient) h of the storage circuit 3. This comparison may be performed by simply comparing the area portions of both nonlinear codes. The selection control circuit 42 selectively selects the larger of the tap coefficient h (before modification) or the modification amount Δh based on the comparison result of the comparison circuit 41,
The constituent bits are sent to adder circuit 43. The addition circuit 43 adds or subtracts a predetermined value according to a control signal from the selection control circuit 42. The output signal of the adder circuit 43 is simulated as the sum of the tap coefficient and the correction amount, thereby rewriting the contents of the tap coefficient stored in the storage circuit 3', and also It is multiplied by the received input signal and output as a pseudo echo signal. The above will now be explained in more detail. The multiplication circuit 5 of the transversal filter is
By configuring the tap coefficient as a nonlinear code, the tap coefficient h is expressed by a nonlinear code as shown in Table 1, for example.

[Table] In other words, the sign bit s expressed in two's complement
, a, b, c assumed to be area bits, and eight mantissa bits M ₈ to M ₁ . Since the above area bit is composed of 3 bits, it can represent 8 areas. FIG. 5 shows the correspondence between the signal size and the area. That is, the region "0" represents a signal in an extremely small region, and the region "7" corresponds to a range between the maximum value and 1/2 of the maximum value. And each area is divided into 2 ⁸ by the mantissa part M ₈ ~ _{M 1}
=256 steps, and each step is a nonlinear step. The correction amount Δh is also expressed in a similar manner, but when the mantissa is fixed to 1, it is expressed as shown in Table 2.

[Table] Since the area bits in Table 2 are also composed of 3 bits, they represent eight areas, and the correspondence between the area number and the magnitude of the correction amount Δh is shown in FIG. The pseudo-addition is performed by outputting an output value h' determined by the combination of the magnitudes and signs of the tap coefficient h and the correction amount Δh, as shown in Table 3, for example. However, n in the table is the tap coefficient h
is the area number indicated by the area part of , and M indicates the content of the mantissa part. Further, n' is the area number of the correction amount Δh.

〔Effect of the invention〕

As described above, in the present invention, the tap coefficient correction of the transversal filter of the pseudo echo path is performed by comparing the input tap coefficient correction amount with the stored tap coefficient, and based on the comparison result, the storage circuit is Since the calculation is corrected by performing pseudo-addition in which either the output signal or the memory content is selected and a predetermined value is added, the algorithm for rewriting the tap coefficient is simplified, and the pseudo-addition The circuit may be low-speed hardware. As a result, it was possible to make the echo canceller economical.

[Brief explanation of drawings]

FIGS. 1 and 2 are diagrams for explaining an example of correction of tap coefficients of a conventional transversal filter. FIG. 3 is a block diagram showing one embodiment of the present invention. FIG. 4 is a diagram showing an example of the configuration of the pseudo addition circuit of the above embodiment. FIG. 5 is a diagram showing the relationship between tap coefficients, correction amounts, and area numbers. Figure 6 is a block diagram of an echo canceller. FIG. 7 is a block diagram showing a conventional echo canceller. 1...terminal, 2...addition circuit, 3, 3'...memory circuit,
4... Received signal input terminal, 5... Multiplier, 6... Output terminal, 12... Exponential decoding circuit, 21... Linear/nonlinear code conversion circuit, 22... Nonlinear/linear code conversion circuit,
31...Pseudo addition circuit, 41...Comparison circuit, 42...Selection control circuit, 43...Addition circuit, 60...Echo canceller, 61...Pseudo echo path, 62...Subtractor, 63...Modification amount calculator, 66...Hybrid coil .

Claims (1)

[Scope of Claims] 1. A pseudo echo path that creates a pseudo echo signal from a received signal; a subtractor that takes the difference between the echo signal and the output of the pseudo echo path and outputs a residual echo signal; a correction amount calculator that calculates and outputs a tap coefficient correction amount of the transversal filter of the pseudo echo path from the residual echo signal; a storage circuit that stores the tap coefficient of the transversal filter in a nonlinear code; In an echo canceller, the echo canceler includes an adding means for adding the stored tap coefficient and the tap coefficient correction amount and rewriting the contents of the storage circuit with the output thereof, the adding means comprising: adding the tap coefficient correction amount to the tap coefficient correction amount; a comparison circuit that compares the magnitude and sign of the nonlinear code with the contents of the storage circuit; and a comparison circuit that adjusts either the output signal of the storage circuit or the tap coefficient correction amount of the nonlinear code in response to the comparison result of the comparison circuit. An echo canceller characterized in that it is a pseudo addition circuit including a selection control circuit that selectively outputs and a circuit that adds or subtracts a predetermined value to the output signal of the selection control circuit.