JPS6476567A - Jitter measuring system for disk storage device - Google Patents

Jitter measuring system for disk storage device

Info

Publication number
JPS6476567A
JPS6476567A JP23258887A JP23258887A JPS6476567A JP S6476567 A JPS6476567 A JP S6476567A JP 23258887 A JP23258887 A JP 23258887A JP 23258887 A JP23258887 A JP 23258887A JP S6476567 A JPS6476567 A JP S6476567A
Authority
JP
Japan
Prior art keywords
pulse
latch
jitter
shift register
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23258887A
Other languages
Japanese (ja)
Inventor
Toshio Okada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23258887A priority Critical patent/JPS6476567A/en
Publication of JPS6476567A publication Critical patent/JPS6476567A/en
Pending legal-status Critical Current

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  • Rotational Drive Of Disk (AREA)

Abstract

PURPOSE:To measure jitter while reading data by finding the value of the jitter as the position of a latch register by which a read pulse is latched by transferring the read pulse stored in each stage of a shift register to a corresponding latch register. CONSTITUTION:An output pulse P is inputted to the first stage of shift register 2, and is shifted sequentially by a clock C generated from the output pulse P by a phase synchronizing oscillator 1. A latch pulse generation circuit 3 outputs a latch pulse R at every window period generated based on the clock pulse C from the phase synchronizing oscillator 1, and latches the value stored in each of the stages 21-25 of the shift register 2 in the latch registers 41-45 provided correspondingly. Then, the value of the jitter is found as the position of the latch registers 41-45 where the read pulse P is latched. In such a way, it is possible to measure the jitter of output easily and surely as reading out the data.
JP23258887A 1987-09-18 1987-09-18 Jitter measuring system for disk storage device Pending JPS6476567A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23258887A JPS6476567A (en) 1987-09-18 1987-09-18 Jitter measuring system for disk storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23258887A JPS6476567A (en) 1987-09-18 1987-09-18 Jitter measuring system for disk storage device

Publications (1)

Publication Number Publication Date
JPS6476567A true JPS6476567A (en) 1989-03-22

Family

ID=16941714

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23258887A Pending JPS6476567A (en) 1987-09-18 1987-09-18 Jitter measuring system for disk storage device

Country Status (1)

Country Link
JP (1) JPS6476567A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100696049B1 (en) * 1998-10-20 2007-03-15 프론티어 인코포레이티드 Biaxial stretch blow molding machine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100696049B1 (en) * 1998-10-20 2007-03-15 프론티어 인코포레이티드 Biaxial stretch blow molding machine

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