JPS6474473A - Timing generator for tester - Google Patents
Timing generator for testerInfo
- Publication number
- JPS6474473A JPS6474473A JP62231697A JP23169787A JPS6474473A JP S6474473 A JPS6474473 A JP S6474473A JP 62231697 A JP62231697 A JP 62231697A JP 23169787 A JP23169787 A JP 23169787A JP S6474473 A JPS6474473 A JP S6474473A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- clock signal
- external synchronizing
- synchronizing signal
- correcting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
Abstract
PURPOSE:To generate a phase clock signal with high accuracy by finding a correcting value from the difference between an external synchronizing signal and a clock signal every time the external synchronizing signal is received, and correcting the phase clock of a timing generating circuit. CONSTITUTION:When the external synchronizing signal P is inputted, a timing generating circuit 12 sends out a phase clock signal synchronized with a reference clock signal Ck to the timing correcting circuit 14. When a synchronism error measuring circuit 11 receives the external synchronizing signal P, said circuit 11 actuates a lamp voltage generating circuit 11a. An output voltage value held by the peak voltage holding circuit of the lamp voltage generating circuit 11a is inputted to an ALU 15 through an A/D converter 11b. The ALU 15 calculates a delay time synchronized with the external synchronizing signal P and sends out the result value to a timing correcting circuit 14. Here, a phase- corrected phase clock signal CKo is obtained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62231697A JP2671207B2 (en) | 1987-09-16 | 1987-09-16 | Tester timing generator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62231697A JP2671207B2 (en) | 1987-09-16 | 1987-09-16 | Tester timing generator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6474473A true JPS6474473A (en) | 1989-03-20 |
JP2671207B2 JP2671207B2 (en) | 1997-10-29 |
Family
ID=16927584
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62231697A Expired - Fee Related JP2671207B2 (en) | 1987-09-16 | 1987-09-16 | Tester timing generator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2671207B2 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63298076A (en) * | 1987-05-29 | 1988-12-05 | Hitachi Ltd | Timing signal generator |
-
1987
- 1987-09-16 JP JP62231697A patent/JP2671207B2/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63298076A (en) * | 1987-05-29 | 1988-12-05 | Hitachi Ltd | Timing signal generator |
Also Published As
Publication number | Publication date |
---|---|
JP2671207B2 (en) | 1997-10-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SE9603368D0 (en) | Method and device for synchronizing time stamping | |
JPS647400A (en) | Ic tester | |
ES8705721A1 (en) | Circuit arrangement for the synchronisation of a signal. | |
CH641308GA3 (en) | ||
SE8804461D0 (en) | CLOCK HOLDOVER CIRCUIT | |
GB2120039B (en) | Apparatus for measuring the delay time of electrical pulse signals | |
GB1514039A (en) | Arrangement for measuring the lag between two timed signals by electronic correlation | |
GB2140239A (en) | Television frame signal synchronizing circuits | |
ES469660A1 (en) | Time base for synchronous generation of frame and clock pulses | |
JPS6474473A (en) | Timing generator for tester | |
JPS5535545A (en) | Digital phase synchronous circuit | |
EP0353027A3 (en) | Programmable time advance | |
JPS5252616A (en) | Synchronous signal generating circuit in data reading device | |
JPS6413833A (en) | Frame synchronizing clock generating circuit | |
JPS5431260A (en) | Digital control phase synchronizing device | |
JP3147129B2 (en) | Timing generator | |
JPS6451712A (en) | Clock synchronizing circuit | |
FR2335098A1 (en) | Digital phase locked loop for navigation systems - is designed specially for microwave systems such as TACAN and includes a/d converter and sequence register | |
JPS5787241A (en) | Phase synchronizing circuit for optional frequency conversion | |
KR970005112Y1 (en) | Phase locking device | |
SU621112A1 (en) | Timing signal analyzer | |
SU621059A1 (en) | Device for single-channel phase control of converter | |
SU809136A1 (en) | Sync pulse generator | |
SU964984A1 (en) | Digital frequency synthesizer | |
SU1335996A1 (en) | Follow-up frequency multiplier |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |