JPS6468869A - Buffer control system for bus adapter - Google Patents

Buffer control system for bus adapter

Info

Publication number
JPS6468869A
JPS6468869A JP22711787A JP22711787A JPS6468869A JP S6468869 A JPS6468869 A JP S6468869A JP 22711787 A JP22711787 A JP 22711787A JP 22711787 A JP22711787 A JP 22711787A JP S6468869 A JPS6468869 A JP S6468869A
Authority
JP
Japan
Prior art keywords
address
memory
buffer memory
data
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22711787A
Other languages
English (en)
Inventor
Kenichi Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22711787A priority Critical patent/JPS6468869A/ja
Publication of JPS6468869A publication Critical patent/JPS6468869A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP22711787A 1987-09-09 1987-09-09 Buffer control system for bus adapter Pending JPS6468869A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22711787A JPS6468869A (en) 1987-09-09 1987-09-09 Buffer control system for bus adapter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22711787A JPS6468869A (en) 1987-09-09 1987-09-09 Buffer control system for bus adapter

Publications (1)

Publication Number Publication Date
JPS6468869A true JPS6468869A (en) 1989-03-14

Family

ID=16855744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22711787A Pending JPS6468869A (en) 1987-09-09 1987-09-09 Buffer control system for bus adapter

Country Status (1)

Country Link
JP (1) JPS6468869A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109807331A (zh) * 2019-01-24 2019-05-28 西安交通大学 一种铜基石墨自润滑道岔滑床板的制备方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109807331A (zh) * 2019-01-24 2019-05-28 西安交通大学 一种铜基石墨自润滑道岔滑床板的制备方法

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