JPS6460134A - Identification regenerating circuit - Google Patents

Identification regenerating circuit

Info

Publication number
JPS6460134A
JPS6460134A JP21739287A JP21739287A JPS6460134A JP S6460134 A JPS6460134 A JP S6460134A JP 21739287 A JP21739287 A JP 21739287A JP 21739287 A JP21739287 A JP 21739287A JP S6460134 A JPS6460134 A JP S6460134A
Authority
JP
Japan
Prior art keywords
threshold
output
signal
constitution
holding means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21739287A
Other languages
Japanese (ja)
Inventor
Yasuyuki Oishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP21739287A priority Critical patent/JPS6460134A/en
Publication of JPS6460134A publication Critical patent/JPS6460134A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To decrease an error rate deterioration and to obtain a characteristic improvement effect equal to a decision by two thresholds with a simple circuit constitution by holding a decision output signal to decide and generate an input signal with the threshold and executing a control to change the level of the threshold according to the output of a holding means to output a demodulating signal. CONSTITUTION:The titled circuit is composed by equipping with an identifying means 1, a holding means 2 and a level control means 3. The identifying means 1 decides the input signal by the threshold and generates an output signal. The holding means 2 holds the decision output signal and outputs the demodulating signal. The level control means 3 executes the control to change the level of the input signal or of the threshold according to the output of the holding means 2. By changing a deciding bit or the threshold by a voltage DELTAV with the constitution, a maximum identification allowance degree can be obtained. Thus, the error rate can be improved in an S/N, and the circuit constitution can be simplified compared with a system to use the two thresholds.
JP21739287A 1987-08-31 1987-08-31 Identification regenerating circuit Pending JPS6460134A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21739287A JPS6460134A (en) 1987-08-31 1987-08-31 Identification regenerating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21739287A JPS6460134A (en) 1987-08-31 1987-08-31 Identification regenerating circuit

Publications (1)

Publication Number Publication Date
JPS6460134A true JPS6460134A (en) 1989-03-07

Family

ID=16703462

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21739287A Pending JPS6460134A (en) 1987-08-31 1987-08-31 Identification regenerating circuit

Country Status (1)

Country Link
JP (1) JPS6460134A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008044407A1 (en) * 2006-10-11 2008-04-17 Thine Electronics, Inc. Clock data recovery device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008044407A1 (en) * 2006-10-11 2008-04-17 Thine Electronics, Inc. Clock data recovery device
JP2008098930A (en) * 2006-10-11 2008-04-24 Thine Electronics Inc Clock data restoration apparatus
US8045664B2 (en) 2006-10-11 2011-10-25 Thine Electronics, Inc. Clock data recovery device
KR101277432B1 (en) * 2006-10-11 2013-06-20 쟈인 에레쿠토로닉스 가부시키가이샤 Clock data recovery device

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