JPS6453452A - Manufacture of semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To form a polycrystalline silicon base structure and a shallow junction submicron level emitter simultaneously by a method wherein an insulating film is formed on a polycrystalline semiconductor layer, then openings are provided on an active base forming region and a collector electrode forming region, a selective single crystal semiconductor layer is formed and made to be brought into electrical contact with the polycrystalline semicon ductor layer, and an emitter region diffusion window is provided on the openings. CONSTITUTION:A silicon oxide film 3 and a low resistive polycrystalline silicon layer 4 are formed on a semiconductor substrate which is composed of a P<->-type silicon substrate 1 with an N<+>-type buried layer 2 formed on it. Openings 6 and 7 are formed such as to make their bases reach the buried diffusion layer 2 through a resist employed as a mask by means of an anisotropic etching technique. Next, a second CVD oxide film 8 is formed on the whole face, then an oxide film is residually formed on the sidewall of the openings 6 and 7. A selective epitaxial growth is performed onto the N<+> buried diffusion layer 2, a thin thermal oxidation film 10 is built on the formed epitaxial layer 9, then a collector resistance is made to decrease, an N<+> region 11 is formed, and an active base region 12 is formed out of a P-type impurity on the whole face. Next, an oxide film 13 is residually formed on the sidewall of a first CVD oxide film 5 and an emitter region diffusion window 14 is opened through a self-aligned manner.