JPS6453271A - Binary and multivalued conversion method and it's device - Google Patents

Binary and multivalued conversion method and it's device

Info

Publication number
JPS6453271A
JPS6453271A JP62209640A JP20964087A JPS6453271A JP S6453271 A JPS6453271 A JP S6453271A JP 62209640 A JP62209640 A JP 62209640A JP 20964087 A JP20964087 A JP 20964087A JP S6453271 A JPS6453271 A JP S6453271A
Authority
JP
Japan
Prior art keywords
bit
value
binary image
complying
memory means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62209640A
Other languages
Japanese (ja)
Inventor
Shigeo Shimazaki
Satoru Takayama
Chika Onodera
Katsura Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62209640A priority Critical patent/JPS6453271A/en
Publication of JPS6453271A publication Critical patent/JPS6453271A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To accelerate processing without using a high speed clock by executing the processing which a binary image is converted to a multivalued image for plural picture elements at once. CONSTITUTION:A first memory means 11 storing the binary image of which one picture element is constituted by one bit, an enlargement means 12 enlarging each bit of the binary image supplied by the first memory means 11 to (n) bit, a second memory means 13 maintaining at least the value of the (n) bit complying with the binary image when the value of it's one bit is zero and a third memory means 14 maintaining at least the value of the (n) bit complying with the binary image when the value of it's one bit is '1' are provided. Besides, a selection means 15 which decides the information of the (n) bit complying with the one bit of the binary image obtained by being enlarged with the aid of the enlargement means 12, selects the complying bit value of the second memory means 14 when the value is '0' and selects the complying bit value of the said third memory means 14 is provided. Thus conversion from the binary image to the multivalued image without using the high speed clock, that means the binary and multivalued method and it's device can be obtained.
JP62209640A 1987-08-24 1987-08-24 Binary and multivalued conversion method and it's device Pending JPS6453271A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62209640A JPS6453271A (en) 1987-08-24 1987-08-24 Binary and multivalued conversion method and it's device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62209640A JPS6453271A (en) 1987-08-24 1987-08-24 Binary and multivalued conversion method and it's device

Publications (1)

Publication Number Publication Date
JPS6453271A true JPS6453271A (en) 1989-03-01

Family

ID=16576137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62209640A Pending JPS6453271A (en) 1987-08-24 1987-08-24 Binary and multivalued conversion method and it's device

Country Status (1)

Country Link
JP (1) JPS6453271A (en)

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