JPS645245B2 - - Google Patents

Info

Publication number
JPS645245B2
JPS645245B2 JP12285082A JP12285082A JPS645245B2 JP S645245 B2 JPS645245 B2 JP S645245B2 JP 12285082 A JP12285082 A JP 12285082A JP 12285082 A JP12285082 A JP 12285082A JP S645245 B2 JPS645245 B2 JP S645245B2
Authority
JP
Japan
Prior art keywords
input
sample
switch
signal
recording
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP12285082A
Other languages
Japanese (ja)
Other versions
JPS5913913A (en
Inventor
Toshikazu Ida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chino Corp
Original Assignee
Chino Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chino Corp filed Critical Chino Corp
Priority to JP12285082A priority Critical patent/JPS5913913A/en
Publication of JPS5913913A publication Critical patent/JPS5913913A/en
Publication of JPS645245B2 publication Critical patent/JPS645245B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01DMEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D1/00Measuring arrangements giving results other than momentary value of variable, of general application
    • G01D1/02Measuring arrangements giving results other than momentary value of variable, of general application giving mean values, e.g. root means square values

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Recording Measured Values (AREA)

Description

【発明の詳細な説明】 (1) 発明の分野 この発明は、演算結果も記録できる記録計に関
するものである。
[Detailed Description of the Invention] (1) Field of the Invention The present invention relates to a recorder that can also record calculation results.

(2) 従来技術 いわゆるアナログ記録計は、入力信号を増幅し
て記録紙に記録するものであるが、複数の入力信
号について平均値演算結果等を記録したい場合等
には対応ができない問題点があつた。
(2) Prior art So-called analog recorders amplify input signals and record them on recording paper, but they have the problem of not being able to handle situations such as recording average value calculation results for multiple input signals. It was hot.

(3) 発明の目的 この発明の目的は、以上の点に鑑み、演算記録
を可能とした記録計を提供することである。
(3) Purpose of the Invention In view of the above points, the purpose of the present invention is to provide a recorder that is capable of recording calculations.

(4) 発明の実施例 第1図はこの発明の一実施例を示す構成説明図
である。
(4) Embodiment of the Invention FIG. 1 is a configuration explanatory diagram showing an embodiment of the invention.

図において1は、複数(N−1個)の入力信号
が供給される入力端子、SW10は、複数の入力信
号を切換選択する入力切換器、2は入力切換器
SW10により選択された入力信号を増幅するプリ
アンプ、3はプリアンプ2の出力信号をサンプル
ホールドする複数のサンプルホールド器SH1
…,SHN-1、よりなるサンプルホールド回路、4
は抵抗R1,…,RN-1、増幅器A等よりなり平均
値等の演算を行う演算回路、SW11はサンプルホ
ールド回路3のどのサンプルホールド器SH1
…,SHN-1にサンプルホールドさせるかを選択す
る入力切換器SW10に同期した選択器、SW2は印
点式記録計等の印点動作直前に導通信号を発生
し、選択器SW11を介してサンプルホールド回路
3に電圧+V1を与えサンプルホールド動作をさ
せるスイツチ、SW3はプリアンプ2の出力信号ま
たは演算回路4の出力信号を切換えるリレー等の
選択スイツチ、SW12は入力切換器SW10と同期
し、Nチヤンネル目、つまり演算回路4の出力を
取り出す場合、選択スイツチSW3に電圧+Voを
与えて駆動する切換器、5は選択スイツチSW3
出力が供給され、サーボアンプ51、サーボモー
タM、ポテンシヨン回路52等よりなるサーボユ
ニツト、6はサーボユニツト5のサーボモータM
と連動して印点式等の記録機構61の記録位置を
制御し、目盛板62に指示するとともに記録紙6
3に記録を行う記録部である。
In the figure, 1 is an input terminal to which multiple (N-1) input signals are supplied, SW 10 is an input switcher that switches between multiple input signals, and 2 is an input switcher.
A preamplifier that amplifies the input signal selected by SW 10 , 3 a plurality of sample and hold devices SH 1 that sample and hold the output signal of the preamplifier 2,
..., SH N-1 , sample hold circuit consisting of 4
is an arithmetic circuit consisting of resistors R 1 , ..., R N-1 , amplifier A, etc., and performs calculations such as average values, and SW 11 is a sample-hold device SH 1 , which of the sample-hold circuit 3,
..., SH N-1 is a selector synchronized with the input switch SW 10 that selects whether to hold the sample. SW 2 generates a conductive signal just before the marking operation of a marking type recorder, etc., and selector SW 11 SW 3 is a selection switch such as a relay that switches the output signal of the preamplifier 2 or the output signal of the arithmetic circuit 4. SW 12 is the input switch SW In synchronization with 10 , when taking out the output of the Nth channel, that is, the arithmetic circuit 4, the selection switch SW 3 is driven by applying voltage +Vo, and 5 is a switch to which the output of the selection switch SW 3 is supplied, and the servo amplifier 51 A servo unit consisting of a servo motor M, a potentiometer circuit 52, etc., 6 is the servo motor M of the servo unit 5.
It controls the recording position of the recording mechanism 61, such as a marking type, and instructs the scale plate 62, as well as the recording paper 6.
3. This is a recording section that performs recording.

次に第2図を参照して動作を説明する。 Next, the operation will be explained with reference to FIG.

入力切換器SW10は順次1〜N−1個の入力信
号を切換、プリアンプ2に供給し、N番目では入
力信号を選択しない。第1番目の入力信号e1が選
択されたとすると、この信号はプリアンプ2を介
してサンプルホールド回路3に供給される。この
とき選択器SW11は、サンプルホールド器SH1
ホールドさるよう選択されており、印点動作と同
期したスイツチSW2のオンに対応してサンプル信
号+V1がサンプルホールド器SH1に与えられ、
入力信号e1がサンプルホールドされる。他方、選
択スイツチSW3が、切換器SW12よりオン信号を
与えられていないためオフなので、プリアンプ2
の出力信号e1は、サーボユニツト5に与えられ、
記録部6にて入力信号e1の大きさに対応した指
示・記録が行なわれる。以下、2〜N−1番目の
入力信号e2,…eN-1についても同様である。
The input switch SW 10 sequentially switches 1 to N-1 input signals and supplies them to the preamplifier 2, and does not select the Nth input signal. If the first input signal e 1 is selected, this signal is supplied to the sample and hold circuit 3 via the preamplifier 2 . At this time, the selector SW 11 is selected to be held in the sample and hold device SH 1 , and the sample signal +V 1 is given to the sample and hold device SH 1 in response to the turning on of the switch SW 2 in synchronization with the marking operation. ,
Input signal e1 is sampled and held. On the other hand, the selection switch SW 3 is off because it is not receiving the on signal from the switch SW 12 , so the preamplifier 2
The output signal e1 is given to the servo unit 5,
The recording section 6 performs instructions and recordings corresponding to the magnitude of the input signal e1 . The same applies to the 2nd to N-1th input signals e 2 , . . . e N-1 .

これらN−1個の入力信号は、サンプルホール
ド回路3にサンプルホールドされ、演算回路4に
より、この例では平均値演算が行なわれる。な
お、演算として、特定の入力信号についての差演
算、加算等、種々の演算が考えられる。
These N-1 input signals are sampled and held by a sample and hold circuit 3, and an average value calculation is performed by an arithmetic circuit 4 in this example. Note that various calculations can be considered as calculations, such as difference calculations and additions for specific input signals.

次に、入力切換器SW10が第N番目を選択する
と入力信号は選択されず、サンプルホールド動作
もされず、切換器SW12ははじめて電圧+Voを選
択スイツチSW3に与え駆動し、選択スイツチSW3
は演算回路4の出力をサーボユニツト5に与え
る。サーボユニツト5は演算回路4の出力に応じ
て、記録部6にて指示・記録を行わせる。
Next, when the input switch SW 10 selects the Nth input signal, the input signal is not selected and no sample-hold operation is performed, and the switch SW 12 applies voltage +Vo to the selection switch SW 3 for the first time to drive it, and the selection switch SW 3
provides the output of the arithmetic circuit 4 to the servo unit 5. The servo unit 5 causes the recording section 6 to perform instructions and recording in accordance with the output of the arithmetic circuit 4.

以下、同様にして、1〜N−1個の入力信号の
指示・記録と、これら入力信号のサンプルホール
ド値の演算結果の指示・記録とを順次くり返す。
Thereafter, in the same manner, the instruction and recording of 1 to N-1 input signals and the instruction and recording of the calculation results of sample and hold values of these input signals are repeated in sequence.

なお、サンプルホールド回路3の出力をA−D
変換してメモリに記憶し、マイクロコンピユータ
のようなもので演算処理するようにしてもよい。
Note that the output of the sample hold circuit 3 is
It is also possible to convert and store it in memory, and to perform arithmetic processing on something like a microcomputer.

(5) 発明の要約 以上述べたように、この発明は、複数の入力信
号について指示・記録するとともに、サンプルホ
ールド回路にサンプルホールドして演算処理を行
い指示・記録をするようにした記録計である。
(5) Summary of the Invention As described above, the present invention is a recorder that not only indicates and records a plurality of input signals, but also samples and holds them in a sample-and-hold circuit, performs arithmetic processing, and then indicates and records them. be.

(6) 発明の効果 通常の測定値の記録の他に、平均値等の演算結
果も記録できるので、両方の記録結果を知ること
ができ非常に便利なものとなる。
(6) Effects of the invention In addition to recording normal measured values, calculation results such as average values can also be recorded, making it extremely convenient to know both recorded results.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この発明の一実施例を示す構成説明
図、第2図は動作説明用信号図である。 1……入力端子、2……プリアンプ、3……サ
ンプルホールド回路、4……演算回路、5……サ
ーボユニツト、6……記録部、SW10……入力切
換器、SW11……選択器、SW12……切換器、
SW2,SW3……スイツチ。
FIG. 1 is a configuration explanatory diagram showing an embodiment of the present invention, and FIG. 2 is a signal diagram for explaining operation. 1...Input terminal, 2...Preamplifier, 3...Sample hold circuit, 4...Arithmetic circuit, 5...Servo unit, 6...Recording section, SW 10 ...Input switch, SW 11 ...Selector , SW 12 ...Switcher,
SW 2 , SW 3 ...Switch.

Claims (1)

【特許請求の範囲】 1 複数の入力信号を切換選択する入力切換器
と、この入力切換器により選択された複数の入力
信号をそれぞれサンプルホールドするサンプルホ
ールド回路と、このサンプルホールド回路にホー
ルドされた信号の演算処理を行う演算回路と、こ
の演算回路の出力信号または前記入力切換器によ
り選択された入力信号を切換える選択スイツチ
と、この選択スイツチにより取り出された入力信
号または演算回路の出力信号を記録する記録部と
を備えたことを特徴とする記録計。 2 印点式記録計において、印点動作直前の導通
信号により前記サンプルホールド回路にサンプル
ホールド動作をさせるようにしたことを特徴とす
る特許請求の範囲第1項記載の記録計。
[Claims] 1. An input switch that switches and selects a plurality of input signals, a sample hold circuit that samples and holds each of the plurality of input signals selected by the input switch, and a sample hold circuit that samples and holds each of the plurality of input signals selected by the input switch, and An arithmetic circuit that performs arithmetic processing of signals, a selection switch that switches the output signal of this arithmetic circuit or the input signal selected by the input switch, and records the input signal taken out by the selection switch or the output signal of the arithmetic circuit. A recorder comprising: a recording section for recording. 2. The point-and-spot recorder according to claim 1, wherein the sample-and-hold circuit is caused to perform a sample-and-hold operation by a conduction signal immediately before the point-spot operation.
JP12285082A 1982-07-16 1982-07-16 Recorder Granted JPS5913913A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12285082A JPS5913913A (en) 1982-07-16 1982-07-16 Recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12285082A JPS5913913A (en) 1982-07-16 1982-07-16 Recorder

Publications (2)

Publication Number Publication Date
JPS5913913A JPS5913913A (en) 1984-01-24
JPS645245B2 true JPS645245B2 (en) 1989-01-30

Family

ID=14846179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12285082A Granted JPS5913913A (en) 1982-07-16 1982-07-16 Recorder

Country Status (1)

Country Link
JP (1) JPS5913913A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4607525A (en) * 1984-10-09 1986-08-26 General Signal Corporation Height measuring system
GB2198524B (en) * 1986-12-11 1990-08-29 Plessey Co Plc Improvements relating to optical sensing systems

Also Published As

Publication number Publication date
JPS5913913A (en) 1984-01-24

Similar Documents

Publication Publication Date Title
US3973197A (en) Peak detector
JPS645245B2 (en)
JPS647433B2 (en)
JP2630960B2 (en) Waveform recording device using thermal dot array
US4392429A (en) Multiplicative adjustment provision at an ink feed remote control device
US4686588A (en) Azimuth adjustment apparatus for a magnetic head
JPH0262010B2 (en)
JPH021682Y2 (en)
SU1182572A2 (en) Device for magnetic recording and reproducing
JPS5813692Y2 (en) dot type recorder
JPS5812090Y2 (en) multi-point recorder
JPH0526966Y2 (en)
JPH0543042B2 (en)
JPH0714325A (en) Magnetic disk device
JPH0521197Y2 (en)
JP2856667B2 (en) Differential circuit
JPH051773Y2 (en)
JPS5810685B2 (en) recorder
SU879643A1 (en) Device for magnetic recording and reproduction
SU606161A1 (en) Apparatus for magnetic recording-reproducing of mechanical oscillations of investigated objects
JPH07294290A (en) Recorder
JPH057543Y2 (en)
JP3612980B2 (en) Magnetic recording / reproducing device
JPS60167184A (en) Method for recording tape location information
JPS6231849Y2 (en)