JPS5913913A - Recorder - Google Patents

Recorder

Info

Publication number
JPS5913913A
JPS5913913A JP12285082A JP12285082A JPS5913913A JP S5913913 A JPS5913913 A JP S5913913A JP 12285082 A JP12285082 A JP 12285082A JP 12285082 A JP12285082 A JP 12285082A JP S5913913 A JPS5913913 A JP S5913913A
Authority
JP
Japan
Prior art keywords
signal
sample
input
switch
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12285082A
Other languages
Japanese (ja)
Other versions
JPS645245B2 (en
Inventor
Toshikazu Ida
位田 敏和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chino Corp
Original Assignee
Chino Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chino Works Ltd filed Critical Chino Works Ltd
Priority to JP12285082A priority Critical patent/JPS5913913A/en
Publication of JPS5913913A publication Critical patent/JPS5913913A/en
Publication of JPS645245B2 publication Critical patent/JPS645245B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01DMEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D1/00Measuring arrangements giving results other than momentary value of variable, of general application
    • G01D1/02Measuring arrangements giving results other than momentary value of variable, of general application giving mean values, e.g. root means square values

Abstract

PURPOSE:To record arithmetic results such as a mean value in addition to measured values by smapling and holding plural input signals in a sample holding circuit and perform processing. CONSTITUTION:When an input signal e1 is selected, this signla is supplied to the sample holding circuit 3 through a preamplifier 2. At this time, a selector SW11 is so set that the signal is held by a sample holder SH1, and once a switch SW2 synchronizing with print point operation s turned on, a smaple signal +V1 is supplied to the sample holder SH1, sampling and holding the input signal e1. A selection switch SW3 is off because no on signal is supplied from a switch SW12, so the output signal e1 of the preamplifier 2 is supplied to a servo unit 5 and a recording part 6 performs indication and recording corresponding to the level of the input signal e1. Input signals e2-eN-1 are the same. Those (N-1) input signals are sampled and held by a sample holding circuit 3 and an arithmetic circuit 4 calculates the mean value.

Description

【発明の詳細な説明】 (1)発明の分野 この発明は、演算結果も記録できる記録計に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION (1) Field of the Invention The present invention relates to a recorder that can also record calculation results.

(2)従来技術 いわゆるアナログ記録計は、入力信号を増幅して記録紙
に記録するものであるが、複数の入力信号について平均
値演算結果等を記録したい場合等には対応ができない問
題点があった。
(2) Conventional technology So-called analog recorders amplify input signals and record them on recording paper, but they have the problem of not being able to handle situations such as recording average value calculation results for multiple input signals. there were.

(3)発明の目的 この発明の目的は2以上の点に鑑み、演算記録を可能と
した記録計を提供することである。
(3) Purpose of the Invention In view of two or more points, the purpose of the present invention is to provide a recorder that is capable of recording calculations.

(4)発明の実施例 第1図はこの発明の一実施例を示す構成説明図である。(4) Examples of the invention FIG. 1 is a configuration explanatory diagram showing an embodiment of the present invention.

図においで1は、複数(N−1個)の入力信号が供給さ
れる入力端子、 5WIOは、複数の入力信号を切換選
択する入力切換器、2は入力切換器層により選択された
入力信号を増幅するプリアンプ。
In the figure, 1 is an input terminal to which a plurality of (N-1) input signals are supplied, 5WIO is an input switch that switches and selects a plurality of input signals, and 2 is an input signal selected by the input switch layer. A preamplifier that amplifies the.

3はプリアンプ2の出力信号をサンプルホールドする複
数のサンプルホールド器SHI、・・・r 5HN−1
+よりなるサンプルホールド回路、4は抵抗R1,・・
・。
3 is a plurality of sample and hold devices SHI, which sample and hold the output signal of the preamplifier 2,...r 5HN-1
Sample and hold circuit consisting of +, 4 is resistor R1,...
・.

RN−1,増幅器A等よりなり平均値等の演算を行う演
算回路、 5Wltはサンプルホールド回路3のどのサ
ンプルホールド器S、f(1,・・・、5HN−1にサ
ンプルホールドさせるかを選択する入力切換器5WIO
に同期した選択器、8W2は印点式記録計等の印点動作
直前に導通信号を発生し1選択器5WIIを介してサン
プルホールド回路3に電圧+v1を与えサンプルホール
ド動作をさせるスイッチ、 SW3はプリアンプ2の出
力信号または演算回路4の出力信号を切換えるリレー等
の選択スイッチ、  5W12は入力切換器5WIOと
同期し、Nチャンネル目、つまり演算回路4の出方を取
り出す場合1選択スイッチSW3に電圧子Voを与えて
駆動する切換器。
An arithmetic circuit consisting of RN-1, amplifier A, etc., which calculates the average value, etc. 5Wlt selects which sample-hold device S, f(1,..., 5HN-1) of the sample-and-hold circuit 3 will hold the sample. Input switch 5WIO
The selector 8W2 is a switch that generates a conductive signal just before the point operation of a point recorder, etc., and applies voltage +v1 to the sample hold circuit 3 via the selector 1 5WII to perform the sample hold operation. A selection switch such as a relay that switches the output signal of the preamplifier 2 or the output signal of the arithmetic circuit 4, 5W12, is synchronized with the input switch 5WIO, and when taking out the Nth channel, that is, the output of the arithmetic circuit 4, the voltage is applied to the 1 selection switch SW3. A switching device that is driven by giving the child Vo.

5は選択スイッチSW3の出方が供給され、サーボアン
プ51.サーボモータM、ポテンショ回路52等の記録
位置を制御し、目盛板62に指示するとともに記録紙6
3に記録を行う記録部である。
5 is supplied with the selection switch SW3, and the servo amplifier 51.5 is supplied with the selection switch SW3. It controls the recording position of the servo motor M, potentiometer circuit 52, etc., instructs the scale plate 62, and also controls the recording paper 6.
3. This is a recording section that performs recording.

次に第2図を参照して動作を説明する。Next, the operation will be explained with reference to FIG.

入力切換器S wtoは順次1〜N−1個の入力信号を
切換、プリアンプ2に供給し、N番目では入力信号を選
択しない。第1番目の入力信号e1が選択されたとする
と、この信号はプリアンプ2を介してサンプルホールド
回路3に供給される。このとき選択器5W11は、サン
プルホールド器SH1にホールドさせるよう選択されて
おり、印点動作と同期したスイッチSW2のオンに対応
してサンプル信号子■1がサンプルホールド器SHIに
与えられ。
The input switch S wto sequentially switches 1 to N-1 input signals and supplies them to the preamplifier 2, and does not select the Nth input signal. If the first input signal e1 is selected, this signal is supplied to the sample and hold circuit 3 via the preamplifier 2. At this time, the selector 5W11 is selected to cause the sample and hold device SH1 to hold, and the sample signal 1 is applied to the sample and hold device SHI in response to the turning on of the switch SW2 in synchronization with the marking operation.

入力信号e1がサンプルホールドされる。他方9選択ス
イッチS W3が、切換器5W12よりオン信号を与え
られでいないためオフなので、プリアンプ2の出力信号
e1は、サーボユニット5に与えられ。
Input signal e1 is sampled and held. On the other hand, the 9 selection switch SW3 is off because it is not given the on signal from the switch 5W12, so the output signal e1 of the preamplifier 2 is given to the servo unit 5.

記録部6にて入力信号e1の大きさに対応した指示・記
録が行なわれる。以下、2〜N−1番目の入力信号e2
.・・・eN−xiHMいても同様である。
The recording section 6 performs instructions and recordings corresponding to the magnitude of the input signal e1. Hereinafter, the 2nd to N-1st input signals e2
.. ...The same applies to eN-xiHM.

これらN−1個の入力信号は、サンプルホールド回路3
にサンプルホールドされ、演算回路4により、この例で
は平均値演算が行なわれる。なお。
These N-1 input signals are sent to the sample and hold circuit 3.
In this example, the average value is calculated by the calculation circuit 4. In addition.

演算として、特定の入力信号についての差演算。As an operation, a difference operation on a specific input signal.

加算等2種々の演算が考えられる。Two different operations such as addition are possible.

次に、入力切換器孔が第N番目を選択すると入力信号は
選択されず、サンプルホールド動作もされず、切換器5
W12ははじめて電圧+vOを選択スイッチS W3に
与え駆動し2選択スイッチSWsは演算回路4の出力を
サーボユニット5に与える。
Next, when the input switch hole selects the Nth position, the input signal is not selected, no sample hold operation is performed, and the switch 5
W12 applies a voltage +vO to the selection switch SW3 for the first time to drive it, and the second selection switch SWs applies the output of the arithmetic circuit 4 to the servo unit 5.

サーボユニット5は演算回路4の出力に応じて。The servo unit 5 responds to the output of the arithmetic circuit 4.

記録部6にて指示・記録を行わせる。The recording unit 6 is caused to perform instructions and recording.

以下、同様にして、1〜N−1個の入力信号の指示・記
録と、これら入力信号のサンプルホールド値の演算結果
の指示・記録とを順次くり返す。
Thereafter, in the same manner, the instruction and recording of 1 to N-1 input signals and the instruction and recording of the calculation results of sample and hold values of these input signals are repeated in sequence.

なお、サンプルホールド回路3の出力をA−D変換して
メモリに記憶し、マイクロコンピュータのようなもので
演算処理するようにしてもよい。
Note that the output of the sample and hold circuit 3 may be analog-to-digital converted and stored in a memory, and the arithmetic processing may be performed using a microcomputer or the like.

(5)発明の要約 以上述べたように、この発明は、複数の入力信号につい
て指示・記録するとともに、サンプルホールド回路にサ
ンプルホールドして演算処理を行い指示・記録をするよ
うにした記録計である。
(5) Summary of the Invention As stated above, the present invention provides a recorder that not only indicates and records a plurality of input signals but also performs arithmetic processing by holding samples in a sample-and-hold circuit. be.

(6)発明の効果 通常の測定値の記録の他に、平均値等の演算結果も記録
できるので1両方の記録結果を知ることができ非常に便
利なものとなる。
(6) Effects of the Invention In addition to recording normal measured values, calculation results such as average values can also be recorded, making it extremely convenient to know both recorded results.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この発明の一実施例を示す構成説明図、第2
図は動作説明用信号図である。 1・・・入力端子、2・・・プリアンプ、3・・・サン
プルホールド回路、4・・・演算回路、5・・・サーボ
ユニット、6・・・記録部、  8W1o・・・入力切
換器、 5WII・・・選択器、 5W12・・・切換
器、 SW2 、 SW3・、・スイッチ特許出願人 
株式会社 千野製作所
FIG. 1 is a configuration explanatory diagram showing one embodiment of the present invention, and FIG.
The figure is a signal diagram for explaining the operation. DESCRIPTION OF SYMBOLS 1... Input terminal, 2... Preamplifier, 3... Sample hold circuit, 4... Arithmetic circuit, 5... Servo unit, 6... Recording section, 8W1o... Input switch, 5WII...Selector, 5W12...Switcher, SW2, SW3...Switch patent applicant
Chino Seisakusho Co., Ltd.

Claims (1)

【特許請求の範囲】 16  複数の入力信号を切換選択する入力切換器と、
この入力切換器により選択された入力信号をサンプルホ
ールドするサンプルホールド回路と。 このサンプルホールド回路にホールドされた信号の演算
処理を行う演算回路と、この演算回路の出力信号または
前記入力切換器により選択された入力信号を切換える選
択スイッチと、この選択スイッチにより取り出された入
力信号または演算回路の出力信号を記録する記録部とを
備えたことを特徴とする記録計。 2 印点式記録計において、印点動作直前の導通信号に
より前記サンプルホールド回路にサンプルホールド動作
をさせるようにしたことを特徴とする特許請求の範囲第
1項記載の記録計。
[Claims] 16. An input switcher for switching and selecting a plurality of input signals;
A sample and hold circuit that samples and holds the input signal selected by this input switch. an arithmetic circuit that performs arithmetic processing on the signal held in the sample and hold circuit; a selection switch that switches between the output signal of the arithmetic circuit or the input signal selected by the input switch; and an input signal taken out by the selection switch. or a recording section for recording the output signal of the arithmetic circuit. 2. The point-and-spot recorder according to claim 1, wherein the sample-and-hold circuit is caused to perform a sample-and-hold operation by a conduction signal immediately before the point-spot operation.
JP12285082A 1982-07-16 1982-07-16 Recorder Granted JPS5913913A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12285082A JPS5913913A (en) 1982-07-16 1982-07-16 Recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12285082A JPS5913913A (en) 1982-07-16 1982-07-16 Recorder

Publications (2)

Publication Number Publication Date
JPS5913913A true JPS5913913A (en) 1984-01-24
JPS645245B2 JPS645245B2 (en) 1989-01-30

Family

ID=14846179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12285082A Granted JPS5913913A (en) 1982-07-16 1982-07-16 Recorder

Country Status (1)

Country Link
JP (1) JPS5913913A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61112912A (en) * 1984-10-09 1986-05-30 ゼネラル シグナル コ−ポレ−シヨン Height measuring system
US4914288A (en) * 1986-12-11 1990-04-03 Plessy Overseas Limited Optical sensing system with averaging circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61112912A (en) * 1984-10-09 1986-05-30 ゼネラル シグナル コ−ポレ−シヨン Height measuring system
JPH0515203B2 (en) * 1984-10-09 1993-03-01 Gen Signal Corp
US4914288A (en) * 1986-12-11 1990-04-03 Plessy Overseas Limited Optical sensing system with averaging circuit

Also Published As

Publication number Publication date
JPS645245B2 (en) 1989-01-30

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