JPS6452317U - - Google Patents

Info

Publication number
JPS6452317U
JPS6452317U JP1987146889U JP14688987U JPS6452317U JP S6452317 U JPS6452317 U JP S6452317U JP 1987146889 U JP1987146889 U JP 1987146889U JP 14688987 U JP14688987 U JP 14688987U JP S6452317 U JPS6452317 U JP S6452317U
Authority
JP
Japan
Prior art keywords
circuit
storage
addressing
channel
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987146889U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987146889U priority Critical patent/JPS6452317U/ja
Publication of JPS6452317U publication Critical patent/JPS6452317U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案の一実施例を示すもので、第1図は
液晶テレビ受像機の外観構成を示す正面図、第2
図は電子回路の全体の回路構成を示すブロツク図
、第3図は第2図におけるチユーニング制御回路
の詳細を示すブロツク図、第4図は第3図におけ
るラストチヤンネル記憶用メモリの詳細を示すブ
ロツク図、第5図は第4図における+1回路の詳
細を示す図、第6図は上記ラストチヤンネル記憶
用メモリの動作を説明するためのタイミングチヤ
ートである。 1……ケース、2……映像表示部、3……チヤ
ンネル表示部、4……LCパネル、5a,5b…
…アツプ/ダウンキー、6……モードスイツチ、
11……チユーナ、12……TVリニア回路、1
6……同期分離回路、17……チユーニング制御
回路、18……タイミング制御回路、19……A
FT制御回路、21……キー入力部、23……チ
ユーニング電圧作成回路、24……バンド切換回
路、25……A/D変換回路、28……チヤンネ
ル表示用ドライバ、31……入力制御回路、32
……チユーニングフロー制御回路、33……チヤ
ンネルカウンタ、34……チユーニング電圧記憶
用メモリ、35……ラストチヤンネル記憶回路、
36……チヤンネル表示信号作成回路、37……
同調電圧カウンタ、38……比較回路、39……
比較用カウンタ、42……バンド制御回路、43
……コンパレータ、44……コンパレータ、51
……同期検出回路、61……データ記憶用EEP
ROM、64……アドレス記憶用EEPROM、
65……+1回路。
The figures show one embodiment of the present invention, in which Fig. 1 is a front view showing the external configuration of a liquid crystal television receiver;
The figure is a block diagram showing the overall circuit configuration of the electronic circuit, Figure 3 is a block diagram showing details of the tuning control circuit in Figure 2, and Figure 4 is a block diagram showing details of the last channel storage memory in Figure 3. 5 is a diagram showing details of the +1 circuit in FIG. 4, and FIG. 6 is a timing chart for explaining the operation of the last channel storage memory. 1... Case, 2... Video display section, 3... Channel display section, 4... LC panel, 5a, 5b...
...Up/down key, 6...Mode switch,
11...Tuner, 12...TV linear circuit, 1
6...Synchronization separation circuit, 17...Tuning control circuit, 18...Timing control circuit, 19...A
FT control circuit, 21...key input unit, 23...tuning voltage generation circuit, 24...band switching circuit, 25...A/D conversion circuit, 28...channel display driver, 31...input control circuit, 32
...Tuning flow control circuit, 33... Channel counter, 34... Tuning voltage storage memory, 35... Last channel storage circuit,
36...Channel display signal creation circuit, 37...
Tuning voltage counter, 38... Comparison circuit, 39...
Comparison counter, 42...Band control circuit, 43
... Comparator, 44 ... Comparator, 51
...Synchronization detection circuit, 61...EEP for data storage
ROM, 64...EEPROM for address storage,
65...+1 circuit.

Claims (1)

【実用新案登録請求の範囲】 複数の記憶領域から成るチヤンネルデータ記憶
用の書換え可能な不揮発性メモリと、 このメモリの一部の記憶領域をアドレス指定す
る手段と、 この手段によりアドレス指定される記憶領域に
チヤンネルデータを書込む手段と、 上記アドレス指定手段により指定される記憶領
域から記憶データを読出す毎に前記アドレス指定
手段による指定アドレスを順次更新する手段と を具備したことを特徴とするチヤンネルデータ記
憶装置。
[Claims for Utility Model Registration] A rewritable non-volatile memory for storing channel data consisting of a plurality of storage areas, means for addressing a part of the storage area of this memory, and a memory addressed by this means. A channel characterized by comprising means for writing channel data into an area, and means for sequentially updating an address specified by the addressing means each time storage data is read from a storage area specified by the addressing means. Data storage device.
JP1987146889U 1987-09-26 1987-09-26 Pending JPS6452317U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987146889U JPS6452317U (en) 1987-09-26 1987-09-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987146889U JPS6452317U (en) 1987-09-26 1987-09-26

Publications (1)

Publication Number Publication Date
JPS6452317U true JPS6452317U (en) 1989-03-31

Family

ID=31416794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987146889U Pending JPS6452317U (en) 1987-09-26 1987-09-26

Country Status (1)

Country Link
JP (1) JPS6452317U (en)

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