JPS6451290A - Visual device - Google Patents

Visual device

Info

Publication number
JPS6451290A
JPS6451290A JP62208365A JP20836587A JPS6451290A JP S6451290 A JPS6451290 A JP S6451290A JP 62208365 A JP62208365 A JP 62208365A JP 20836587 A JP20836587 A JP 20836587A JP S6451290 A JPS6451290 A JP S6451290A
Authority
JP
Japan
Prior art keywords
signal
picture signal
picture
arithmetic
vertical synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62208365A
Other languages
Japanese (ja)
Inventor
Masaaki Yasumoto
Yuji Kirii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nachi Fujikoshi Corp
Original Assignee
Nachi Fujikoshi Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nachi Fujikoshi Corp filed Critical Nachi Fujikoshi Corp
Priority to JP62208365A priority Critical patent/JPS6451290A/en
Publication of JPS6451290A publication Critical patent/JPS6451290A/en
Pending legal-status Critical Current

Links

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  • Manipulator (AREA)

Abstract

PURPOSE: To provide a stable and highly reliable input picture signal by providing an arithmetic unit which finds a differential signal between a picture signal one screen before and a picture signal taken at present and converts it into an absolute value, and a picture signal normalizing device which normalizes the output signal of the arithmetic value and outputs it to an image processing device. CONSTITUTION: A visual device separates and outputs a vertical synchronous signal from a picture signal 3 outputted by a TV camera 2 by an inter-picture differential arithmetic device 5, finds a differential signal between the picture signal from which the vertical synchronous signal 9 is separated, and a picture signal one screen before which is obtained similarly, and converts the differential signal into an absolute value. The output signal 10 of the arithmetic device 5 is normalized by a picture signal normalizing device 7 and outputted to an image processing device. On the other hand, the vertical synchronous signal 9 is inputted from the arithmetic device 5 to a lighting controller 6 and the lighting level of a lighting system 4 is alternatively changed into two levels according to the vertical synchronous signal 9. The superior picture signal 12 of a fixed amplitude which exerts no affect on background light, namely, a disturbance light can be thus inputted.
JP62208365A 1987-08-24 1987-08-24 Visual device Pending JPS6451290A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62208365A JPS6451290A (en) 1987-08-24 1987-08-24 Visual device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62208365A JPS6451290A (en) 1987-08-24 1987-08-24 Visual device

Publications (1)

Publication Number Publication Date
JPS6451290A true JPS6451290A (en) 1989-02-27

Family

ID=16555086

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62208365A Pending JPS6451290A (en) 1987-08-24 1987-08-24 Visual device

Country Status (1)

Country Link
JP (1) JPS6451290A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000196924A (en) * 1998-12-24 2000-07-14 Ishikawajima Harima Heavy Ind Co Ltd Weld image pickup device using double laser illumination

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000196924A (en) * 1998-12-24 2000-07-14 Ishikawajima Harima Heavy Ind Co Ltd Weld image pickup device using double laser illumination

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