JPS6450603A - Current amplifying circuit - Google Patents

Abstract

PURPOSE:To operate the titled circuit at a high speed while suppressing the fluctuation of a voltage at an input terminal without increasing the current consumption by inserting complementary common base transistors(TRs) to an input stage, amplifying its collector current into the multiple of (n) by a current mirror, and outputting a current difference between output currents of the current mirrors thereby setting the bias current optionally. CONSTITUTION:The emitter of a transistors(TR) Q1 and the emitter of a transistors(TR) Q2 are connected to an input terminal T1. The base of the TR Q1 is biased to a bias voltage VB1 from a bias potential provision circuit 1000. The collector of the TR Q1 is connected to an input terminal of a current mirror CM1 whose output current is a multiple of (n) with respect to its input current. The base of the TR Q2 is biased to a bias voltage VB2 from the bias potential providing circuit 1000. The collector of the TR Q2 is connected to an input terminal of a current mirror CM21 whose output current is the multiple of (n) with respect to its input current. The output terminals of the current mirrors CM1, CM2 are connected to an output terminal TO, which is connected with a load RL. Thus, the potential fluctuation at the input terminal TI hardly takes place.