JPS6447087U - - Google Patents
Info
- Publication number
- JPS6447087U JPS6447087U JP14287587U JP14287587U JPS6447087U JP S6447087 U JPS6447087 U JP S6447087U JP 14287587 U JP14287587 U JP 14287587U JP 14287587 U JP14287587 U JP 14287587U JP S6447087 U JPS6447087 U JP S6447087U
- Authority
- JP
- Japan
- Prior art keywords
- check
- circuit board
- laminated
- circuit
- check pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010410 layer Substances 0.000 claims description 8
- 239000002344 surface layer Substances 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14287587U JPS6447087U (de) | 1987-09-17 | 1987-09-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14287587U JPS6447087U (de) | 1987-09-17 | 1987-09-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6447087U true JPS6447087U (de) | 1989-03-23 |
Family
ID=31409195
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14287587U Pending JPS6447087U (de) | 1987-09-17 | 1987-09-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6447087U (de) |
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1987
- 1987-09-17 JP JP14287587U patent/JPS6447087U/ja active Pending