JPS6444046A - Functional cluster chip - Google Patents

Functional cluster chip

Info

Publication number
JPS6444046A
JPS6444046A JP20124687A JP20124687A JPS6444046A JP S6444046 A JPS6444046 A JP S6444046A JP 20124687 A JP20124687 A JP 20124687A JP 20124687 A JP20124687 A JP 20124687A JP S6444046 A JPS6444046 A JP S6444046A
Authority
JP
Japan
Prior art keywords
pads
chip
substrate
wiring
periphery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20124687A
Other languages
Japanese (ja)
Inventor
Shuzo Hattori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Science and Technology Agency
Original Assignee
Research Development Corp of Japan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Research Development Corp of Japan filed Critical Research Development Corp of Japan
Priority to JP20124687A priority Critical patent/JPS6444046A/en
Publication of JPS6444046A publication Critical patent/JPS6444046A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a functional cluster chip for various utilities to be highly integrated and accelerated by mounting a functional block chip made of a plurality of functional blocks having wiring bad group on the periphery of a substrate on the substrate having connecting wirings formed for individual applications. CONSTITUTION:Functional block chips 2, such as a microprocessor, a memory, an I/O controller, etc., are mounted on a mounting substrate 1. The substrate 1 preferably employs a silicon wafer, and a connecting wiring pattern is formed in advance on the substrate 1. Wiring pads (inner pads) 4 are formed on the periphery of the chip 2, and wiring pads (outer pads) 5 for connecting to an exterior are formed on the periphery of the chip 3. A wiring pattern forming region 6 for individual applications of LSIs is provided between the pads 4 and the pads 5. Thus, a multifunctional chip in which a wiring pattern is miniaturized, highly integrated, reduced in size and accelerated is obtained.
JP20124687A 1987-08-12 1987-08-12 Functional cluster chip Pending JPS6444046A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20124687A JPS6444046A (en) 1987-08-12 1987-08-12 Functional cluster chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20124687A JPS6444046A (en) 1987-08-12 1987-08-12 Functional cluster chip

Publications (1)

Publication Number Publication Date
JPS6444046A true JPS6444046A (en) 1989-02-16

Family

ID=16437759

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20124687A Pending JPS6444046A (en) 1987-08-12 1987-08-12 Functional cluster chip

Country Status (1)

Country Link
JP (1) JPS6444046A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6098695A (en) * 1983-11-02 1985-06-01 日立マイクロコンピユータエンジニアリング株式会社 Circuit board
JPS60196957A (en) * 1984-03-19 1985-10-05 Nec Corp Integrated circuit
JPS6295848A (en) * 1985-10-23 1987-05-02 Hitachi Ltd Semiconductor integrated circuit device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6098695A (en) * 1983-11-02 1985-06-01 日立マイクロコンピユータエンジニアリング株式会社 Circuit board
JPS60196957A (en) * 1984-03-19 1985-10-05 Nec Corp Integrated circuit
JPS6295848A (en) * 1985-10-23 1987-05-02 Hitachi Ltd Semiconductor integrated circuit device

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