JPS6443435U - - Google Patents
Info
- Publication number
- JPS6443435U JPS6443435U JP13833287U JP13833287U JPS6443435U JP S6443435 U JPS6443435 U JP S6443435U JP 13833287 U JP13833287 U JP 13833287U JP 13833287 U JP13833287 U JP 13833287U JP S6443435 U JPS6443435 U JP S6443435U
- Authority
- JP
- Japan
- Prior art keywords
- reset period
- write pulse
- binary counter
- chip microcomputer
- writing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Microcomputers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13833287U JPS6443435U (enExample) | 1987-09-09 | 1987-09-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13833287U JPS6443435U (enExample) | 1987-09-09 | 1987-09-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6443435U true JPS6443435U (enExample) | 1989-03-15 |
Family
ID=31400568
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13833287U Pending JPS6443435U (enExample) | 1987-09-09 | 1987-09-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6443435U (enExample) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60245013A (ja) * | 1984-05-18 | 1985-12-04 | Nec Corp | メモリ初期化回路 |
-
1987
- 1987-09-09 JP JP13833287U patent/JPS6443435U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60245013A (ja) * | 1984-05-18 | 1985-12-04 | Nec Corp | メモリ初期化回路 |