JPS6442002A - Recording/erasing signal output circuit - Google Patents
Recording/erasing signal output circuitInfo
- Publication number
- JPS6442002A JPS6442002A JP62199324A JP19932487A JPS6442002A JP S6442002 A JPS6442002 A JP S6442002A JP 62199324 A JP62199324 A JP 62199324A JP 19932487 A JP19932487 A JP 19932487A JP S6442002 A JPS6442002 A JP S6442002A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- gate
- recording
- supplied
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Digital Magnetic Recording (AREA)
Abstract
PURPOSE:To eliminate distortion in a signal at its starting part and ending part, and to normally record by providing a voltage generating circuit that supplies the average voltage of a recording/erasing signal at the output terminal of a tri-stage gate. CONSTITUTION:A digital recording signal or an AC erasing signal is supplied to an input terminal 2, and a gate signal is supplied to a gate signal input terminal 3. When a gate signal is in a high level, the output impedance of the tri-state gage 1 goes to low, and a digital recording signal or an erasing signal supplied to the input terminal 2 is directly outputted to an output terminal 4 without any change. But when a gate signal is in a low level, the output impedance of the gate 1 goes to high, hence no output signal is obtained, instead, and output signal appears at the mid-point at the connection between the resistors 5 and 6 of the voltage generating circuit 7, thus the average voltage E0 of the output signal is obtained from the output terminal 4. As a result, the starting part and the ending part of a current that flows through a magnetic head is not distorted, so that a recording is attained with a normal starting part.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62199324A JPS6442002A (en) | 1987-08-10 | 1987-08-10 | Recording/erasing signal output circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62199324A JPS6442002A (en) | 1987-08-10 | 1987-08-10 | Recording/erasing signal output circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6442002A true JPS6442002A (en) | 1989-02-14 |
Family
ID=16405902
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62199324A Pending JPS6442002A (en) | 1987-08-10 | 1987-08-10 | Recording/erasing signal output circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6442002A (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60259955A (en) * | 1984-06-06 | 1985-12-23 | Chishitsu Keisoku Kk | Electromagnetic hammer |
JPS61169761A (en) * | 1985-01-22 | 1986-07-31 | Taisei Corp | Gap inspection device |
JPS61292554A (en) * | 1985-06-20 | 1986-12-23 | Taisei Corp | Diagnosis for scaling of finished surface of building |
JPS6267448A (en) * | 1985-09-20 | 1987-03-27 | Kajima Corp | Hitting apparatus for separation detector of wall surface tile or the like |
-
1987
- 1987-08-10 JP JP62199324A patent/JPS6442002A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60259955A (en) * | 1984-06-06 | 1985-12-23 | Chishitsu Keisoku Kk | Electromagnetic hammer |
JPS61169761A (en) * | 1985-01-22 | 1986-07-31 | Taisei Corp | Gap inspection device |
JPS61292554A (en) * | 1985-06-20 | 1986-12-23 | Taisei Corp | Diagnosis for scaling of finished surface of building |
JPS6267448A (en) * | 1985-09-20 | 1987-03-27 | Kajima Corp | Hitting apparatus for separation detector of wall surface tile or the like |
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