JPS6440064U - - Google Patents

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Publication number
JPS6440064U
JPS6440064U JP13655487U JP13655487U JPS6440064U JP S6440064 U JPS6440064 U JP S6440064U JP 13655487 U JP13655487 U JP 13655487U JP 13655487 U JP13655487 U JP 13655487U JP S6440064 U JPS6440064 U JP S6440064U
Authority
JP
Japan
Prior art keywords
signal
switching
processing device
utility
signal output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13655487U
Other languages
Japanese (ja)
Other versions
JPH0530137Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13655487U priority Critical patent/JPH0530137Y2/ja
Publication of JPS6440064U publication Critical patent/JPS6440064U/ja
Application granted granted Critical
Publication of JPH0530137Y2 publication Critical patent/JPH0530137Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

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  • Arrangements For Transmission Of Measured Signals (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を概略的に示すブ
ロツク線図、第2図はコネクタ部を示す図、第3
図はフローチヤートである。 図面において、1はプリンタ、2,3は計測器
、4はめすコネクタ、5はCPU、6は出力装置
、7,8はおすコネクタ、11はタイミング信号
端子、12はデジタル信号端子、13はアースラ
イン端子、14は切換端子、15はリレー、16
は切換接点、17,18は固定接点である。
Fig. 1 is a block diagram schematically showing an embodiment of this invention, Fig. 2 is a diagram showing the connector section, and Fig. 3 is a diagram schematically showing an embodiment of this invention.
The figure is a flowchart. In the drawing, 1 is a printer, 2 and 3 are measuring instruments, 4 is a female connector, 5 is a CPU, 6 is an output device, 7 and 8 are male connectors, 11 is a timing signal terminal, 12 is a digital signal terminal, and 13 is ground Line terminal, 14 is switching terminal, 15 is relay, 16
1 is a switching contact, and 17 and 18 are fixed contacts.

Claims (1)

【実用新案登録請求の範囲】 (1) それぞれが共通のタイミング信号と種々の
データ信号を出力するとともに少なくとも1つの
出力が異なる出力端子を備えた信号出力装置と、
この信号出力装置に複数の接続端子を備えた接続
手段により接続され前記信号出力装置からの前記
データ信号に従つて所定の形に処理する処理装置
において、前記処理装置には前記接続手段の前記
接続端子の内、前記信号出力装置の種類により異
なる端子と接続される端子に前記処理装置の必要
となる信号線を選択的に切換える切換手段と、前
記信号出力装置をコネクタに接続し所定時間前記
タイミング信号を読み取れない時、前記切換手段
を他方に切換える制御手段とを有することを特徴
とする機種自動選択切換装置。 (2) 実用新案登録請求の範囲第1項において、
前記切換手段はリレーで構成され、前記制御手段
は前記タイミング信号を読み取れない時、前記リ
レーを動作させて前記信号入力線と前記信号線以
外の線のいずれか一方に切換えることを特徴とす
る機種自動選択切換装置。 (3) 実用新案登録請求の範囲第1項において、
前記制御手段は前記処理装置の中央処理装置と兼
用になつていることを特徴とする機種自動選択切
換装置。
[Claims for Utility Model Registration] (1) A signal output device, each of which outputs a common timing signal and various data signals, and includes output terminals with at least one different output;
In a processing device that is connected to the signal output device by a connection means having a plurality of connection terminals and processes the data signal from the signal output device in a predetermined form, the processing device is connected to the connection means of the connection means. switching means for selectively switching a signal line necessary for the processing device to a terminal that is connected to a different terminal depending on the type of the signal output device; An automatic model selection and switching device characterized by comprising: control means for switching the switching means to the other when a signal cannot be read. (2) In paragraph 1 of the claims for utility model registration,
The switching means is comprised of a relay, and the control means operates the relay to switch to either the signal input line or a line other than the signal line when the timing signal cannot be read. Automatic selection switching device. (3) In paragraph 1 of the claims for utility model registration,
An automatic model selection and switching device characterized in that the control means also serves as a central processing unit of the processing device.
JP13655487U 1987-09-07 1987-09-07 Expired - Lifetime JPH0530137Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13655487U JPH0530137Y2 (en) 1987-09-07 1987-09-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13655487U JPH0530137Y2 (en) 1987-09-07 1987-09-07

Publications (2)

Publication Number Publication Date
JPS6440064U true JPS6440064U (en) 1989-03-09
JPH0530137Y2 JPH0530137Y2 (en) 1993-08-02

Family

ID=31397172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13655487U Expired - Lifetime JPH0530137Y2 (en) 1987-09-07 1987-09-07

Country Status (1)

Country Link
JP (1) JPH0530137Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03200346A (en) * 1989-12-27 1991-09-02 Sharp Corp Semiconductor device analyzer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03200346A (en) * 1989-12-27 1991-09-02 Sharp Corp Semiconductor device analyzer

Also Published As

Publication number Publication date
JPH0530137Y2 (en) 1993-08-02

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