JPH0159331U - - Google Patents
Info
- Publication number
- JPH0159331U JPH0159331U JP15570687U JP15570687U JPH0159331U JP H0159331 U JPH0159331 U JP H0159331U JP 15570687 U JP15570687 U JP 15570687U JP 15570687 U JP15570687 U JP 15570687U JP H0159331 U JPH0159331 U JP H0159331U
- Authority
- JP
- Japan
- Prior art keywords
- data
- connection
- connection terminals
- memory
- external device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Electronic Switches (AREA)
Description
第１図はこの考案の一実施例のブロツク回路図
、第２図はメモリへの接続データ書き込み動作の
フロー図、第３図はメモリに書き込まれた接続デ
ータの一例を示す図表、第４図は接続動作のフロ
ー図である。
１……コネクタ、〜○Ｎ……接続端子、２…
…信号処理回路、３……マイクロコンピユータ、
４……動作モード切換スイツチ、５……データ番
号入力キー、６……接続端子選択キー、７……「
ＯＮ」指定スイツチ、８……「ＯＦＦ」指定スイ
ツチ、１０……メモリ、ＳＷ１〜ＳＷＮ……ＯＮ
・ＯＦＦスイツチ。
Fig. 1 is a block circuit diagram of an embodiment of this invention, Fig. 2 is a flow diagram of the operation of writing connection data to memory, Fig. 3 is a chart showing an example of connection data written to memory, and Fig. 4 is a flow diagram of connection operation. 1... Connector, ~○N... Connection terminal, 2...
...Signal processing circuit, 3...Microcomputer,
4...Operation mode selection switch, 5...Data number input key, 6...Connection terminal selection key, 7...
"ON" designation switch, 8..."OFF" designation switch, 10...Memory, SW1 to SWN...ON
・OFF switch.
Claims (1)
れ挿入されている複数のＯＮ・ＯＦＦスイツチと
、複数の上記接続端子に接続される外部機器の種
類に応じて複数の上記ＯＮ・ＯＦＦスイツチの接
続データをメモリに書き込む手段と、複数の上記
接続端子に接続された外部機器の種類が指示され
たとき上記メモリから当該外部機器の種類に対応
する接続データを読み出して複数の上記ＯＮ・Ｏ
ＦＦスイツチをその接続データにもとづいてＯＮ
またはＯＦＦに設定する手段とを備えてなる信号
入出力装置。 A plurality of ON/OFF switches each inserted between a plurality of connection terminals and a signal processing circuit, and a plurality of ON/OFF switches according to the types of external devices connected to the plurality of connection terminals. A means for writing data into a memory, and when a type of external device connected to the plurality of connection terminals is specified, reading connection data corresponding to the type of the external device from the memory and transmitting the data to the plurality of ON/Os.
Turn on the FF switch based on the connection data
or a means for setting it to OFF.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15570687U JPH0159331U (en) | 1987-10-12 | 1987-10-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15570687U JPH0159331U (en) | 1987-10-12 | 1987-10-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0159331U true JPH0159331U (en) | 1989-04-13 |
Family
ID=31433575
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15570687U Pending JPH0159331U (en) | 1987-10-12 | 1987-10-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0159331U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60160425A (en) * | 1984-02-01 | 1985-08-22 | Hitachi Ltd | Connecting circuit |
-
1987
- 1987-10-12 JP JP15570687U patent/JPH0159331U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60160425A (en) * | 1984-02-01 | 1985-08-22 | Hitachi Ltd | Connecting circuit |
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