JPS6439876A - Synchronizing signal generating circuit - Google Patents

Synchronizing signal generating circuit

Info

Publication number
JPS6439876A
JPS6439876A JP19675287A JP19675287A JPS6439876A JP S6439876 A JPS6439876 A JP S6439876A JP 19675287 A JP19675287 A JP 19675287A JP 19675287 A JP19675287 A JP 19675287A JP S6439876 A JPS6439876 A JP S6439876A
Authority
JP
Japan
Prior art keywords
horizontal
frequency dividing
vertical
signal
noise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19675287A
Other languages
Japanese (ja)
Other versions
JP2856394B2 (en
Inventor
Akira Togashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62196752A priority Critical patent/JP2856394B2/en
Publication of JPS6439876A publication Critical patent/JPS6439876A/en
Application granted granted Critical
Publication of JP2856394B2 publication Critical patent/JP2856394B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To obtain horizontal and vertical pulses, which are necessary to the driving of a CCD without receiving the influence of frequency dividing noise by using a frequency dividing circuit to operate only during horizontal and vertical blanking periods. CONSTITUTION:A signal is supplied from an oscillator 1, which generates the frequency signal of the integer-fold of a horizontal synchronizing frequency, to integrated circuits (IC) 1 and 2. The IC1 outputs the synchronizing signals of various types and the synchronizing signals HD and VD of horizontal and vertical scannings with using a horizontal frequency dividing counter 2, a vertical frequency dividing counter 3 and a decoder 4. Though it is highly possible that the frequency dividing noise, which is generated by the horizontal frequency dividing counter 2 of this IC, is mixed, however, the noise can be removed by the simple low-pass filter of a C-R. The IC2 is operated with receiving the signals HD and VD from the IC1. Namely, since the horizontal frequency dividing counter 8 and the decoder 9 are reset by the input rising of the HD signal and the horizontal frequency dividing counter 8 starts operating, a CCD vertical driving pulse and a horizontal blanking signal can be made by decoding this operation.
JP62196752A 1987-08-05 1987-08-05 Synchronous signal generation circuit Expired - Fee Related JP2856394B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62196752A JP2856394B2 (en) 1987-08-05 1987-08-05 Synchronous signal generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62196752A JP2856394B2 (en) 1987-08-05 1987-08-05 Synchronous signal generation circuit

Publications (2)

Publication Number Publication Date
JPS6439876A true JPS6439876A (en) 1989-02-10
JP2856394B2 JP2856394B2 (en) 1999-02-10

Family

ID=16363024

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62196752A Expired - Fee Related JP2856394B2 (en) 1987-08-05 1987-08-05 Synchronous signal generation circuit

Country Status (1)

Country Link
JP (1) JP2856394B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57184373A (en) * 1982-04-21 1982-11-13 Hitachi Ltd Pulse generating circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57184373A (en) * 1982-04-21 1982-11-13 Hitachi Ltd Pulse generating circuit

Also Published As

Publication number Publication date
JP2856394B2 (en) 1999-02-10

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees