JPS6437646A - Communication processor - Google Patents
Communication processorInfo
- Publication number
- JPS6437646A JPS6437646A JP19478387A JP19478387A JPS6437646A JP S6437646 A JPS6437646 A JP S6437646A JP 19478387 A JP19478387 A JP 19478387A JP 19478387 A JP19478387 A JP 19478387A JP S6437646 A JPS6437646 A JP S6437646A
- Authority
- JP
- Japan
- Prior art keywords
- data
- interruption
- processing request
- parallel
- allowed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To attain efficient data transfer by providing the titled processor with plural processing request control means. CONSTITUTION:A serial/parallel (S/P) data conversion means 31-1 receives serial data on a line, converts the serial data into parallel data, and when the means 31-1 can be allowed to inform the parallel data to a processor means 10 or can be allowed to prepare the reception of transmission data from the means 10, commands an identification (ID) number sending means 30-1 to send the ID number. A processing request managing means concerned out of plural means 20-1-20-M stores a processing request sent from the means 30-1 and generates an interruption to the means 10. Respective means 20-1-20-M store ID numbers sent from respective ID number sending means 30-1-30-N by a first-in first-out method and extract these numbers. At the time of receiving said interruption, the means 10 sends an interruption receiving signal to the means 20-1-20-M.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19478387A JPS6437646A (en) | 1987-08-04 | 1987-08-04 | Communication processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19478387A JPS6437646A (en) | 1987-08-04 | 1987-08-04 | Communication processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6437646A true JPS6437646A (en) | 1989-02-08 |
Family
ID=16330183
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19478387A Pending JPS6437646A (en) | 1987-08-04 | 1987-08-04 | Communication processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6437646A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5349544A (en) * | 1988-06-15 | 1994-09-20 | Advanced Micro Devices, Inc. | Programmable system synchronizer |
US6130552A (en) * | 1995-10-16 | 2000-10-10 | Altera Corporation | Programmable logic integrated circuit with on-chip DLL or PLL for clock distribution |
-
1987
- 1987-08-04 JP JP19478387A patent/JPS6437646A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5349544A (en) * | 1988-06-15 | 1994-09-20 | Advanced Micro Devices, Inc. | Programmable system synchronizer |
US6130552A (en) * | 1995-10-16 | 2000-10-10 | Altera Corporation | Programmable logic integrated circuit with on-chip DLL or PLL for clock distribution |
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