JPS6437179A - Digital video camera - Google Patents

Digital video camera

Info

Publication number
JPS6437179A
JPS6437179A JP62193011A JP19301187A JPS6437179A JP S6437179 A JPS6437179 A JP S6437179A JP 62193011 A JP62193011 A JP 62193011A JP 19301187 A JP19301187 A JP 19301187A JP S6437179 A JPS6437179 A JP S6437179A
Authority
JP
Japan
Prior art keywords
signal
optical black
adder
converter
black level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62193011A
Other languages
Japanese (ja)
Inventor
Shoichi Yasuda
Shinichi Yoshikawa
Tsuneo Nakajima
Akira Yada
Kazuhiro Kishimoto
Hidetsugu Koyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP62193011A priority Critical patent/JPS6437179A/en
Publication of JPS6437179A publication Critical patent/JPS6437179A/en
Pending legal-status Critical Current

Links

Landscapes

  • Picture Signal Circuits (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To prevent the degradation of the quality of a video signal because of the fluctuation in optical black level by detecting the optical black level, holding the detected value during one horizontal cycle, then adding/subtracting to/from a subsequent signal level. CONSTITUTION:A signal from a CCD 1 is inputted to an adder 10 and an optical black detection/memory part 13 through an analog processing circuit 8 and an A/D converter 9. The part 13 detects an optical black level and holds it during one horizontal cycle. Thus held value is inputted to the adder 10 and added/subtracted to/from an output from the A/D converter 10. The output from the adder 10 is subjected to such as gamma, clipping, and synchronizing- signal-adding processings in a ROM part 11, and outputted via an A/D converter 12 as an NTSC signal.
JP62193011A 1987-08-01 1987-08-01 Digital video camera Pending JPS6437179A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62193011A JPS6437179A (en) 1987-08-01 1987-08-01 Digital video camera

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62193011A JPS6437179A (en) 1987-08-01 1987-08-01 Digital video camera

Publications (1)

Publication Number Publication Date
JPS6437179A true JPS6437179A (en) 1989-02-07

Family

ID=16300710

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62193011A Pending JPS6437179A (en) 1987-08-01 1987-08-01 Digital video camera

Country Status (1)

Country Link
JP (1) JPS6437179A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008109264A (en) * 2006-10-24 2008-05-08 Sony Corp Solid state imaging device and imaging apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008109264A (en) * 2006-10-24 2008-05-08 Sony Corp Solid state imaging device and imaging apparatus
US8269863B2 (en) 2006-10-24 2012-09-18 Sony Corporation Solid-state image pickup device and image pickup apparatus

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