JPS6437172A - Digital signal processing circuit - Google Patents

Digital signal processing circuit

Info

Publication number
JPS6437172A
JPS6437172A JP62193006A JP19300687A JPS6437172A JP S6437172 A JPS6437172 A JP S6437172A JP 62193006 A JP62193006 A JP 62193006A JP 19300687 A JP19300687 A JP 19300687A JP S6437172 A JPS6437172 A JP S6437172A
Authority
JP
Japan
Prior art keywords
digital signal
sigmacn
filter
signal processing
processing circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62193006A
Other languages
Japanese (ja)
Inventor
Shinichi Yoshikawa
Shoichi Yasuda
Tsuneo Nakajima
Akira Yada
Kazuhiro Kishimoto
Hidetsugu Koyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP62193006A priority Critical patent/JPS6437172A/en
Publication of JPS6437172A publication Critical patent/JPS6437172A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the degrading of bit-use factor by connecting a table conversion circuit for digital level correction with the output stage of a digital filter. CONSTITUTION:An input signal is filtered by an FIR filter 1 and supplied to the address of a ROM 2 for level conversion. Assuming that the SIGMACn of the FIR filter 1 is 140, a multiplication processing of (address)X256/140 is executed by means of a table conversion. Accordingly, in the output of the ROM 2, an output equal to an input to the filter can be obtained. Thus, even in case the SIGMACn of the FIR filter is not 2<m>, a digital signal in the same level as that in case the SIGMACn is 2<m> can finally be obtained.
JP62193006A 1987-08-01 1987-08-01 Digital signal processing circuit Pending JPS6437172A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62193006A JPS6437172A (en) 1987-08-01 1987-08-01 Digital signal processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62193006A JPS6437172A (en) 1987-08-01 1987-08-01 Digital signal processing circuit

Publications (1)

Publication Number Publication Date
JPS6437172A true JPS6437172A (en) 1989-02-07

Family

ID=16300634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62193006A Pending JPS6437172A (en) 1987-08-01 1987-08-01 Digital signal processing circuit

Country Status (1)

Country Link
JP (1) JPS6437172A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6190575A (en) * 1984-10-09 1986-05-08 Matsushita Electric Ind Co Ltd Video signal processor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6190575A (en) * 1984-10-09 1986-05-08 Matsushita Electric Ind Co Ltd Video signal processor

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