JPS6434019A - D/a conversion circuit - Google Patents

D/a conversion circuit

Info

Publication number
JPS6434019A
JPS6434019A JP19079487A JP19079487A JPS6434019A JP S6434019 A JPS6434019 A JP S6434019A JP 19079487 A JP19079487 A JP 19079487A JP 19079487 A JP19079487 A JP 19079487A JP S6434019 A JPS6434019 A JP S6434019A
Authority
JP
Japan
Prior art keywords
vrs
operational amplifier
capacitors
constant voltage
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19079487A
Other languages
Japanese (ja)
Inventor
Mitsuru Nagata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP19079487A priority Critical patent/JPS6434019A/en
Publication of JPS6434019A publication Critical patent/JPS6434019A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To attach a constant level of DC offset on the output of an operational amplifier, by connecting a second constant voltage to all of the plural capacitors connected to the inversion input of the operational amplifier at the time of resetting. CONSTITUTION:The second constant voltage VRS is connected to all of the (2<n>) capacitors C2 via switches S3-1 and S3-2 in a reset mode, and electric charge of 2<n>.C2.VRS is charged on the 2<n> capacitors. In the following charge mode, firstly, a switch S1 is opened, and the switches S3-1 and S3-2 are connected to a charge side C. In such a way, it is possible to attach the DC offset VDRS =(C2/C1).2<n>.VRS independent from a first constant voltage Vi on an output voltage V0 outputted to the output terminal VOUT of the operational amplifier OP.
JP19079487A 1987-07-30 1987-07-30 D/a conversion circuit Pending JPS6434019A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19079487A JPS6434019A (en) 1987-07-30 1987-07-30 D/a conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19079487A JPS6434019A (en) 1987-07-30 1987-07-30 D/a conversion circuit

Publications (1)

Publication Number Publication Date
JPS6434019A true JPS6434019A (en) 1989-02-03

Family

ID=16263850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19079487A Pending JPS6434019A (en) 1987-07-30 1987-07-30 D/a conversion circuit

Country Status (1)

Country Link
JP (1) JPS6434019A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6323848B1 (en) 1997-09-11 2001-11-27 Nec Corporation Liquid crystal display driving semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6323848B1 (en) 1997-09-11 2001-11-27 Nec Corporation Liquid crystal display driving semiconductor device

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