JPS6434018A - Clamping device for analog/digital converter - Google Patents

Clamping device for analog/digital converter

Info

Publication number
JPS6434018A
JPS6434018A JP19077387A JP19077387A JPS6434018A JP S6434018 A JPS6434018 A JP S6434018A JP 19077387 A JP19077387 A JP 19077387A JP 19077387 A JP19077387 A JP 19077387A JP S6434018 A JPS6434018 A JP S6434018A
Authority
JP
Japan
Prior art keywords
analog input
input signal
comparators
sides
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19077387A
Other languages
Japanese (ja)
Inventor
Mitsuo Soneda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP19077387A priority Critical patent/JPS6434018A/en
Publication of JPS6434018A publication Critical patent/JPS6434018A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To prevent an analog input signal from being decreased, by setting the reference voltage of a comparator by the clamping voltage of the analog input signal at the time of turning ON a switch. CONSTITUTION:Plural comparators 121-12n-1 are provided with respect to the number of bits of a digital output signal. And the analog input signal from an input terminal 11 is supplied directly to the input sides on one sides of those comparators 121-12n-1, and also, the reference voltage obtained by plural division resistors 131-13n-1 connected in series is supplied to the input sides on the other sides of the comparators 121-12n-1. Also, a switch 6 ON/OFF- controlled with respect to the period of the analog input signal and a voltage buffer 15 are connected between the prescribed terminals of the division resistors 131-13n-1 and an analog input terminal, and a capacitor 17 is connected between the connection point of them and the ground. And the analog input signal at the time of turning ON the switch 16 is charged to the capacitor 17, and the clamping voltage is set as the reference voltage of the comparators 121-12n-1, In such a way, it is possible to prevent the analog input signal from being decreased.
JP19077387A 1987-07-30 1987-07-30 Clamping device for analog/digital converter Pending JPS6434018A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19077387A JPS6434018A (en) 1987-07-30 1987-07-30 Clamping device for analog/digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19077387A JPS6434018A (en) 1987-07-30 1987-07-30 Clamping device for analog/digital converter

Publications (1)

Publication Number Publication Date
JPS6434018A true JPS6434018A (en) 1989-02-03

Family

ID=16263486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19077387A Pending JPS6434018A (en) 1987-07-30 1987-07-30 Clamping device for analog/digital converter

Country Status (1)

Country Link
JP (1) JPS6434018A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08125538A (en) * 1994-10-24 1996-05-17 Nec Corp Digital/analog converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08125538A (en) * 1994-10-24 1996-05-17 Nec Corp Digital/analog converter

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