JPS6433958A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To perform stable measurement, by providing a means for controlling and adjusting the timing of the transition of the level states of logic signals, which are outputted through output buffer circuits in response to the change in logic signal inputs in correspondence with functional tests, dispersing the charging and discharging currents of an external load container in time, and decreasing power source noises. CONSTITUTION:A plurality of output buffer circuits 2-1-2-8 are provided in a semiconductor integrated circuit 4. Logic signals are outputted through the output buffer circuits 2-1-2-8 in response to the change in logic signal inputs into the semiconductor integrated circuit 4 in correspondence with the functional tests of the semiconductor integrated circuit 4. A means for controlling and adjusting the timing of the transition of the level states of the logic signals is provided in the semiconductor integrated circuit 4. For example, a test control signal 101 is introduced from the outside at the functional tests of the semiconductor integrated circuit 4. The logic signals are inputted into the output buffers 2-5-2-8 from an internal logic circuit 3. The timing of the transition of the logic level states of the logic signals is controlled and adjusted in correspondence with the low level state of the test control signal 101 through AND circuit functions included in the output buffers 2-5-2-8. Thus the logic signals are outputted.