JPS6433796A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS6433796A JPS6433796A JP18969087A JP18969087A JPS6433796A JP S6433796 A JPS6433796 A JP S6433796A JP 18969087 A JP18969087 A JP 18969087A JP 18969087 A JP18969087 A JP 18969087A JP S6433796 A JPS6433796 A JP S6433796A
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- memory cell
- array
- cell array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Read Only Memory (AREA)
Abstract
PURPOSE:To execute the speedy and stable reading of a memory cell by setting the width of the output change of a memory cell array to a small one, and amplifying and outputting the difference between the output, which reverses and amplifies the signal of the memory cell array, and the memory cell array. CONSTITUTION:A memory cell array 1 possesses plural memory cells connected to plural row lines and to plural column lines. In a semiconductor memory device, which is equipped with a sense amplifier circuit 2 to increase the output of the memory cell array 1 by obtaining a power from an external power source, the circuit 2 includes an inverter circuit 3, first and second control circuits 4 and 5, an inverse amplifier 6 and a differential amplifier 7. Here, based on the output of the circuit 3, the circuit 4 feeds back and controls the output of the array 1, and the circuit 5 controls the output of the array 1 based on the output of the circuit 3 and the potential of the external power source. The circuit 6 reverses and amplifies the output of the array 1, amplifies 7 the difference between the output of the circuit 6 and the output of the array 1, and outputs it.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18969087A JPS6433796A (en) | 1987-07-29 | 1987-07-29 | Semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18969087A JPS6433796A (en) | 1987-07-29 | 1987-07-29 | Semiconductor memory device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6433796A true JPS6433796A (en) | 1989-02-03 |
Family
ID=16245553
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18969087A Pending JPS6433796A (en) | 1987-07-29 | 1987-07-29 | Semiconductor memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6433796A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6968609B2 (en) | 2001-03-01 | 2005-11-29 | Murata Manufacturing Co., Ltd. | Nonreciprocal circuit device, communication device, and method of manufacturing nonreciprocal circuit device |
-
1987
- 1987-07-29 JP JP18969087A patent/JPS6433796A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6968609B2 (en) | 2001-03-01 | 2005-11-29 | Murata Manufacturing Co., Ltd. | Nonreciprocal circuit device, communication device, and method of manufacturing nonreciprocal circuit device |
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