JPS643222U - - Google Patents
Info
- Publication number
- JPS643222U JPS643222U JP9351787U JP9351787U JPS643222U JP S643222 U JPS643222 U JP S643222U JP 9351787 U JP9351787 U JP 9351787U JP 9351787 U JP9351787 U JP 9351787U JP S643222 U JPS643222 U JP S643222U
- Authority
- JP
- Japan
- Prior art keywords
- registers
- resistors
- reference voltage
- comparison circuit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Description
第1図は、本考案の一実施例を示す回路図、第
2図及び第3図は従来のA/D変換回路を示す回
路図、第4図イ及びロは第1図A/D変換回路か
ら得られる出力デジタル信号を示す図である。
14a〜14p……抵抗、16a〜16c……
比較回路、18,19a〜19d……スイツチ群
、20……エンコーダ、21,22……レジスタ
、23……選択回路。
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Figs. 2 and 3 are circuit diagrams showing conventional A/D conversion circuits, and Fig. 4 A and B are Fig. 1 A/D conversion circuits. FIG. 2 is a diagram showing an output digital signal obtained from the circuit. 14a to 14p...Resistance, 16a to 16c...
Comparison circuit, 18, 19a to 19d... switch group, 20... encoder, 21, 22... register, 23... selection circuit.
Claims (1)
の抵抗と、アナログ入力信号と基準電圧とを比較
する複数の比較回路と、前記複数の抵抗の接続点
に得られる電圧を第1基準電圧としてそれぞれ比
較回路に印加する上位ビツト用の第1スイツチ群
と、前記複数の抵抗の別の接続点に得られる電圧
を第2基準電圧としてそれぞれ比較回路に印加す
る下位ビツト用の第2乃至第Nスイツチ群と、前
記比較回路の出力信号をエンコードするエンコー
ダと、該エンコーダの出力信号を格納する第1及
び第2レジスタと、該第1及び第2レジスタの出
力信号に応じて前記第1乃至第Nスイツチ群の一
つを選択駆動する選択回路とから成り、前記第1
レジスタの出力端に上位ビツトのデジタル信号を
、前記第2レジスタの出力端に下位ビツトのデジ
タル信号を発生する様にしたことを特徴とするA
/D変換回路。 A plurality of resistors connected in series between a reference power source and ground, a plurality of comparison circuits that compare the analog input signal and the reference voltage, and a voltage obtained at a connection point of the plurality of resistors as a first reference voltage. A first switch group for the upper bits is applied to the comparison circuit, and a second to Nth switch group for the lower bits is applied to the comparison circuit with the voltage obtained at another connection point of the plurality of resistors as a second reference voltage. a group of switches, an encoder that encodes the output signal of the comparison circuit, first and second registers that store the output signals of the encoder, and the first to second registers according to the output signals of the first and second registers. a selection circuit for selectively driving one of the N switch groups;
A characterized in that an upper bit digital signal is generated at the output terminal of the register, and a lower bit digital signal is generated at the output terminal of the second register.
/D conversion circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9351787U JPS643222U (en) | 1987-06-18 | 1987-06-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9351787U JPS643222U (en) | 1987-06-18 | 1987-06-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS643222U true JPS643222U (en) | 1989-01-10 |
Family
ID=31317979
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9351787U Pending JPS643222U (en) | 1987-06-18 | 1987-06-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS643222U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60214120A (en) * | 1984-04-09 | 1985-10-26 | Nec Corp | Analog-digital converting circuit |
-
1987
- 1987-06-18 JP JP9351787U patent/JPS643222U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60214120A (en) * | 1984-04-09 | 1985-10-26 | Nec Corp | Analog-digital converting circuit |
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