JPS643086B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an ultrasonic delay circuit,
In particular, it is an object of the present invention to provide an ultrasonic delay circuit that can eliminate unnecessary reflected signals generated when ultrasonic waves propagate through a delay medium, or that can be made small relative to delayed signals.

Generally, an ultrasonic delay line is composed of a delay medium for propagating ultrasonic waves and an input/output conversion element mounted on an appropriately selected surface of the delay medium. The simplest shape of such an ultrasonic delay line is a rod-like one, which is simply a delay medium with input/output conversion elements attached to both ends. There are even multiple-reflection types that utilize the large number of reflected waves caused by this.

FIG. 1 shows one of the multiple reflection type ultrasonic delay lines.
and 2a', 2'b are attached to converter elements 3 and 3' having an electro-mechanical energy conversion function. Now, when an electric signal Ei is applied between the electrodes 2a and 2b of the conversion element 3, the conversion element 3 mechanically vibrates according to the frequency of the signal, and ultrasonic waves are emitted into the delay medium 1. This ultrasonic wave is reflected many times within the delay medium 1 as shown in the path shown in FIG.
The other end reaches the conversion element 3', which mechanically vibrates and generates an electric signal Eo between the electrodes 2'a and 2'b according to the frequency.
In this way, it is possible to obtain a delayed signal delayed by 1/v, where l is the length of the normal propagation path 5 of the ultrasonic delay line and v is the sound speed of the delay medium 1.

However, in such an ultrasonic delay line, a delayed signal other than a predetermined delay time, that is, unnecessary reflection occurs.

This unnecessary reflection is caused by the normal propagation path L ₁ as shown in the developed diagram of the ultrasonic propagation path in Figure 2.
Apart from the normal delay time, 2τ unnecessary reflection propagating along path L ₂ , time 1/3τ, which is twice as long as τ.
Once upon a time, there was a 1/3τ unnecessary reflection that propagated along path _L3 . In addition to the above-mentioned unnecessary reflections, there are also those caused by multiple reciprocations within the normal propagation path (not shown) and leakage signals on lead wires and printed circuit boards.

Conventionally, when ultrasonic delay lines have been used for color signal demodulation in color television receivers or as comb filters to improve image quality, there has been a problem in that image quality deteriorates due to noise caused by the above-mentioned unnecessary reflections. In order to eliminate this defect, an attempt has been made to attach an unnecessary reflection absorbing material made of resin or the like on the path of unnecessary reflection on the surface of a delay medium through which ultrasonic waves are propagated. However, the process of attaching unnecessary reflective absorbing material to the delay medium requires time and effort, which increases the product price of the ultrasonic delay line, and this method does not require multiple round-trip propagation within the regular propagation path. It was not possible to remove the reflected waves.

The present invention eliminates the above-mentioned drawbacks of the conventional circuit, and involves inputting the output signal of the ultrasonic delay line and the output signal obtained by putting the output signal of the ultrasonic delay line into a limit circuit and limiting it into an arithmetic circuit. , and provides an ultrasonic delay circuit that calculates and outputs. Note that in the present invention, the structure and operating principle of the ultrasonic delay line are the same as those shown in FIG. 1, so a description thereof will be omitted.

FIG. 3 shows a block diagram of the ultrasonic delay circuit of the present invention. This ultrasonic delay circuit includes an ultrasonic delay line 6 that inputs an input signal from an input terminal 4, delays this input signal for a certain period of time, and outputs the delayed signal to an output terminal 5, and an output signal of this ultrasonic delay line 6. A limit circuit 8 inputs a signal below a certain level to an output terminal 7, and inputs the output signal of the ultrasonic delay line 6 and the output signal of the limit circuit 8 from input terminals 9a and 9b, and outputs a signal below a certain level to an output terminal 7. The arithmetic circuit 11 calculates (subtracts) two signals and outputs the result to an output terminal 10. Here, the ultrasonic delay line 6 has a delay medium and a conversion element as its main components as shown in FIG. 1, and the limit circuit is a normal one consisting of resistors, diodes, amplifiers, etc. The arithmetic circuit 11 is a normal circuit composed of resistors, capacitors, transistors, and the like.

Next, the operation of the ultrasonic delay circuit having the above configuration will be explained.

Now, the input signal 12 as shown in FIG. 4a is t=
At o, if the input terminal 4 is input to the ultrasonic delay line 6 in FIG. A delayed signal 13a is output. This delayed signal 13a is an unnecessary reflected signal 14a, 1 with magnitudes β and γ at t=1/3τ, 2τ.
5a, and these unnecessary reflected signals 14
a, 15a is relatively large compared to the delayed signal 13a, and therefore, in this state, the S/N ratio is low and it is necessary to remove noise. In the past, the delayed signal 13a was used together with the unnecessary reflected signals 14a and 15a.

On the other hand, the signals 13a to 15a in FIG. 4b are input to the limit circuit 8, and the output terminal 7 of the limit circuit 8 receives signals t=1/3τ, t=1/3τ, as shown in FIG. 4c.
Limit signals 13b to 15b limited to a constant magnitude λ (λ<α) at τ and 2τ are output.

The signals 13a to 15a in FIG. 4b above and the fourth
When the signals 13b to 15b in FIG. Figure d
As shown in , a delayed signal 13c of magnitude α−λ,
An unnecessary reflected signal 14c with a magnitude of β-λ and an unnecessary reflected signal 15c with a magnitude of γ-λ are output. Since the unnecessary reflected signals 14c and 15c are significantly reduced compared to the delayed signal 13c by the above-mentioned subtraction operation, the S/N ratio of the ultrasonic delay circuit is improved.

Hereinafter, it will be shown by mathematical expressions that in the ultrasonic delay circuit of the present invention, the unnecessary reflected signal becomes smaller than the delayed signal.

The fourth wave observed at the output terminal 5 of the ultrasonic delay line 6
The magnitude of the unnecessary reflected signals 14a and 15a in Figure b is
The following A and B are obtained for the delayed signal 13a.

20logβ/α [dB] (t=1/3τ) ...(A) 20logγ/α[dB] (t=2τ) ...(B) Here, we take the logarithm to express it in decibels [dB], and use the coefficient 20. is added.

Next, the output terminal 10 of the ultrasonic delay circuit of the present invention
Unwanted reflected signal 14 shown in Fig. 4d observed in
The magnitudes of c and 15c are as follows A' and B' with respect to the delayed signal 13c.

20log | β − λ | / | α − λ | [dB] (t = 1/3τ) ... (A') 20 log | γ - λ | / | α - λ | [dB] (t = 2τ) ...
(B′) On the other hand, since α>β, γ, λ≧0, |β−λ|/|α−λ|<β/α<1 …(A″) |γ−λ|/|α− λ | < γ / α < 1 ... (B'') holds, and therefore, the magnitude relationship of unnecessary reflected signals in the conventional case and in the ultrasonic delay circuit of the present invention is (A), (B ), (A′), (B′), (A″), (B″
), it becomes as follows.

20log｜β−λ｜／｜α−λ｜＜20logβ／α ……(C) 20log｜γ−λ｜／｜α−λ｜＜20logγ／α ……(D) Above inequality (C), (D ), compared to the conventional case where the output signal of the ultrasonic delay line 6 is used as a delay signal, the delayed signal obtained from the output terminal 10 in the ultrasonic delay circuit of the present invention is at the level of the unnecessary reflected signal. is low, and the S-N ratio is improved.

Moreover, the magnitude λ of the limit signals 13b to 15b
By setting the value to an optimum value, it is possible to virtually eliminate unnecessary reflected signals.

Since the ultrasonic delay circuit of the present invention described above uses a combination of circuits to remove unnecessary reflected signals, it can be widely applied regardless of the type of ultrasonic delay line. Further, by adjusting the resistance of the limit circuit, unnecessary reflected signals can be virtually eliminated, which is of great practical value.

[Brief explanation of the drawing]

Fig. 1 is a front view to explain the configuration and operation of a normal ultrasonic delay line, Fig. 2 is a developed view of the ultrasonic propagation path to explain unnecessary reflections, and Fig. 3 is an ultrasonic wave according to the present invention. Block diagram of delay circuit, Figures 4a-d
is a diagram of signal waveforms at various locations in the same ultrasonic delay circuit. 6... Ultrasonic delay line, 8... Limit circuit, 1
1... Arithmetic circuit.

Claims (1)

[Claims] 1 Input an ultrasonic delay line having a structure in which a conversion element having an electric-mechanical energy conversion function is bonded to a delay medium, and the output signal of this ultrasonic delay line,
Input a limit circuit that outputs a signal below a certain level, the output signal of the ultrasonic delay line, and the output signal of the limit circuit, and subtract the output signal of the limit circuit from the output signal of the ultrasonic delay line. 1. An ultrasonic delay circuit comprising: a subtracter for extracting a delayed signal from an output terminal.