JPS6428917A - Exposure time controlling circuit in charged particle beam aligner - Google Patents
Exposure time controlling circuit in charged particle beam alignerInfo
- Publication number
- JPS6428917A JPS6428917A JP18597587A JP18597587A JPS6428917A JP S6428917 A JPS6428917 A JP S6428917A JP 18597587 A JP18597587 A JP 18597587A JP 18597587 A JP18597587 A JP 18597587A JP S6428917 A JPS6428917 A JP S6428917A
- Authority
- JP
- Japan
- Prior art keywords
- output
- counter circuit
- exposure
- logical
- exposure time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electron Beam Exposure (AREA)
Abstract
PURPOSE:To detect whether an exposure has taken place during an exposure time by a method wherein, in addition to a second counter circuit to set data indicating a non-exposure time and a third counter circuit to set data indicating an exposure time, a first counter circuit to set an added value of the two data is installed in order to check whether a clock signal is counted or not. CONSTITUTION:When a third counter circuit 26 has finished counting a clock signal earlier than a duration set through a terminal 21, that is to say, when an exposure duration has been completed earlier than a preset duration, a signal of a logical '1' is output from an output terminal 48. In the same manner, when the exposure duration lasts longer than the preset duration, the signal of the logical '1' is output from an output terminal 49. If a third counter circuit 26 is not actuated even when a second counter circuit 25 has finished counting the clock signal, that is to say, if an exposure operation is not executed, the signal of the logical '1' has been already output from a terminal Q of a second flip-flop 43. Accordingly, when a signal supplied to a clock terminal CK of a third flip-flop 44 has risen to the logical '1', the output of the logical '1' is output through an output terminal 47 from an AND circuit 46; it is displayed that the exposure operation was not executed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18597587A JPS6428917A (en) | 1987-07-24 | 1987-07-24 | Exposure time controlling circuit in charged particle beam aligner |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18597587A JPS6428917A (en) | 1987-07-24 | 1987-07-24 | Exposure time controlling circuit in charged particle beam aligner |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6428917A true JPS6428917A (en) | 1989-01-31 |
Family
ID=16180153
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18597587A Pending JPS6428917A (en) | 1987-07-24 | 1987-07-24 | Exposure time controlling circuit in charged particle beam aligner |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6428917A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4850250B2 (en) * | 2005-09-28 | 2012-01-11 | アプライド マテリアルズ インコーポレイテッド | Beam blanker driver system and method |
-
1987
- 1987-07-24 JP JP18597587A patent/JPS6428917A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4850250B2 (en) * | 2005-09-28 | 2012-01-11 | アプライド マテリアルズ インコーポレイテッド | Beam blanker driver system and method |
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