JPS6427007A - Equalizing circuit - Google Patents
Equalizing circuitInfo
- Publication number
- JPS6427007A JPS6427007A JP18457887A JP18457887A JPS6427007A JP S6427007 A JPS6427007 A JP S6427007A JP 18457887 A JP18457887 A JP 18457887A JP 18457887 A JP18457887 A JP 18457887A JP S6427007 A JPS6427007 A JP S6427007A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- negative peak
- waveform
- peak
- lpf
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Digital Magnetic Recording (AREA)
Abstract
PURPOSE:To eliminate a negative peak, and to reduce the read-out error rate by forming a signal having a positive waveform, being objective to a negative peak which appears in an isolated waveform at the time of reproducing a thin film magnetic head, and executing the addition to a main signal. CONSTITUTION:A reproducing input signal 8 of a thin film head is delayed by a delay line 1, and a main signal 9 is obtained. Subsequently, by setting suitably a delay time of the delay lines 1, 2, an LPF 7, and an adder 5, a negative peak before and after the central peak and a peak of filtering signal 10 are set to the same position. Also, by setting appropriately a cut-off frequency of the LPF, and attenuators 3, 4, the half value width and the amplitude of the filtering signal 10 are approximated to the waveform width and the amplitude of the negative peak. Accordingly, by adding the signal 10 and the signal 9, the negative peak scarcely appears in an output signal 11, the waveform is equalized satisfactorily, and the read-out error rate is reduced.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18457887A JPS6427007A (en) | 1987-07-23 | 1987-07-23 | Equalizing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18457887A JPS6427007A (en) | 1987-07-23 | 1987-07-23 | Equalizing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6427007A true JPS6427007A (en) | 1989-01-30 |
Family
ID=16155659
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18457887A Pending JPS6427007A (en) | 1987-07-23 | 1987-07-23 | Equalizing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6427007A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5574713A (en) * | 1993-04-26 | 1996-11-12 | Ricoh Company, Ltd. | Method for controlling an optical recording device for improved recording mark detection |
-
1987
- 1987-07-23 JP JP18457887A patent/JPS6427007A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5574713A (en) * | 1993-04-26 | 1996-11-12 | Ricoh Company, Ltd. | Method for controlling an optical recording device for improved recording mark detection |
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