JPS6425693A - Inspection device for image signal decoder - Google Patents

Inspection device for image signal decoder

Info

Publication number
JPS6425693A
JPS6425693A JP62182964A JP18296487A JPS6425693A JP S6425693 A JPS6425693 A JP S6425693A JP 62182964 A JP62182964 A JP 62182964A JP 18296487 A JP18296487 A JP 18296487A JP S6425693 A JPS6425693 A JP S6425693A
Authority
JP
Japan
Prior art keywords
signal
selector
mode
interpolation
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62182964A
Other languages
Japanese (ja)
Inventor
Kaoru Mihashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62182964A priority Critical patent/JPS6425693A/en
Publication of JPS6425693A publication Critical patent/JPS6425693A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

PURPOSE:To compare an original image and the processed image (or mode distribution) simultaneously by one monitor by displaying the original image and the processed image (or mode display) on an optional part. CONSTITUTION:An input signal 50 thinned out at the sender side is inputted to an interpolation circuit 1. The interpolation circuit 1 outputs interpolation images 52-55 corresponding to the four kinds of thinning-out modes to a selector 2. A mode signal 51 from the sender side is outputted to the selector 2 via a selector 5 and an interpolation image in response to the mode is outputted as the output signal 56. A vertical synchronizing signal V clears a counter 4 to set a FF 61. The counter 4 counts a horizontal synchronizing signal H and generates a clear signal 60 when a value m1 inputted from a switch SW1 is reached to reset the FF 61. The selector 5 selects the mode signal 51 when the FF 61 is set as the output signal 57. When the FF 61 is reset, the value m2 inputted from the switch SW2 is used as the output signal 57 to select a non-interpolation signal (original picture) 52 by the selector 2.
JP62182964A 1987-07-22 1987-07-22 Inspection device for image signal decoder Pending JPS6425693A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62182964A JPS6425693A (en) 1987-07-22 1987-07-22 Inspection device for image signal decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62182964A JPS6425693A (en) 1987-07-22 1987-07-22 Inspection device for image signal decoder

Publications (1)

Publication Number Publication Date
JPS6425693A true JPS6425693A (en) 1989-01-27

Family

ID=16127403

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62182964A Pending JPS6425693A (en) 1987-07-22 1987-07-22 Inspection device for image signal decoder

Country Status (1)

Country Link
JP (1) JPS6425693A (en)

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