JPS6418378A - Simultaneous video recording circuit for plural video channels - Google Patents

Abstract

PURPOSE:To obtain an image which has no disorder in signal reproduction by detecting respective channel differences by a memory controller as to video signals of plural channels and adjusting readout timing according to the respective phase differences. CONSTITUTION:A memory controller 3 generates a pulse which goes up to high level a specific period after the horizontal rising pulse of a video signal VA and writes the signal VA in a frame memory 1. Further, the memory controller 3 writes a signal VB according to the period from the rising of the video signal VB to the start point of the signal. Then the controller 3 detects the phase difference between respectively channels, generates a readout pulse a specific period after the horizontal driving pulse of the video signal VB rises, and read the signal VA out of the memory 1 at a speed twice as fast as usual, and simultaneously the controller 3 reads the signal VB at the speed twice as fast as usual the specific period after the horizontal driving pulse of the signal VB rises, thereby obtaining compressed signals respectively. Those signals are passed through a changeover switch 30 and converted into a composite compressed signal, and composite synchronizing pulses are inserted to generate a composite video signal.