JPS641806B2 - - Google Patents
Info
- Publication number
- JPS641806B2 JPS641806B2 JP54129871A JP12987179A JPS641806B2 JP S641806 B2 JPS641806 B2 JP S641806B2 JP 54129871 A JP54129871 A JP 54129871A JP 12987179 A JP12987179 A JP 12987179A JP S641806 B2 JPS641806 B2 JP S641806B2
- Authority
- JP
- Japan
- Prior art keywords
- battery
- voltage
- resistor
- signal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000005856 abnormality Effects 0.000 claims description 8
- 238000001514 detection method Methods 0.000 claims description 8
- 230000002950 deficient Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 230000015654 memory Effects 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 208000032953 Device battery issue Diseases 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910052793 cadmium Inorganic materials 0.000 description 1
- BDOSMKKIYDKNTQ-UHFFFAOYSA-N cadmium atom Chemical compound [Cd] BDOSMKKIYDKNTQ-UHFFFAOYSA-N 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
Description
【発明の詳細な説明】
本発明は電源が断となつた場合、２次電池によ
りIC.RAMのデータを保持するような装置の異常
検出に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to abnormality detection in a device that retains data in an IC.RAM using a secondary battery when power is cut off.
従来不揮発性RAMとしてコアメモリ、ワイヤ
メモリ等の磁性体メモリが使用されていたが、近
年、CMOSRAMが開発され、電池によりデータ
保持が行なわれるようになつた。電池は無限時間
のデータ保持が出来ないため、電池の交換あるい
はアルカリ２次電池を用い微小電流で充電を続け
ながら使用することが一般的である。また電池を
使用する場合、電池が放電を続け容量がなくなつ
た場合、つまり電池切れになる前に警報を発し、
電池交換あるいは再充電しなければならない。と
ころが２次電池を使用する場合電池にほとんど残
量がなくなつても装置に電源が通電されている時
には電池は通常充電状態となり、放電時よりも電
池端子電圧が上昇している。従つて、電池切れ検
出のための検出回路が電池端子の電圧を検出する
ことにより行なわれている場合は実際ほとんど残
量がなくなつていたとしてもそれは検出されなく
なる。 Conventionally, magnetic memories such as core memory and wire memory have been used as non-volatile RAM, but in recent years, CMOS RAM has been developed and data has been retained using batteries. Since batteries cannot retain data for an infinite time, it is common to replace the batteries or use alkaline secondary batteries while continuing to charge them with a minute current. Also, when using batteries, if the battery continues to discharge and runs out of capacity, in other words, it will issue an alarm before the battery runs out.
Batteries must be replaced or recharged. However, when a secondary battery is used, even if the battery has almost no remaining power, the battery is normally in a charged state when the device is powered on, and the battery terminal voltage is higher than when it is discharged. Therefore, if the detection circuit for detecting battery exhaustion is performed by detecting the voltage at the battery terminals, it will not be detected even if the battery is almost completely empty.
本発明は、長期間装置の電源が投入されない場
合は別として、比較的短時間毎に装置に電源が投
入される場合において、電池の残存容量が少なく
なつたのを検出可能とし(1)装置使用時においては
データ保持に入る前に警報を発し確実にデータ保
持ができるようにし、(2)装置電源投入時において
は電池不良かic.RAM不良かの切り分けをし保守
を容易にさせるのを目的とする。 The present invention makes it possible to detect that the remaining capacity of the battery is low when the power is turned on to the device relatively briefly, apart from when the power is not turned on to the device for a long period of time.(1) The device During use, an alarm is issued before data retention begins to ensure data retention, and (2) when the device is powered on, it is determined whether the battery is defective or IC.RAM is defective, making maintenance easier. purpose.
本発明の要点とするところは一度、検出回路が
動作すると、電池と抵抗で閉ループを構成し充電
回路が動作しても、電池の端子電圧が一定電圧を
越えないような回路構成としたところにある。 The key point of the present invention is that once the detection circuit operates, the battery and resistor form a closed loop, and even if the charging circuit operates, the circuit configuration is such that the terminal voltage of the battery does not exceed a certain voltage. be.
一般にICRAMがデータ保持できる最低電圧は
2Vと製造業者はカタログ化している。このよう
な場合ニツケル、カドミウム電池等の２次電池を
使用することが一般であり、通常２個あるいは３
個使用する。本発明では２個の場合で説明する。 Generally, the minimum voltage at which ICRAM can retain data is
2V and the manufacturer are cataloged. In such cases, it is common to use secondary batteries such as nickel or cadmium batteries, and usually two or three batteries are used.
Use pcs. The present invention will be explained using two cases.
第１図は電池の充電特性であるが電池の端子電
圧は充電時間、容易に影響されず、充電が開始さ
れると瞬時のうちに2.6V〜2.9Vになる。一方第
２図に示すように、放電特性は時間に比例して容
易が減少するが、端子電圧は2.5V〜2.4V間でほ
とんど変動しない。しかし容量がなくなる寸前で
急傾斜で低下する。このためICRAMが2Vまでデ
ータ保持が保証されているため2.1V〜2.3Vに低
下した際電池異常（電池切れ）と検出すればよ
い。 FIG. 1 shows the charging characteristics of the battery, and the terminal voltage of the battery is not easily affected by charging time, and instantly becomes 2.6V to 2.9V when charging starts. On the other hand, as shown in FIG. 2, although the discharge characteristics decrease in proportion to time, the terminal voltage hardly changes between 2.5V and 2.4V. However, just before capacity is exhausted, the capacity drops sharply. For this reason, ICRAM is guaranteed to retain data up to 2V, so when it drops to 2.1V to 2.3V, it can be detected as a battery abnormality (depleted battery).
第３図は従来回路である。抵抗R1は電池E1を
充電するための電流制限抵抗であり、装置に通電
されない時IC.RAM（図示せず）への給電経路を
も兼用する。電圧異常検出器１は電池E1の電圧
が入力され、2.1V〜2.3V以下となると出力に異
常検出信号Ａと発す。この回路においては装置に
通電開始直後は信号Ａを発すが、第１図より数秒
〜数分後には電池E1の電圧が2.6V〜2.9Vとなる
ため信号Ａが停止して、装置オペレータが電池切
れに気付かぬことがある。第４図は第３図の欠点
を補うために改良されたもので信号Ａがスイツチ
２をコントロールしてトランジスタをカツトオフ
させ一度電池切れとなるとスイツチ２が断となり
電源VDDと切り離して電池E1には充電されないよ
うにしている。 FIG. 3 shows a conventional circuit. The resistor R1 is a current limiting resistor for charging the battery E1 , and also serves as a power supply path to the IC.RAM (not shown) when the device is not energized. The voltage abnormality detector 1 receives the voltage of the battery E1 , and outputs an abnormality detection signal A when the voltage falls below 2.1V to 2.3V. In this circuit, signal A is emitted immediately after the device starts being energized, but as shown in Figure 1, after a few seconds to a few minutes, the voltage of battery E1 becomes 2.6V to 2.9V, so signal A stops, and the device operator Sometimes I don't notice when the battery is dead. Figure 4 is an improved version of Figure 3, in which signal A controls switch 2 to cut off the transistor, and once the battery runs out, switch 2 is cut off and disconnected from the power supply V DD to switch off the battery E 1 . I am trying not to charge it.
しかしながら電池でRAMデータを保持してい
る場合の消費電流は100μA程度であるため抵抗で
あれば電圧降下を0.1V以下に設定できるのであ
るがダイオードでは電圧降下が0.5V程度となり
本例ではIC.RAMの電源として実際の電池電圧よ
り0.5Vも低いものが電源電圧となり不利である。 However, when holding RAM data with a battery, the current consumption is about 100μA, so if you use a resistor, you can set the voltage drop to 0.1V or less, but with a diode, the voltage drop is about 0.5V, and in this example, the IC. As a power source for RAM, the power supply voltage is 0.5V lower than the actual battery voltage, which is disadvantageous.
本発明の実施例を第５図に示す。 An embodiment of the invention is shown in FIG.
電源＋5Vはダイオード３を介してICRAM（図
示せず）に、電力を供給する。ICRAMの電源線
を以下VDDを記す。ダイオード３のカソード側
（VDD）に抵抗R1と電池E1が直列に接続され、電
池のマイナス端子は接地されている。電池E1の
プラス側は電池異常検出器１に入力され、検出器
１の出力は警報回路６とスイツチ４に入力され
る。スイツチ４と抵抗R2からなる直列回路が電
池E1に並列接続されている。 Power supply +5V supplies power to ICRAM (not shown) via diode 3. The ICRAM power supply line is referred to as V DD below. A resistor R 1 and a battery E 1 are connected in series to the cathode side (V DD ) of the diode 3, and the negative terminal of the battery is grounded. The positive side of the battery E1 is input to the battery abnormality detector 1, and the output of the detector 1 is input to the alarm circuit 6 and the switch 4. A series circuit consisting of switch 4 and resistor R 2 is connected in parallel to battery E 1 .
本回路において通常、電源は＋5VからICRAM
に供給され、＋5VがOFFあるいは停電になつた場
合電池E1から抵抗R1を介してICRAMに電力が供
給される。電池異常検出器１は電池E1が電池切
れかどうか判定する基準電圧（例えば2.1V）と
電池E1の電圧を比較する比較回路から成り、電
池E1の電圧が基準電圧より小さい場合は出力信
号Ａを“High”レベルにし、大きい場合に信号
Ａを“Low”レベルにする。つまり電池切れに
なると信号Ａは“High”レベルとなり警報回路
６を作動させ装置オペレータに電池切れを気付か
せることが出来る。さらに信号Ａが“High”レ
ベルとなるとスイツチ４が導通状態となる。 In this circuit, the power supply is usually +5V to ICRAM.
If +5V is turned off or there is a power outage, power is supplied from battery E 1 to ICRAM via resistor R 1 . The battery abnormality detector 1 consists of a comparison circuit that compares the voltage of the battery E 1 with a reference voltage (for example, 2.1V) to determine whether the battery E 1 is dead or not, and outputs an output when the voltage of the battery E 1 is lower than the reference voltage. The signal A is set to the "High" level, and if the signal A is large, the signal A is set to the "Low" level. In other words, when the battery runs out, the signal A goes to a "high" level, activating the alarm circuit 6 and alerting the device operator to the battery running out. Further, when the signal A becomes "High" level, the switch 4 becomes conductive.
ここで、
VDD×R2／R1＋R2＝VR
電池E1の電圧＝VE
とすれば
VR＞VEのとき電池E1は充電されVRVEのとき電
池E1は放電
となる。 Here, if V DD ×R 2 /R 1 + R 2 = V R voltage of battery E 1 = V E , then when V R > V E , battery E 1 is charged, and when V R V E , battery E 1 is charged. It becomes a discharge.
つまり、電池切れを検出したときVRVEが成
立するよう抵抗R1，R2の抵抗値を決定し、電池
E1を充電状態にせず、電池切れ状態を維持する。
さらに具体的に説明すると、電池切れ検出電圧を
2.1Vとするならば
VR2.1V
つまり
VDD×R2／R1＋R22.1
になるよう抵抗R1，R2の抵抗値を決定する。 In other words, the resistance values of resistors R 1 and R 2 are determined so that V R V E is established when a dead battery is detected, and the
Keep E 1 in a dead battery state without leaving it in a charging state.
To explain more specifically, the battery dead detection voltage is
If the voltage is 2.1V, determine the resistance values of resistors R 1 and R 2 so that V R 2.1V, that is, V DD ×R 2 /R 1 +R 2 2.1 .
また、本発明において負荷はICRAM以外の電
池でバツクアツプする論理回路（たとえば時計回
路）であつてもよい。 Further, in the present invention, the load may be a logic circuit (for example, a clock circuit) backed up by a battery other than ICRAM.
これによりオペレータは警報回路からの警報で
電池切れあるいは電池不良を知ることができる。
さらに電源投入時にメモリ系障害が発生した場
合、警報回路からの警報と組み合せ、電池不良か
メモリ素子不良かの切り分けが容易にできる。こ
こで、本実施例では、警報回路６に電源が供給さ
れている状態においてのみ警報回路６が動作し、
停動時に警報回路６は動作しない。 This allows the operator to know that the battery is dead or defective through an alarm from the alarm circuit.
Furthermore, if a memory system failure occurs when the power is turned on, in combination with an alarm from the alarm circuit, it is possible to easily determine whether the battery is defective or the memory element is defective. Here, in this embodiment, the alarm circuit 6 operates only when power is supplied to the alarm circuit 6,
The alarm circuit 6 does not operate during a standstill.
本発明によれば、長期間装置の電源が投入され
ない場合は別として、比較的短期間毎に装置に電
源が投入される場合において、次の効果が得られ
る。 According to the present invention, the following effects can be obtained when the device is powered on for a relatively short period of time, apart from when the device is not powered on for a long period of time.
(a) 確実に電池切れ警報を発することができる。(a) A low battery alarm can be reliably issued.
(b) 装置使用時においては事前に電池不良を検出
しデータを保護できる。(b) When using the device, battery failure can be detected in advance and data can be protected.
(c) 装置電源投入時においては前記RAMの内容
が正常であれば電池を充電しデータを保護でき
内容が破壊されておけば電池不良かICRAM不
良かの切り分けが容易にでき保守性が良くな
る。(c) When the device power is turned on, if the contents of the RAM are normal, the battery can be charged and data can be protected, and if the contents are destroyed, it becomes easy to distinguish between a defective battery or a defective ICRAM, improving maintainability. .
(d) スイツチ４はTTLでも可態であり経済的で
ある。(d) Switch 4 can also be used in TTL and is economical.
第１図…電池の充電特性を示す図、第２図…電
池の放電特性を示す図、第３図…従来の検出回路
図、第４図…従来の他の検出回路図、第５図…本
発明の実施例を示す図。
１……電圧異常検出器、R1……抵抗、E1……
電池、２……スイツチ、５……ダイオード１、６
……警報回路、３……ダイオード、R2……抵抗、
４……スイツチ。
Fig. 1... A diagram showing the charging characteristics of the battery, Fig. 2... A diagram showing the discharging characteristics of the battery, Fig. 3... A conventional detection circuit diagram, Fig. 4... A diagram of another conventional detection circuit, Fig. 5... FIG. 1 is a diagram showing an example of the present invention. 1... Voltage abnormality detector, R 1 ... Resistor, E 1 ...
Battery, 2... Switch, 5... Diode 1, 6
... Alarm circuit, 3 ... Diode, R 2 ... Resistor,
4...Switch.
Claims (1)
と並列に第１の抵抗と電池の直列回路を有する装
置において、前記電源に接続され、該電源の電圧
から基準電圧を生成する基準電圧生成部と該基準
電圧と前記電池の電圧を比較し、前記電池電圧が
一定値より低下していることにより信号を発生す
る比較回路とから構成される電圧検出器と、前記
信号に応答して警報を発する警報回路と、前記電
池と並列に接続された第２の抵抗と前記信号によ
り導通するスイツチの直列回路とを有し、かつ、
前記第１の抵抗と第２の抵抗の比を前記スイツチ
が導通のとき、前記電池の端子電圧を前記一定値
以下となるよう選択したことを特徴とする電圧異
常検出装置。1. A reference voltage generating section connected to the power source and generating a reference voltage from the voltage of the power source in a device that is supplied with power from a power source to a load device and has a series circuit of a first resistor and a battery in parallel with the load device. and a comparison circuit that compares the reference voltage with the voltage of the battery and generates a signal when the battery voltage is lower than a certain value, and generates an alarm in response to the signal. a series circuit including a second resistor connected in parallel with the battery and a switch connected in response to the signal, and
A voltage abnormality detection device characterized in that the ratio of the first resistor to the second resistor is selected such that when the switch is conductive, the terminal voltage of the battery is equal to or less than the certain value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12987179A JPS5654530A (en) | 1979-10-11 | 1979-10-11 | Voltage abnormality detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12987179A JPS5654530A (en) | 1979-10-11 | 1979-10-11 | Voltage abnormality detector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5654530A JPS5654530A (en) | 1981-05-14 |
| JPS641806B2 true JPS641806B2 (en) | 1989-01-12 |
Family
ID=15020354
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12987179A Granted JPS5654530A (en) | 1979-10-11 | 1979-10-11 | Voltage abnormality detector |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5654530A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6192144U (en) * | 1984-11-20 | 1986-06-14 | ||
| JPS6261139A (en) * | 1985-09-11 | 1987-03-17 | Fuji Electric Co Ltd | Backup device for ram |
-
1979
- 1979-10-11 JP JP12987179A patent/JPS5654530A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5654530A (en) | 1981-05-14 |
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