JPS6416644U - - Google Patents
Info
- Publication number
- JPS6416644U JPS6416644U JP11209187U JP11209187U JPS6416644U JP S6416644 U JPS6416644 U JP S6416644U JP 11209187 U JP11209187 U JP 11209187U JP 11209187 U JP11209187 U JP 11209187U JP S6416644 U JPS6416644 U JP S6416644U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- hole
- substrates
- component
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 239000008188 pellet Substances 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ａ，ｂはそれぞれ本考案の一実施例を説
明するための平面図及び斜視図、第２図ａ，ｂは
それぞれ本考案の他の実施例を説明するための平
面図、及び斜視図、第３図ａ〜ｃは従来例を説明
するための平面図及び斜視図である。
１，２，３，４，５，６……半導体装置、１１
，２１，３１，４１，５１，６１……基板、１２
，２２……半導体デバイス、１３，２３……抵抗
、１２４……端子、１２５……外装樹脂、３０，
４０，５０，６０……貫通穴、６６６……へこみ
、１２６，１２７……端子、３２，３３，４２，
４３，５２，５３，６２，６３……裸のペレツト
である。
1A and 1B are a plan view and a perspective view, respectively, for explaining one embodiment of the present invention, and FIGS. 2A and 2B are a plan view and a perspective view, respectively, for explaining another embodiment of the present invention. 3A to 3C are a plan view and a perspective view for explaining a conventional example. 1, 2, 3, 4, 5, 6... semiconductor device, 11
, 21, 31, 41, 51, 61...Substrate, 12
, 22... Semiconductor device, 13, 23... Resistor, 124... Terminal, 125... Exterior resin, 30,
40,50,60...through hole, 666...dent, 126,127...terminal, 32,33,42,
43, 52, 53, 62, 63... These are naked pellets.
Claims (1)
２個の基板の裏面同士をはりあわせ樹脂により前
記部品及び前記基板を覆つた半導体装置において
、前記２個の基板が貫通穴を有し、該貫通穴上の
前記樹脂には凹部が形成されていることを特徴と
する半導体装置。 In a semiconductor device in which the back sides of two substrates each having a component such as a semiconductor element mounted on one side are bonded together and the component and the substrate are covered with resin, the two substrates have a through hole, and the through hole A semiconductor device characterized in that a recess is formed in the upper resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11209187U JPS6416644U (en) | 1987-07-21 | 1987-07-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11209187U JPS6416644U (en) | 1987-07-21 | 1987-07-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6416644U true JPS6416644U (en) | 1989-01-27 |
Family
ID=31350724
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11209187U Pending JPS6416644U (en) | 1987-07-21 | 1987-07-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6416644U (en) |
-
1987
- 1987-07-21 JP JP11209187U patent/JPS6416644U/ja active Pending
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