JPS6416029A - Identifying circuit - Google Patents

Identifying circuit

Info

Publication number
JPS6416029A
JPS6416029A JP17088387A JP17088387A JPS6416029A JP S6416029 A JPS6416029 A JP S6416029A JP 17088387 A JP17088387 A JP 17088387A JP 17088387 A JP17088387 A JP 17088387A JP S6416029 A JPS6416029 A JP S6416029A
Authority
JP
Japan
Prior art keywords
inter
code interference
interference variable
circuit
identification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17088387A
Other languages
Japanese (ja)
Inventor
Norio Tamaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP17088387A priority Critical patent/JPS6416029A/en
Publication of JPS6416029A publication Critical patent/JPS6416029A/en
Pending legal-status Critical Current

Links

Landscapes

  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To improve the identification margin independently of an inter-code interference variable by detecting the inter-code interference variable so as to set an optimum identification level in response to the inter-code interference variable. CONSTITUTION:The circuit comprising an inverter 15 and an AND circuit 16 detects the data zero state and an amplifier 4 is used to obtain the inter-code interference variable superimposed on the zero level. The value is converted into a DC by an integration circuit 11 and a limiter 12 limits the maximum value (MAX). Then the output of the inverting circuit 13 controls the comparators 2, 3 and the threshold level of the comparators 2, 3 is identified as 50% with respect to the peak when the inter-code interference variable is zero and it is changed by the inter-code interference variable. Thus, even when the inter-code interference variable is large, accurate identification is applied and the identification margin is increased.
JP17088387A 1987-07-10 1987-07-10 Identifying circuit Pending JPS6416029A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17088387A JPS6416029A (en) 1987-07-10 1987-07-10 Identifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17088387A JPS6416029A (en) 1987-07-10 1987-07-10 Identifying circuit

Publications (1)

Publication Number Publication Date
JPS6416029A true JPS6416029A (en) 1989-01-19

Family

ID=15913080

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17088387A Pending JPS6416029A (en) 1987-07-10 1987-07-10 Identifying circuit

Country Status (1)

Country Link
JP (1) JPS6416029A (en)

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