JPS6415930U - - Google Patents
Info
- Publication number
- JPS6415930U JPS6415930U JP10741287U JP10741287U JPS6415930U JP S6415930 U JPS6415930 U JP S6415930U JP 10741287 U JP10741287 U JP 10741287U JP 10741287 U JP10741287 U JP 10741287U JP S6415930 U JPS6415930 U JP S6415930U
- Authority
- JP
- Japan
- Prior art keywords
- line sensor
- differential amplifier
- multiplexer
- output
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
- Facsimile Scanning Arrangements (AREA)
- Facsimile Image Signal Circuits (AREA)
Description
第１図は本考案の一実施例を示すブロツク図、
第２図ａ，ｂ，ｃはラインセンサの画素並びによ
る出力波形及びアンプゲインを示す波形図、第３
図ａ，ｂはラインセンサの出力レベルによる補正
ゲイン及び補正後出力を示すグラフ、第４図は従
来例を示すブロツク図である。
１……ラインセンサ、３……補正データメモリ
、５……コントローラ、６……画素アドレスカウ
ンタ、７……アナログマルチプレクサ、８……差
動アンプ、Ｒｋ……抵抗。
FIG. 1 is a block diagram showing an embodiment of the present invention.
Figure 2 a, b, and c are waveform diagrams showing the output waveform and amplifier gain due to the pixel arrangement of the line sensor;
Figures a and b are graphs showing the correction gain and the corrected output depending on the output level of the line sensor, and Fig. 4 is a block diagram showing a conventional example. 1... Line sensor, 3... Correction data memory, 5... Controller, 6... Pixel address counter, 7... Analog multiplexer, 8... Differential amplifier, Rk... Resistor.
Claims (1)
ンサ、該ラインセンサの各光電変換素子の補正デ
ータを保持したメモリ、前記ラインセンサの出力
を増幅する差動アンプ、該差動アンプの負帰還回
路に直列接続されたマルチプレクサ、前記メモリ
の出力に応じて前記マルチプレクサを切り換えて
前記差動アンプの負帰還量を変化させるための前
記マルチプレクサに接続された夫々抵抗値の異な
る複数の抵抗を備えてなることを特徴とするライ
ンセンサユニツト。 A line sensor in which photoelectric conversion elements are arranged in a line, a memory that holds correction data for each photoelectric conversion element of the line sensor, a differential amplifier that amplifies the output of the line sensor, and a negative feedback circuit of the differential amplifier. A multiplexer connected in series, and a plurality of resistors each having a different resistance value connected to the multiplexer for changing the amount of negative feedback of the differential amplifier by switching the multiplexer according to the output of the memory. A line sensor unit featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10741287U JPS6415930U (en) | 1987-07-13 | 1987-07-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10741287U JPS6415930U (en) | 1987-07-13 | 1987-07-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6415930U true JPS6415930U (en) | 1989-01-26 |
Family
ID=31341802
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10741287U Pending JPS6415930U (en) | 1987-07-13 | 1987-07-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6415930U (en) |
-
1987
- 1987-07-13 JP JP10741287U patent/JPS6415930U/ja active Pending